Hans de Goede [Fri, 3 Oct 2014 14:44:57 +0000 (16:44 +0200)]
sunxi: Use PG3 - PG8 as io-pins for mmc1
None of the known sunxi devices actually use mmc1 routed through PH, where
as some devices do actually use mmc1 routed through PG, so change the routing
of mmc1 to PG. If in the future we encounter devices with mmc1 routed through
PH, we will need to change things to be a bit more flexible.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 2 Oct 2014 19:13:54 +0000 (21:13 +0200)]
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting
sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're
booting, and make that one "mmc dev 0" so that a single u-boot binary can
be used for both the onboard eMMC and for external sdcards.
When we're booting from mmc2, we make it dev 0 because that is where the SPL
will load the tertiary payload (the actual u-boot binary in our case) from,
see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 2 Oct 2014 18:43:50 +0000 (20:43 +0200)]
sunxi: Turn MMC_SUNXI_SLOT_EXTRA into a proper Kconfig option
Note we also drop the SPL check for initializing the 2nd mmc slot, the SPL
check is not necessary with Kconfig, because only options explicitly marked
as also being for the SPL get set during SPL builds.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Maxime Ripard [Fri, 3 Oct 2014 12:16:29 +0000 (20:16 +0800)]
ARM: sunxi: Add basic A31 support
Add a new sun6i machine that supports UART and MMC.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: use SPDX labels, adapt to Kconfig system, drop ifdef
around mmc and smp code, drop MACH_TYPE] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Maxime Ripard [Fri, 3 Oct 2014 12:16:28 +0000 (20:16 +0800)]
ARM: sun6i: Setup the A31 UART0 muxing
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0 muxing"]
[wens@csie.org: reorder #ifs by SUN?I]
[wens@csie.org: replace magic numbers with GPIO definitions] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 3 Oct 2014 12:16:26 +0000 (20:16 +0800)]
ARM: sunxi-mmc: Add mmc support for sun6i / A31
The mmc hardware on sun6i has an extra reset control that needs to
be de-asserted prior to usage. Also the FIFO address is different.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: use setbits_le32 for reset control, drop obsolete changes,
rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Chen-Yu Tsai [Fri, 3 Oct 2014 12:16:25 +0000 (20:16 +0800)]
ARM: sun6i: Add clock support
This patch adds the basic clocks support for the Allwinner A31 (sun6i)
processor. This code will not been compiled until the build is hooked
up in a later patch. It has been split out to keep the patches manageable.
This includes changes from the following commits from u-boot-sunxi:
a92051b ARM: sunxi: Add sun6i clock controller structure 1f72c6f ARM: sun6i: Setup the UART0 clocks 5f2e712 ARM: sunxi: Enable pll6 by default on all models 2be2f2a ARM: sunxi-mmc: Add mmc support for sun6i / A31 12e1633 ARM: sun6i: Add initial clock setup for SPL 1a9c9c6 ARM: sunxi: Split clock code into common, sun4i and sun6i code 0b194ee ARM: sun6i: Properly setup the PLL LDO in clock_init_safe b54c626 sunxi: avoid sr32 for APB1 clock setup. 68fe29c sunxi: remove magic numbers from clock_get_pll{5,6} c89867d sunxi: clocks: clock_get_pll5 prototype and coding style 501ab1e ARM: sunxi: Fix sun6i PLL6 settings 37f669b ARM: sunxi: Fix macro names for mmc and uart reset offsets 61de1e6 ARM: sunxi: Correct comment for MBUS1 register in sun6i clock definitions
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: styling fixes reported by checkpatch.pl]
[wens@csie.org: drop unsupported SPL code block and unused gpio.h header] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Cc: Tom Cubie <Mr.hipboi@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Oliver Schinagl [Fri, 3 Oct 2014 12:16:24 +0000 (20:16 +0800)]
ARM: sun6i: Add support for the power reset control module found on the A31
The A31 has a new module called PRCM, or Power, Reset Control Module.
This module controls clocks and resets for RTC block modules, and also
PLL biasing in the main clock module.
This patch adds the register definitions, and also enables the clocks
and resets for the RTC block PIO (pin controller) and P2WI (push-pull
2 wire interface) which is used to talk to the PMIC.
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: spacing fixes reported by checkpatch.pl]
[wens@csie.org: Use setbits helper in PRCM init function]
[wens@csie.org: rephrase commit message to explain what the hardware
supports and what we actually enable] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Oliver Schinagl [Fri, 3 Oct 2014 12:16:23 +0000 (20:16 +0800)]
ARM: sun6i: Add base address for the new controllers in A31
A31 has several new and changed memory address. This patch adds them.
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Chen-Yu Tsai [Fri, 3 Oct 2014 12:16:22 +0000 (20:16 +0800)]
ARM: sunxi: Fix build break when CONFIG_USB_EHCI is not defined
BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Masahiro Yamada [Tue, 21 Oct 2014 04:18:32 +0000 (13:18 +0900)]
kbuild: clear VENDOR variable to fix build error on tcsh
Since the environment "VENDOR" is set in tcsh, it must be cleared in our
makefile. Otherwise, boards without CONFIG_SYS_VENDOR fail to build:
> make CROSS_COMPILE=arm-linux-gnueabi- wandboard_quad_defconfig all
[ snip ]
AR arch/arm/lib/lib.a
CC arch/arm/lib/eabi_compat.o
scripts/Makefile.build:55: /home/foo/u-boot/board/unknown/wandboard/ \
Makefile: No such file or directory
make[2]: *** No rule to make target `/home/foo/u-boot/board/unknown/ \
wandboard/Makefile'. Stop.
make[1]: *** [board/unknown/wandboard] Error 2
make: *** [__build_one_by_one] Error 2
Masahiro Yamada [Thu, 23 Oct 2014 16:30:46 +0000 (01:30 +0900)]
mips: enable CONFIG_USE_PRIVATE_LIBGCC by default
Without the private libgcc, we need a full multilib toolchain with
different libgcc or multiple toolchains to build all BE/LE and
hard-float/soft-float variants of MIPS boards. That is not feasible.
This commit allows us to build all the MIPS boards with a single
kernel.org toolchain:
Masahiro Yamada [Thu, 23 Oct 2014 16:30:45 +0000 (01:30 +0900)]
kconfig: invoke silentoldconfig if spl, tpl/.config is updated
When spl/.config is updated by "make spl/menuconfig" or friends,
spl/include/config/auto.conf, spl/include/generated/autoconf.h
and some other files must be updated by "make silentoldconfig".
There is no hook for SPL in the top Makefile, so this commit
touches .config when spl/.config is updated to invoke silentoldconfig.
Likewise for TPL.
Masahiro Yamada [Thu, 23 Oct 2014 16:30:44 +0000 (01:30 +0900)]
kbuild: fix a bug of the u-boot-spl link rule
cmd_u-boot-spl includes $(PLATFORM_LIBS) which changes
when CONFIG_USE_PRIVATE_GCC is updated. The u-boot-spl image
should be re-linked if any prerequisite is newer than it
or the command line has changed.
$(call, if_changed,...) should be used instead of $(call cmd,...).
Masahiro Yamada [Thu, 23 Oct 2014 16:30:43 +0000 (01:30 +0900)]
kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig
The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.
Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
Masahiro Yamada [Thu, 23 Oct 2014 16:30:40 +0000 (01:30 +0900)]
kconfig: move CONFIG_SYS_HZ to lib/Kconfig
CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).
This commit moves the definition and the document in README to
Kconfig. Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Marek Vasut <marex@denx.de>
Stefan Roese [Wed, 22 Oct 2014 10:13:24 +0000 (12:13 +0200)]
Makefile: Add CONFIG_BUILD_TARGET to automatically build an special image
Add target to build it automatically upon "make" / MAKEALL. This can/should
be set by board / cpu specific headers if a special U-Boot image is
required for this SoC / board.
E.g. used by Marvell Armada XP to automatically build the u-boot.kwb
target.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Stefan Roese [Wed, 22 Oct 2014 10:13:23 +0000 (12:13 +0200)]
tools: kwbimage: Add image version 1 support for Armada XP / 370
This patch integrates the Barebox version of this kwbimage.c file into
U-Boot. As this version supports the image version 1 type for the
Armada XP / 370 SoCs.
It was easier to integrate the existing and known to be working Barebox
source than to update the current U-Boot version to support this
v1 image header format. Now all Marvell MVEBU SoCs are supported:
Image type 0: Kirkwood & Dove
Image type 1: Armada 370 & Armada XP
Please note that the current v1 support has this restuction (same as
has Barebox version):
Not implemented: support for the register headers and secure headers
in v1 images
Tested on Marvell DB-78460-BP eval board.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
Stefan Roese [Wed, 22 Oct 2014 10:13:21 +0000 (12:13 +0200)]
tools/kwboot: Sync with latest barebox version to support Armada XP
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that
the U-Boot version still supports the -p option, to dynamically patch
an image for UART boot mode. I didn't test it now though.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
Stefan Roese [Wed, 22 Oct 2014 10:13:18 +0000 (12:13 +0200)]
arm: armada-xp: Add basic support for the Marvell DB-MV784MP-GP board
This patch adds basic support for the Marvell DB-MV784MP-GP evaulation
board. This is the first board that uses the recently created
Armada XP 78460 SoC support.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
Stefan Roese [Wed, 22 Oct 2014 10:13:17 +0000 (12:13 +0200)]
arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
Stefan Roese [Wed, 22 Oct 2014 10:13:15 +0000 (12:13 +0200)]
net: phy.h: Make PHY autonegotiation timeout configurable
The Marvell MV78460 eval board DB-78460-BP seems to need a longer
PHY autonegotiation timeout than the "standard" 4 seconds. So lets
make this timeout configurable. If not defined in the board config
header the original 4000ms is used.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com>
Stefan Roese [Wed, 22 Oct 2014 10:13:14 +0000 (12:13 +0200)]
net: mvneta.c: Add support for the ethernet controller of the Marvell Armada XP SoC
This patch adds support for the NETA ethernet controller which is integrated
in the Marvell Armada XP SoC's. This port is based on the Linux driver which
has been stripped of the in U-Boot unused portions.
Tested on the Marvell MV78460 eval board db-78460-bp.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Tested-by: Luka Perkov <luka@openwrt.org>
Stefan Roese [Wed, 22 Oct 2014 10:13:09 +0000 (12:13 +0200)]
arm: mvebu: Add common mbus functions to use on Marvell SoCs
These mbus functions are ported from Barebox. The Barebox version is
ported from Linux. These functions will be first used by the upcoming
Armada XP support. Later other Marvell SoC's will be adopted to use
these functions as well (Kirkwood, Orion).
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
Stefan Roese [Wed, 22 Oct 2014 10:13:08 +0000 (12:13 +0200)]
arm: marvell: Rework timer.c to make it usable for other MVEBU platforms
This patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentionally.
This will be used by the upcoming Armada XP support.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Stefan Roese [Wed, 22 Oct 2014 10:13:05 +0000 (12:13 +0200)]
arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name mvebu is taken
from the Linux kernel source tree. It has been chosen there to represent
the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's
currently are:
Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x
This will be used by the upcoming Armada XP (MV78460) platform support.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Simon Glass [Fri, 10 Oct 2014 13:30:20 +0000 (07:30 -0600)]
x86: Enable FIT, ELF on coreboot
Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.
Simon Glass [Fri, 10 Oct 2014 13:30:18 +0000 (07:30 -0600)]
x86: link: Tidy up the command lines options
We may as well use hush. The auto-complete option was incorrect so this was
not enabled. Also expand the command line size a little and go back to the
default prompt since "boot>" doesn't seem any more useful.
Thierry Reding [Tue, 26 Aug 2014 15:33:55 +0000 (17:33 +0200)]
fdt: Add a subnodes iterator macro
The fdt_for_each_subnode() iterator macro provided by this patch can be
used to iterate over a device tree node's subnodes. At each iteration a
loop variable will be set to the next subnode.
Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 26 Aug 2014 15:33:54 +0000 (17:33 +0200)]
fdt: Add a function to return PCI BDF triplet
The fdtdec_pci_get_bdf() function returns the bus, device, function
triplet of a PCI device by parsing the "reg" property according to the
PCI device tree binding.
Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 26 Aug 2014 15:33:53 +0000 (17:33 +0200)]
fdt: Add resource parsing functions
Add the fdt_get_resource() and fdt_get_named_resource() functions which
can be used to parse resources (memory regions) from an FDT. A helper to
compute the size of a region is also provided.
Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Thierry Reding [Tue, 26 Aug 2014 15:33:52 +0000 (17:33 +0200)]
fdt: Add functions to retrieve strings
Given a device tree node, a property name and an index, the new function
fdt_get_string_index() will return in an output argument a pointer to
the index'th string in the property's value.
The fdt_get_string() is a shortcut for the above with the index being 0.
Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Thierry Reding [Tue, 26 Aug 2014 15:33:51 +0000 (17:33 +0200)]
fdt: Add a function to get the index of a string
Given a device tree node and a property name, the new fdt_find_string()
function will look up a given string in the string list contained in the
property's value and return its index.
Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 Sep 2014 23:30:57 +0000 (17:30 -0600)]
dm: serial: Tidy up the pl01x driver
Adjust the driver so that leaf functions take a pointer to the serial port
register base. Put all the global configuration in the init function, and
use the same settings from then on.
This makes it much easier to move to driver model without duplicating the
code, since with driver model we use platform data rather than global
settings.
The driver is compiled with either the CONFIG_PL010_SERIAL or
CONFIG_PL011_SERIAL option and this determines the uart type. With driver
model this needs to come in from platform data, so create a new
CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the
driver to support both peripheral variants.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Simon Glass [Thu, 2 Oct 2014 01:57:26 +0000 (19:57 -0600)]
dm: imx: gpio: Support driver model in MXC gpio driver
Add driver model support with this driver. In this case the platform data
is in the driver. It would be better to put this into an SOC-specific file,
but this is best attempted when more boards are moved over to use driver
model.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Thu, 2 Oct 2014 14:17:24 +0000 (17:17 +0300)]
arm: mx6: cm_fx6: use gpio request
Use gpio_request for all the gpios that are utilized by various
subsystems in cm-fx6, and refactor the relevant init functions
so that all gpios are requested during board_init(), not during
subsystem init, thus avoiding the need to manage gpio ownership
each time a subsystem is initialized.
The new division of labor is:
During board_init() muxes are setup and gpios are requested.
During subsystem init gpios are toggled.
Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Simon Glass [Thu, 2 Oct 2014 01:57:20 +0000 (19:57 -0600)]
dm: linker_lists: Add a way to declare multiple objects
The existing ll_entry_declare() permits a single element of the list to
be added to a linker list. Sometimes we want to add several objects at
once. To avoid lots of messy declarations, add a macro to support this.
Simon Glass [Tue, 14 Oct 2014 05:42:11 +0000 (23:42 -0600)]
dm: sf: Add tests for SPI flash
Add a simple test for SPI that uses SPI flash. It operates by creating a
SPI flash file and using the 'sf test' command to test that all
operations work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:07 +0000 (23:42 -0600)]
dm: Convert spi_flash_probe() and 'sf probe' to use driver model
We want the SPI flash probing feature to operate as a standard driver.
Add a driver for the basic probing feature used by most boards. This
will be activated by device_probe() as with any other driver.
The 'sf probe' command currently keeps track of the SPI slave that it
last used. This doesn't work with driver model, since some other driver
or system may have probed the device and have access to it too. On the
other hand, if we try to probe a device twice the second probe is a nop
with driver model.
Fix this by searching for the matching device, removing it, and then
probing it again. This should work as expected regardless of other device
activity.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:06 +0000 (23:42 -0600)]
dm: sf: Add a uclass for SPI flash
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.
CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:59 +0000 (23:41 -0600)]
dm: spi: Remove SPI_INIT feature
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.
This feature is not used by any active boards, so let's remove it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
projects / u-boot.git / log