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22 months agomkimage: fit: Support signed configurations in 'auto' FITs
Massimo Pegorer [Thu, 5 Jan 2023 09:31:09 +0000 (10:31 +0100)]
mkimage: fit: Support signed configurations in 'auto' FITs

Extend support for signing in auto-generated (-f auto) FIT. Previously,
it was possible to get signed 'images' subnodes in the FIT using
options -g and -o together with -f auto. This patch allows signing
'configurations' subnodes instead of 'images' ones (which are hashed),
using option -f auto-conf instead of -f auto. Adding also -K <dtb> and
-r options, will add public key to <dtb> file with required = "conf"
property.

Summary:
    -f auto => FIT with crc32 images
    -f auto -g ... -o ... => FIT with signed images
    -f auto-conf -g ... -o ... => FIT with sha1 images and signed confs

Example: FIT with kernel, two device tree files, and signed
configurations; public key (needed to verify signatures) is
added to u-boot.dtb with required = "conf" property.

mkimage -f auto-conf -A arm -O linux -T kernel -C none -a 43e00000 \
        -e 0 -d vmlinuz -b /path/to/first.dtb -b /path/to/second.dtb \
        -k /folder/with/key-files -g keyname -o sha256,rsa4096 \
        -K u-boot.dtb -r kernel.itb

Example: Add public key with required = "conf" property to u-boot.dtb
without needing to sign anything. This will also create a useless FIT
named unused.itb.

mkimage -f auto-conf -d /dev/null -k /folder/with/key-files \
        -g keyname -o sha256,rsa4096 -K u-boot.dtb -r unused.itb

Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agocommon: bouncebuf: Use dma-mapping for cache ops
Andrew Davis [Fri, 6 Jan 2023 18:02:50 +0000 (12:02 -0600)]
common: bouncebuf: Use dma-mapping for cache ops

This matches how this would be done in Linux and these functions
do the alignment for us which makes the code look cleaner.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agoinclude: configs: Update env for selecting right dtb
Sinthu Raja [Tue, 10 Jan 2023 15:47:58 +0000 (21:17 +0530)]
include: configs: Update env for selecting right dtb

Now that single defconfig shall be used for booting J721S2 EVM and
AM68 SK, the default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 months agoarm: dts: k3-am68-sk: Add r5 specific dt support
Sinthu Raja [Tue, 10 Jan 2023 15:47:57 +0000 (21:17 +0530)]
arm: dts: k3-am68-sk: Add r5 specific dt support

Add initial support for AM68 SK device tree that runs on R5.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
22 months agoarm: dts: Add support for A72 specific AM68 Starter Kit Base Board
Sinthu Raja [Tue, 10 Jan 2023 15:47:56 +0000 (21:17 +0530)]
arm: dts: Add support for A72 specific AM68 Starter Kit Base Board

The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
22 months agoarm: dts: Add initial support for AM68 Starter Kit System on Module
Sinthu Raja [Tue, 10 Jan 2023 15:47:55 +0000 (21:17 +0530)]
arm: dts: Add initial support for AM68 Starter Kit System on Module

AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.

        AM68 SK supports the following interfaces:
        * 16 GB LPDDR4 RAM
        * x1 Gigabit Ethernet interface
        * x1 USB 3.1 Type-C port
        * x2 USB 3.1 Type-A ports
        * x1 PCIe M.2 M Key
        * 512 Mbit OSPI flash
        * x2 CSI2 Camera interface (RPi and TI Camera connector)
        * 40-pin Raspberry Pi GPIO header

SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.

Schematics: https://www.ti.com/lit/zip/SPRR463
TRM: http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
22 months agoboard: ti: j721s2: Add board_init and support for selecting DT based on EEPROM
Sinthu Raja [Tue, 10 Jan 2023 15:47:54 +0000 (21:17 +0530)]
board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM

Add the board_init_f API for SPL and run the platform-required SoC
initialization.

Add the functionality for board name-based DTB selection from FIT
within SPL. This will make it easier to utilise one defconfig for
both the EVM and the SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 months agoarch: mach-k3: Update board specific API name to K3 generic API name
Sinthu Raja [Tue, 10 Jan 2023 15:47:53 +0000 (21:17 +0530)]
arch: mach-k3: Update board specific API name to K3 generic API name

Although the board_init_f API initialises the SoC, the API name is
incorrectly specified and misleads the functionality. This file should
only include k3-specific functionality. Change the API's name to something
more K3-specific and separate the function to make it more modular.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 months agoboard: ti: j721s2: Add support for detecting multiple device trees
Sinthu Raja [Tue, 10 Jan 2023 15:47:52 +0000 (21:17 +0530)]
board: ti: j721s2: Add support for detecting multiple device trees

Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.

Also restrict multpile EEPROM reads by verifying if EEPROM is already
read

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 months agoboard: ti: j721s2: Enable support for reading EEPROM at next alternate address
Sinthu Raja [Tue, 10 Jan 2023 15:47:51 +0000 (21:17 +0530)]
board: ti: j721s2: Enable support for reading EEPROM at next alternate address

J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 months agoboard: ti: j721s2: Add support to update board_name for am68-sk
Sinthu Raja [Tue, 10 Jan 2023 15:47:50 +0000 (21:17 +0530)]
board: ti: j721s2: Add support to update board_name for am68-sk

Update setup_board_eeprom_env() to choose the right board name
for am68-sk.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
22 months agoconfigs: j721s2_evm: Enable configs to store env in MMC FAT partition
Sinthu Raja [Tue, 10 Jan 2023 15:47:49 +0000 (21:17 +0530)]
configs: j721s2_evm: Enable configs to store env in MMC FAT partition

J721S2 EVM used to store env on eMMC, since EVM and SK uses same
defconfig and there is no eMMC on SK, we need to keep env in an
interface which available on both EVM and SK. So, save env in FAT
partition of MMC SD Card.

Enable defconfigs relevant for storing env on FAT partition of MMC.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
22 months agoconfigs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT
Sinthu Raja [Tue, 10 Jan 2023 15:47:48 +0000 (21:17 +0530)]
configs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT

Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. Add k3-am68-sk-base-board
dtb along with evm dtb inside DTB FIT image. This helps to use same
defconfig for both EVM and SK

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
22 months agoconfigs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT
Sinthu Raja [Tue, 10 Jan 2023 15:47:47 +0000 (21:17 +0530)]
configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT

Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both EVM and SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
22 months agoMAINTAINERS: add include/power/ to POWER
John Keeping [Thu, 19 Jan 2023 12:55:19 +0000 (12:55 +0000)]
MAINTAINERS: add include/power/ to POWER

Add the related include files to the power MAINTAINERS entry.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agoifwitool: Fix member access
Simon Glass [Wed, 18 Jan 2023 20:13:17 +0000 (13:13 -0700)]
ifwitool: Fix member access

On a second and third look, a recent patch seems to be writing to the
wrong place - updating offsets from the address of the pointer instead
of what the pointer points to.

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2d1b2ac13fe ("tool: ifwitool: Fix buffer overflow")
Acked-by: Sean Anderson <seanga2@gmail.com>
22 months agopinctrl: fix docstring
Michael Walle [Wed, 18 Jan 2023 12:12:24 +0000 (13:12 +0100)]
pinctrl: fix docstring

Fix the copy and paste error.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agopinctrl: get rid of some ifdeffery
Michael Walle [Wed, 18 Jan 2023 12:12:23 +0000 (13:12 +0100)]
pinctrl: get rid of some ifdeffery

Don't define an empty version for pinconfig_post_bind(). Just guard the
call and let the linker garbage collection do the rest. This way, we
also don't have to do any guesswork.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
22 months agopinctrl: don't fall back to pinctrl_select_state_simple()
Michael Walle [Wed, 18 Jan 2023 12:12:22 +0000 (13:12 +0100)]
pinctrl: don't fall back to pinctrl_select_state_simple()

If CONFIG_PINCTRL_FULL is enabled, never fall back to the simple
implementation. pinctrl_select_state() is called for each device and it
is expected to fail. A fallback to the simple imeplementation doesn't
make much sense.

To keep the return code consistent, we need to change the -EINVAL (which
was ignored before) to -ENOSYS.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agoarm: npcm8xx: add security feature header
Jim Liu [Tue, 17 Jan 2023 08:59:23 +0000 (16:59 +0800)]
arm: npcm8xx: add security feature header

The NPCM driver can use on npcm7xx/npcm8xx
so add npcm8xx header for driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
22 months agoARM: config: enable function for nuvoton npcm845 bmc
Jim Liu [Tue, 17 Jan 2023 08:59:22 +0000 (16:59 +0800)]
ARM: config: enable function for nuvoton npcm845 bmc

Enable npcm845 i2c、ethernet、REGULATOR and security feature

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
22 months agoARM: dts: npcm8xx: add npcm845 function node
Jim Liu [Tue, 17 Jan 2023 08:59:21 +0000 (16:59 +0800)]
ARM: dts: npcm8xx: add npcm845 function node

Add functaion node list as below:
1. i2c
2. gmac
3. otp
4. aes
5. sha
6. rng
7. serial

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
22 months agoMerge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 27 Jan 2023 15:15:39 +0000 (10:15 -0500)]
Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings

22 months agofru: ops: Display FRU fields properly for 0xc1 fields
Algapally Santosh Sagar [Wed, 25 Jan 2023 12:06:21 +0000 (13:06 +0100)]
fru: ops: Display FRU fields properly for 0xc1 fields

FRU data is not displayed properly in case of 0xc1 fields.
The 0xC1 can be used in two cases.
1. Char record type 8-bit ASCII + Latin 1 with length of 1.
(For example board revision 'A')

2. C1h (type/length byte encoded to indicate no more info fields).
which can follow by 00h to fill all remaining unused space

Hence removed the check end-of-the field c1 to allow c1 fields.

"ASCII+LATIN1" is defined as the printable characters from the
first set of 256 characters of Unicode 6.2 (U+0000h through U+00FFh,
inclusive) expressed as an eight-bit value. (Unicode follows ISO/IEC
8859-1 in the layout of printable characters up to U+00FFh).

So, print only printable chars and limit range from 0x20 ' ' to 0x7e '-'
which will be also indication if 0xc1 behaves as record with one char or
end of record.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4198d73de600627872c80a5b07e5068502c589d7.1674648379.git.michal.simek@amd.com
22 months agoxilinx: board: Update logic in xilinx_read_eeprom_legacy
Michal Simek [Tue, 24 Jan 2023 15:19:28 +0000 (16:19 +0100)]
xilinx: board: Update logic in xilinx_read_eeprom_legacy

When eeprom has random content printing random chars can stuck U-Boot.
That's why update legacy eeprom format decoding algorithm to copy only
maximum amount of chars allocated for fields.
And also print them directly from desc structure.

Previous algorithm was printing strings first directly from eeprom content
and then copy them to desc structure.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com
22 months agoxilinx: board: Fix xilinx_eeprom_legacy_cleanup()
Michal Simek [Tue, 24 Jan 2023 15:19:27 +0000 (16:19 +0100)]
xilinx: board: Fix xilinx_eeprom_legacy_cleanup()

When ethernet mac address contains 0x20 or 0xff MAC address is changed and
bytes are converted to zeros. That's why fix decoding algorithm to ignore
fields where MAC address is stored and all non printable chars (including
space) are zeroed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com
22 months agoxilinx: board: Use ETH_ALEN macro for mac address size
Michal Simek [Tue, 24 Jan 2023 15:19:26 +0000 (16:19 +0100)]
xilinx: board: Use ETH_ALEN macro for mac address size

Use predefined macro for eth_mac legacy format.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com
22 months agonet: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()
Stefan Roese [Wed, 25 Jan 2023 07:09:08 +0000 (08:09 +0100)]
net: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()

In our system using ZynqMP with an external SGMII PHY it's necessary
to wait for the PCS link and auto negotiation to finish before the xfer
starts. Otherwise the first packet(s) might get dropped, resulting in a
delay at the start of the ethernet transfers.

This is only done when the PHY link is already up, which is done in
phy_startup(). As waiting for the PHY link bits via pcsstatus does not
make much sense, when the link is not available in general (e.g. no
cable connected).

This patch adds the necessary code including a minimal delay of 1 ms
which fixes problems of dropped first packages.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Katakam Harini <harini.katakam@amd.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/20230125070908.1343256-1-sr@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agodrivers: mmc: Change datatype of tuning_loop_counter to int
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:17 +0000 (22:36 -0700)]
drivers: mmc: Change datatype of tuning_loop_counter to int

tuning_loop_counter is of char type, which is not capable of handling
the entire data range of this variable. This is pointed by below sparse
warning. Change datatype to int to fix this.
warning: comparison is always false due to limited range of data type.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-5-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agoxilinx: versal: Add missing header
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:16 +0000 (22:36 -0700)]
xilinx: versal: Add missing header

Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'do_go_exec' [-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agogpio: zynqmp: Handle error from get_gpio_modepin
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:15 +0000 (22:36 -0700)]
gpio: zynqmp: Handle error from get_gpio_modepin

There is a unused variable ret, due to which we are getting sparse warning
as below.
warning: variable 'ret' set but not used [-Wunused-but-set-variable].

Return ret incase of error.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agoxilinx: common: Include header file to fix warning
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:14 +0000 (22:36 -0700)]
xilinx: common: Include header file to fix warning

Prototype is missing for board_get_usable_ram_top, which is pointed by
below sparse warning. Include init.h header file to fix this.

warning: no previous prototype for 'board_get_usable_ram_top'
[-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agoarm64: versal-net: Enable remaking ELF from bin
Michal Simek [Thu, 19 Jan 2023 09:46:59 +0000 (10:46 +0100)]
arm64: versal-net: Enable remaking ELF from bin

U-Boot is composing u-boot.bin from u-boot-nodtb.bin with appended
dts/dt.dtb. It means U-Boot doesn't have DTB inside. When REMAKE_ELF is
enabled make will also create u-boot.elf which is recreated from
u-boot.bin. Below is build output for mini configuration how ELF is
recreated.

cat arch/arm/dts/versal-net-mini.dtb > dts/dt.dtb
cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
cp dts/dt.dtb u-boot.dtb
cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64
 u-boot.bin u-boot-elf.o
aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf -EL -T u-boot-elf.lds
 --defsym="_start"=0xBBF00000 -Ttext=0xBBF00000

It is useful to have u-boot.elf present because Xilinx XSDB debugger can
load ELF file and user doesn't need to specify loading address for
u-boot.bin.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ca550c5c4bf908e757a49a83fdfab0e7100de45e.1674121617.git.michal.simek@amd.com
22 months agomicroblaze: spl: disable falcon mode by default
Ovidiu Panait [Wed, 25 Jan 2023 16:41:57 +0000 (18:41 +0200)]
microblaze: spl: disable falcon mode by default

Drop falcon mode configs from microblaze-generic_defconfig, so that a
defconfig build will still boot into u-boot proper.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agomicroblaze: spl: drop boot_linux
Ovidiu Panait [Wed, 25 Jan 2023 16:41:56 +0000 (18:41 +0200)]
microblaze: spl: drop boot_linux

Drop boot_linux variable as it is not assigned anywhere. Now that there is
no variable controlling linux boot in spl_start_uboot(), make this
function always return false when falcon mode is enabled.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agomicroblaze: spl: wrap spl_start_uboot() in SPL_OS_BOOT ifdefs
Ovidiu Panait [Wed, 25 Jan 2023 16:41:55 +0000 (18:41 +0200)]
microblaze: spl: wrap spl_start_uboot() in SPL_OS_BOOT ifdefs

Make spl_start_uboot() available only if CONFIG_SPL_OS_BOOT is enabled,
since it is only used for falcon mode.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
22 months agoMerge tag 'dm-pull-26jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Fri, 27 Jan 2023 02:57:38 +0000 (21:57 -0500)]
Merge tag 'dm-pull-26jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm

FIT improvements with split-elf, especially for Rockchip
Binman positioning by ELF symbol

22 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Thu, 26 Jan 2023 18:07:06 +0000 (13:07 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-spi

- fix return code of sf command (Heinrich)
- fix register reads in STIG Mode (Dhruva)
- Infineon s25fs256t support (Takahiro)

22 months agobinman: Fix a test-coverage regression
Simon Glass [Mon, 23 Jan 2023 18:29:41 +0000 (11:29 -0700)]
binman: Fix a test-coverage regression

Unfortunately a recent patch snuck through without the require test
coverage. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 571bc4e67d3 ("binman: Support positioning an entry by and ELF symbol")
22 months agodm: core: Use full printf() format when possible
Samuel Holland [Sat, 21 Jan 2023 23:30:12 +0000 (17:30 -0600)]
dm: core: Use full printf() format when possible

Use a more accurate check for determining if the full format string will
be handled correctly, since SPL_USE_TINY_PRINTF can be disabled.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agobinman: Add 'min-size' entry property
Samuel Holland [Sat, 21 Jan 2023 23:25:16 +0000 (17:25 -0600)]
binman: Add 'min-size' entry property

This property sets the minimum size of an entry, including padding but
not alignment. It can be used to reserve space for growth of an entry,
or to enforce a minimum offset for later entries in the section.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agorockchip: Use atf as firmware and move u-boot to loadables in FIT
Jonas Karlman [Sat, 21 Jan 2023 19:02:26 +0000 (19:02 +0000)]
rockchip: Use atf as firmware and move u-boot to loadables in FIT

The FIT generated after the switch to using binman is using different
values for firmware and loadables properties compared to the old script.

With the old script:
 firmware = "atf-1";
 loadables = "u-boot", "atf-2", ...;

After switch to binman:
 firmware = "u-boot";
 loadables = "atf-1", "atf-2", ...;

This change result in SPL jumping directly into U-Boot proper instead of
initializing TF-A.

With this patch the properties change back to:
 firmware = "atf-1";
 loatables = "u-boot", "atf-2", ...;

Fixes: e0c0efff2a02 ("rockchip: Support building the all output files in binman")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agobinman: Add support for selecting firmware to use with split-elf
Jonas Karlman [Sat, 21 Jan 2023 19:02:12 +0000 (19:02 +0000)]
binman: Add support for selecting firmware to use with split-elf

In some cases it is desired for SPL to start TF-A instead of U-Boot
proper. Add support for a new property fit,firmware that picks a
valid entry and prepends the remaining valid entries to the
loadables list generated by the split-elf generator.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agorockchip: Add sha256 hash to FIT images
Jonas Karlman [Sat, 21 Jan 2023 19:01:59 +0000 (19:01 +0000)]
rockchip: Add sha256 hash to FIT images

Add sha256 hash to FIT images when CONFIG_SPL_FIT_SIGNATURE=y.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agobinman: Add special subnodes to the nodes generated by split-elf
Jonas Karlman [Sat, 21 Jan 2023 19:01:48 +0000 (19:01 +0000)]
binman: Add special subnodes to the nodes generated by split-elf

Special nodes, hash and signature, is not being added to the nodes
generated for each segment in split-elf operation.

Copy the subnode logic used in _gen_fdt_nodes to _gen_split_elf to
ensure special nodes are added to the generated nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agorockchip: Align FIT image data to SD/MMC block length
Jonas Karlman [Sat, 21 Jan 2023 19:01:39 +0000 (19:01 +0000)]
rockchip: Align FIT image data to SD/MMC block length

SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.

This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.

However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.

Aligning the FIT and its external data to MMC block length to work
around such issue.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agobinman: Add support for align argument to mkimage tool
Jonas Karlman [Sat, 21 Jan 2023 19:01:39 +0000 (19:01 +0000)]
binman: Add support for align argument to mkimage tool

Add support to indicate what alignment to use for the FIT and its
external data. Pass the alignment to mkimage via the -B flag.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
22 months agomtd: spi-nor: Add support for Infineon s25fs256t
Takahiro Kuwano [Mon, 19 Dec 2022 01:28:21 +0000 (10:28 +0900)]
mtd: spi-nor: Add support for Infineon s25fs256t

Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
  - 4-byte address mode by factory default
  - Quad mode is enabled by factory default
  - Supports mixture of 128KB and 64KB sectors by OTP configuration
    (this patch supports uniform 128KB only)

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agomtd: spi-nor: Rename s25hx_t prefix
Takahiro Kuwano [Mon, 19 Dec 2022 01:28:20 +0000 (10:28 +0900)]
mtd: spi-nor: Rename s25hx_t prefix

Rename s25hx_t prefix to s25 so that the single set of fixup hooks can
support all other S25 families.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agocmd: fix return code of 'sf erase'
Heinrich Schuchardt [Mon, 2 Jan 2023 17:21:16 +0000 (18:21 +0100)]
cmd: fix return code of 'sf erase'

If the offset or the size passed to the 'sf erase' command exceeds
the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.

Use the CMD_RET_* constants instead of 0, 1, -1.

Simplify a logical expression in the final return statement.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agocmd: simplify do_spi_flash()
Heinrich Schuchardt [Mon, 2 Jan 2023 17:21:15 +0000 (18:21 +0100)]
cmd: simplify do_spi_flash()

CMD_RET_USAGE == -1. The special handling of this value at the end of
do_spi_flash() does not make any sense.

To avoid future confusion use the CMD_RET_* constants and simplify the
code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agocmd: fix return code of 'sf write' and 'sf read'
Heinrich Schuchardt [Mon, 2 Jan 2023 17:21:14 +0000 (18:21 +0100)]
cmd: fix return code of 'sf write' and 'sf read'

If the offset or the size passed to the 'sf write' or 'sf read' command
exceeds the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.

Use the CMD_RET_* constants instead of 0, 1, -1.

Simplify a logical expression in the final return statement.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agospi: cadence_qspi: use STIG mode for small reads
Dhruva Gole [Tue, 3 Jan 2023 06:31:12 +0000 (12:01 +0530)]
spi: cadence_qspi: use STIG mode for small reads

Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.

For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
which provides access to external Flash devices.

The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for
OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit
mode enabled by default.

Thus, by default controller operates in 32 bit mode causing it to always
align all data to 4 bytes from a 4byte aligned address. In some flash
chips like cypress for example if we try to read some regs in DAC mode
then it keeps sending the value of the first register that was requested
and inorder to read the next reg, we have to stop and re-initiate a new
transaction.

This causes wrong register values to be read than what is desired when
registers are read in DAC mode. Hence if the data.nbytes is very less
then prefer STIG mode for such small reads.

[0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf

Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
[jagan: add tab space for comments]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agospi: cadence_qspi: setup ADDR Bits in cmd reads
Dhruva Gole [Tue, 3 Jan 2023 06:31:11 +0000 (12:01 +0530)]
spi: cadence_qspi: setup ADDR Bits in cmd reads

Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read correct data from flash register that maybe requested by flash
driver because the controller doesn't even specify which address of the
flash register the read is being requested from.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agomtd: spi-nor-core: Make CFRx reg fields generic
Takahiro Kuwano [Fri, 20 Jan 2023 03:28:22 +0000 (12:28 +0900)]
mtd: spi-nor-core: Make CFRx reg fields generic

Cypress defines two flavors of configuration registers, volatile and
non volatile, and both use the same bit fields. Rename the bitfields in
the configuration registers so that they can be used for both flavors.

Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agomtd: spi-nor-core: Consider reserved bits in CFR5 register
Takahiro Kuwano [Fri, 20 Jan 2023 03:28:21 +0000 (12:28 +0900)]
mtd: spi-nor-core: Consider reserved bits in CFR5 register

CFR5[6] is reserved bit and must be always 1. Set it to comply with flash
requirements. While fixing SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN definition,
stop using magic numbers and describe the missing bit fields in CFR5
register. This is useful for both readability and future possible addition
of Octal STR mode support.

Fixes: ea9a22f7e79c ("mtd: spi-nor-core: Add support for Cypress Semper flash")
Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Thu, 26 Jan 2023 15:24:13 +0000 (10:24 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- marvell: a38x: Add support for DDR4 (Tony)
- kirkwood: Use Kirkwood common early malloc (Tony)

22 months agospi: Add Socionext F_OSPI SPI flash controller driver
Kunihiko Hayashi [Tue, 29 Nov 2022 02:17:09 +0000 (11:17 +0900)]
spi: Add Socionext F_OSPI SPI flash controller driver

Introduce Socionext F_OSPI controller driver. This controller is used to
communicate with slave devices such as SPI flash memories. It supports
4 slave devices and up to 8-bit wide bus, but supports master mode only.

This driver uses spi-mem framework for SPI flash memory access, and
can only operate indirect access mode and single data rate mode.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agodrivers: spi: sh_qspi.c: Use log_warning() instead of printf()
Pengfei Fan [Fri, 9 Dec 2022 01:39:51 +0000 (09:39 +0800)]
drivers: spi: sh_qspi.c: Use log_warning() instead of printf()

Use log_warning() instead of printf() to print out driver information

Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agodrivers: spi: fix some typos
Pengfei Fan [Fri, 9 Dec 2022 01:39:50 +0000 (09:39 +0800)]
drivers: spi: fix some typos

Fix some typos in spi drivers

Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
22 months agoarm: kirkwood: Use Kirkwood common early malloc area for various Kirkwood boards
Tony Dinh [Mon, 23 Jan 2023 08:39:34 +0000 (00:39 -0800)]
arm: kirkwood: Use Kirkwood common early malloc area for various Kirkwood boards

For Kirkwood boards, it is necessary to have early malloc in DRAM area
when Driver Model for Serial is enabled. This patch removes individual
board settings for early malloc in various Kirkwood boards, and uses the
Kirkwood commonly defined settings in arch/arm/mach-kirkwood/Kconfig.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
22 months agoddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repository
Tony Dinh [Thu, 19 Jan 2023 03:03:04 +0000 (19:03 -0800)]
ddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repository

This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git

up to the commit "mv_ddr: a3700: Use the right size for memset to not overflow"
d5acc10c287e40cc2feeb28710b92e45c93c702c

This patch was created by following steps:

1. Replace all a38x files in U-Boot tree by files from upstream github
Marvell mv-ddr-marvell repository.

2. Run following command to omit portions not relevant for a38x, ddr3, and ddr4:

files=drivers/ddr/marvell/a38x/*
unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_APN806 \
-UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \
-UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DCONFIG_ARMADA_38X -UCONFIG_ARMADA_39X \
-UCONFIG_64BIT $files

3. Manually change license to SPDX-License-Identifier
(upstream license in  upstream github repository contains long license
texts and U-Boot is using just SPDX-License-Identifier.

After applying this patch, a38x, ddr3, and ddr4 code in upstream Marvell github
repository and in U-Boot would be fully identical. So in future applying
above steps could be used to sync code again.

The only change in this patch are:
1. Some fixes with include files.
2. Some function return and basic type defines changes in
mv_ddr_plat.c (to correct Marvell bug).
3. Remove of dead code in newly copied files (as a result of the
filter script stripping out everything other than a38x, dd3, and ddr4).

Reference:
    "ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository"
    https://source.denx.de/u-boot/u-boot/-/commit/107c3391b95bcc2ba09a876da4fa0c31b6c1e460

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
22 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Wed, 25 Jan 2023 02:07:01 +0000 (21:07 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi

This contains some fixes, and the first bunch of some clean up patches
to get rid of legacy GPIO and PMIC code.
Highlight is the DM AXP PMIC driver, which is required to convert some
drivers over to use DM regulators, and also is required to get rid
of some less optimal PMIC setup code in Trusted Firmware. This isn't
enabled by any defconfig yet, but can be enabled manually and works. For
the full glory some patches are still missing, and this requires more
testing, which would be simpler if the core code is upstream.

22 months agoMerge branch '2023-01-24-bootstd-allow-migration-from-distro_bootcmd-script'
Tom Rini [Tue, 24 Jan 2023 19:04:14 +0000 (14:04 -0500)]
Merge branch '2023-01-24-bootstd-allow-migration-from-distro_bootcmd-script'

To quote the author:
So far, standard boot does not replicate all the of the functionality
of the distro_bootcmd scripts. In particular it lacks some bootdevs and
some of the bootmeths are incomplete.

Also there is currently no internal mechanism to enumerate buses in order
to discover bootdevs, e.g. with USB.

This series addresses these shortcomings:

- Adds the concept of a 'bootdev hunter' to enumerate buses, etc. in an
  effort to find bootdevs of a certain priority
- Adds bootdevs for SCSI, IDE, NVMe, virtio, SPI flash
- Handles PXE and DHCP properly
- Supports reading the device tree with EFI and reading scripts from the
  network

It also tidies up label processing, so it is possible to use:

   bootflow scan mmc2

to scan just one MMC device (with BOOTSTD_FULL).

As before this implementation still relies on CONFIG_CMDLINE being
enabled, mostly for the network stack. Further work would be required to
disentangle that.

Quite a few tests are added but there are some gaps:

- SPI flash bootdev
- EFI FDT loading

Note that SATA works via SCSI (CONFIG_SCSI_AHCI) and does not use
driver model. Only pogo_v4 seems to be affected. Probably all thats is
needed is to call bootdev_setup_sibling_blk() in the Marvell SATA driver.

Also, while it would be possible to init MMC in a bootdev hunter, there is
no point since U-Boot always inits MMC on startup, if present.

With this series it should be possible to migrate boards to standard boot
by removing the inclusion of config_distro_bootcmd.h and instead adding
a suitable value for boot_targets to the environment, e.g.:

   boot_targets=mmc1 mmc0 nvme scsi usb pxe dhcp spi

Thus it is possible to boot automatically without scripts and boards can
use a text-based environment instead of the config.h files.

To demonstrate this, rockpro64-rk3399 is migrated to standard boot in this
series. Full migration could probably be automated using a script, similar
in concept to moveconfig:

   - obtain the board environment via 'make u-boot-initial-env'
   - get the value of "boot_targets"
   - drop config_distro_bootcmd.h from the config.h file
   - rebuild again to get the environment without distro scripts
   - write the environment (adding boot_targets) to board.env
   - remove CONFIG_EXTRA_ENV_SETTINGS from the config.h file

22 months agoarm64: zynqmp: Add support for Kria K24 SOM
Michal Simek [Wed, 18 Jan 2023 12:11:59 +0000 (13:11 +0100)]
arm64: zynqmp: Add support for Kria K24 SOM

SOM itself from PS point of view is using the same configuration as K26
that's why reuse that files and only change compatible strings.

The reason for creating own set of files is just in case when versions
start to diverge because of HW change, supply chain issue, etc.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61f877ec0b480c5bd368a1211fc73ff7465016bd.1674043915.git.michal.simek@amd.com
22 months agoarm64: zynqmp: Fill model name for SOM CCs
Michal Simek [Wed, 18 Jan 2023 12:04:14 +0000 (13:04 +0100)]
arm64: zynqmp: Fill model name for SOM CCs

When U-Boot do DTB reselection origin model for SOM is used and from log it
is not visible if DTB was switched or not. That's why add model directly to
CC (carrier card) to show new model if reselection was successful.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/49ba1007218496c48d287454e84a5b8c08abc692.1674043452.git.michal.simek@amd.com
22 months agoarm64: versal: Remove xilinx_versal_mini_qspi.h configs
Michal Simek [Wed, 18 Jan 2023 11:26:43 +0000 (12:26 +0100)]
arm64: versal: Remove xilinx_versal_mini_qspi.h configs

The commit eaf6ea6a1dc1 ("Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using
system-constants.h") moved custom init stack pointer address to Kconfig
which ends up in situation that xilinx_versal_mini_qspi.h is not
needed anymore. That's why remove the file and move defconfigs directly to
xilinx_versal_mini.h configuration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2d7276ab8d4cb1d245b64287fb59c79325513f22.1674041200.git.michal.simek@amd.com
22 months agoarm64: zynqmp: Remove xilinx_zynqmp_mini_emmc/qspi.h configs
Michal Simek [Wed, 18 Jan 2023 11:12:57 +0000 (12:12 +0100)]
arm64: zynqmp: Remove xilinx_zynqmp_mini_emmc/qspi.h configs

The commit eaf6ea6a1dc1 ("Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using
system-constants.h") moved custom init stack pointer address to Kconfig
which ends up in situation that xilinx_zynqmp_mini_emmc/qspi.h are not
needed anymore. That's why remove files and move defconfigs directly to
xilinx_zynqmp_mini.h configuration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61ae40cf63aabd08adb386c870d3392b0b606fc9.1674040373.git.michal.simek@amd.com
22 months agosoc: zynqmp: Fix IDcode for xck24
Michal Simek [Wed, 18 Jan 2023 08:25:26 +0000 (09:25 +0100)]
soc: zynqmp: Fix IDcode for xck24

ID code was added by commit ddf8deabc39d ("arm64: zynqmp: Add support for
SVD devices") based on documentation but after receiving part new ID code
came up. That's why fix IDcode to match xck24 module.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7b39aeeec211458ba4132a10beb7ad295eedb87f.1674030324.git.michal.simek@amd.com
23 months agorockchip: Convert rockpro64-rk3399 to use standard boot
Simon Glass [Tue, 17 Jan 2023 17:48:20 +0000 (10:48 -0700)]
rockchip: Convert rockpro64-rk3399 to use standard boot

Drop the use of scripts and rely on standard boot for all operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agobootstd: Update documentation for new features
Simon Glass [Tue, 17 Jan 2023 17:48:19 +0000 (10:48 -0700)]
bootstd: Update documentation for new features

Document the hunters and the new way that iteration works.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Add a little more logging of bootflows
Simon Glass [Tue, 17 Jan 2023 17:48:18 +0000 (10:48 -0700)]
bootstd: Add a little more logging of bootflows

Add some logging to aid debugging of problems with bootflows.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Record the bootdevs used during scanning
Simon Glass [Tue, 17 Jan 2023 17:48:17 +0000 (10:48 -0700)]
bootstd: Record the bootdevs used during scanning

Add a way to record the bootdevs used when scanning for bootflows. This is
useful for testing.

Enable this only with BOOTSTD_FULL and do the same for the progress
reporting.

Re-enable and update the affected tests now that we have this feature.

For bootdev_test_order_default() there is no-longer any support for using
the bootdev aliases to specify an ordering, so drop that part of the test.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Drop the old bootflow_scan_first()
Simon Glass [Tue, 17 Jan 2023 17:48:16 +0000 (10:48 -0700)]
bootstd: Drop the old bootflow_scan_first()

This function is not used outside tests. Drop it and rename
bootflow_scan_dev() since it is how we start a scan now.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Allow scanning a single bootdev label
Simon Glass [Tue, 17 Jan 2023 17:48:15 +0000 (10:48 -0700)]
bootstd: Allow scanning a single bootdev label

We want to support scanning a single label, like 'mmc' or 'usb0'. Add
this feature by plumbing the label through to the iterator, setting a
flag to indicate that only siblings of the initial device should be used.

This means that scanning a bootdev by its name is not supported anymore.
That feature doesn't seem very useful in practice, so it is no great loss.

Add a test for bootdev_find_by_any() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Switch bootdev scanning to use labels
Simon Glass [Tue, 17 Jan 2023 17:48:14 +0000 (10:48 -0700)]
bootstd: Switch bootdev scanning to use labels

At present we set up the bootdev order at the start, then scan the
bootdevs one by one.

However this approach cannot be used with hunters, since the bootdevs may
not exist until the hunter is used. Nor can we just run all the hunters at
the start, since that violate's U-Boot's 'lazy init' requirement. It also
increases boot time.

So we need to adjust the algorithm to scan by labels instead. As a first
step, drop the dev_order[] array in favour of a list of labels. Update the
name of bootdev_setup_iter_order() to better reflect what it does.

Update some related comments and log messages. Also disable a few tests
until a later commit where we can use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Add a hunter for the extension feature
Simon Glass [Tue, 17 Jan 2023 17:48:13 +0000 (10:48 -0700)]
bootstd: Add a hunter for the extension feature

This needs to run before any bootdev is used, so add a hunter for it.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agoextension: Refactor to allow non-command usage
Simon Glass [Tue, 17 Jan 2023 17:48:12 +0000 (10:48 -0700)]
extension: Refactor to allow non-command usage

The current extension code is designed to be used from commands. We want
to add a boot driver which uses it. To help with this, split the code into
the command processing and a function which actually does the scan.

Really the extension code should be in common/ or use driver model, but
this is a start.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Allow iterating to the next bootdev priortiy
Simon Glass [Tue, 17 Jan 2023 17:48:11 +0000 (10:48 -0700)]
bootstd: Allow iterating to the next bootdev priortiy

Add a function which moves to the next priority to be processed.

This works by storing the current priority in the bootflow iterator. The
logic to set this up is included in a subsequent commit.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Allow iterating to the next label in a list
Simon Glass [Tue, 17 Jan 2023 17:48:10 +0000 (10:48 -0700)]
bootstd: Allow iterating to the next label in a list

Add a function which moves to the next label in a list of labels. This
allows processing the boot_targets environment variable.

This works using a new label list in the bootflow iterator. The logic to
set this up is included in a subsequent commit.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Allow hunting for a bootdev by label
Simon Glass [Tue, 17 Jan 2023 17:48:09 +0000 (10:48 -0700)]
bootstd: Allow hunting for a bootdev by label

Add a function to hunt for a bootdev label and find the bootdev produced
by the hunter (or already present).

Add a few extra flags so that we can distinguish between "mmc1", "mmc" and
"1" which all need to be handled differently.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Add a new pre-scan priority for bootdevs
Simon Glass [Tue, 17 Jan 2023 17:48:08 +0000 (10:48 -0700)]
bootstd: Add a new pre-scan priority for bootdevs

We need extensions to be set up before we start trying to boot any of the
bootdevs. Add a new priority before all the others for tht sort of thing.
Also add a 'none' option, so that the first one is not 0.

While we are here, comment enum bootdev_prio_t fully and expand the test
for the 'bootdev hunt' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Allow hunting for bootdevs of a given priority
Simon Glass [Tue, 17 Jan 2023 17:48:07 +0000 (10:48 -0700)]
bootstd: Allow hunting for bootdevs of a given priority

Add a way to run the hunter function for a particular priority, so that
new bootdevs can be found.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Use hunters when scanning for bootflows
Simon Glass [Tue, 17 Jan 2023 17:48:06 +0000 (10:48 -0700)]
bootstd: Use hunters when scanning for bootflows

Add a flag to control whether hunters are used when scanning for
bootflows. Enable it by default and tidy up the flag comments a little.

Fow now this has no effect, until a future patch enables this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Treat DHCP and PXE as bootdev labels
Simon Glass [Tue, 17 Jan 2023 17:48:05 +0000 (10:48 -0700)]
bootstd: Treat DHCP and PXE as bootdev labels

These are associated with the ethernet boot device but do not match its
uclass name, so handle them as special cases.

Provide a way to pass flags through with the bootdev so that we know
how to process it. The flags are checked by the bootmeths, to ensure that
only the selected bootmeth is used.

While these both use the network device, they work quite differently. It
is common to run only one of these, or to run PXE before DHCP. Provide
bootflow flags to control which methods are used. Check these in the two
bootmeths so that only the chosen one is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Support reading a script from network or SPI flash
Simon Glass [Tue, 17 Jan 2023 17:48:04 +0000 (10:48 -0700)]
bootstd: Support reading a script from network or SPI flash

At present this bootmeth only supports a block device and the sandbox
host filesystem. Add support for obtaining the script from a network
device. Also implement the set_bootflow() method so that it is easy
for other bootdevs (such as enabling SPI flash to support scripts).

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Add a SPI flash bootdev
Simon Glass [Tue, 17 Jan 2023 17:48:03 +0000 (10:48 -0700)]
bootstd: Add a SPI flash bootdev

Add a bootdev for SPI flash so that these devices can be used with
standard boot. It only supports loading a script.

Add a special case for the label, since we want to use "spi", not
"spi_flash".

Enable the new bootdev on sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agosandbox: Allow SPI flash bootdevs to be disabled for tests
Simon Glass [Tue, 17 Jan 2023 17:48:02 +0000 (10:48 -0700)]
sandbox: Allow SPI flash bootdevs to be disabled for tests

Most tests don't want these and they can create a lot of noise. Add a way
to disable them. Use that in tests, with a flag provided to enable them
for tests that need this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Add a new bootmeth method to set the bootflow
Simon Glass [Tue, 17 Jan 2023 17:48:01 +0000 (10:48 -0700)]
bootstd: Add a new bootmeth method to set the bootflow

Normally the bootmeth driver reads the bootflow from the bootdev, since
it knows the correct way to do it.

However it is easier for some bootdevs to handle this themselves. For
example, reading from SPI flash is quite different from other devices.

Add a way for the bootdev to pass a bootflow to the bootmeth, so that
this can be supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Move label parsing into its own function
Simon Glass [Tue, 17 Jan 2023 17:48:00 +0000 (10:48 -0700)]
bootstd: Move label parsing into its own function

This is complicated enough to merit its own function, particularly as we
are about to add to it. Create a new label_to_uclass() function to decode
a label.

Also update the code to ignore an empty label or one consisting of just a
number.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Update docs on bootmeth_try_file() for sandbox
Simon Glass [Tue, 17 Jan 2023 17:47:59 +0000 (10:47 -0700)]
bootstd: Update docs on bootmeth_try_file() for sandbox

Mention that this function is also used with a NULL block devices to
access files on the host, when using sandbox.

Update the comment on struct bootflow also.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Set the distro_bootpart env var with scripts
Simon Glass [Tue, 17 Jan 2023 17:47:58 +0000 (10:47 -0700)]
bootstd: Set the distro_bootpart env var with scripts

This environment variable is supposed to be set so that the script knows
which partition holds the script. Set it before invoking the script.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Support reading the device tree with EFI
Simon Glass [Tue, 17 Jan 2023 17:47:57 +0000 (10:47 -0700)]
bootstd: Support reading the device tree with EFI

With EFI booting the device tree is required but is not actually specified
in any way. The normal method is to use a fdtfile environment variable to
get the filename, then look for that file on the media.

Implement this in the bootmeth.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Include the device tree in the bootflow
Simon Glass [Tue, 17 Jan 2023 17:47:56 +0000 (10:47 -0700)]
bootstd: Include the device tree in the bootflow

Some bootmeths provide a way to load a device tree as well as the base
OS image. Add a way to store this in the bootflow. Update the
'bootflow info' command to show this information.

Note that the device tree is not allocated, but instead is stored at
an address provided by an environment variable. This may need to be
adjusted at some point, but for now it works well and fits in with the
existing distro-boot scripts.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Allow reading an EFI file from the network
Simon Glass [Tue, 17 Jan 2023 17:47:55 +0000 (10:47 -0700)]
bootstd: Allow reading an EFI file from the network

At present this bootmeth only supports reading from a filesystem. Add
support for reading from a network also, using DHCP with autoload.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Rename bootdev checkers
Simon Glass [Tue, 17 Jan 2023 17:47:54 +0000 (10:47 -0700)]
bootstd: Rename bootdev checkers

These functions return 0 if the check passes, so the names are somewhat
confusing. Rename them.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agoata: Don't try to use non-existent ports
Simon Glass [Tue, 17 Jan 2023 17:47:53 +0000 (10:47 -0700)]
ata: Don't try to use non-existent ports

The controller indicates the number of ports but also has a port map
which specifies which ports are actually valid. Make use of this to
avoid trying to send commands to an invalid port.

This avoids a crash on some controllers.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agobootstd: Add a virtio bootdev
Simon Glass [Tue, 17 Jan 2023 17:47:52 +0000 (10:47 -0700)]
bootstd: Add a virtio bootdev

Add a bootdev for virtio so that these devices can be used with standard
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agovirtio: Add a block device
Simon Glass [Tue, 17 Jan 2023 17:47:51 +0000 (10:47 -0700)]
virtio: Add a block device

The test code for virtio is fairly simplistic and does not actually create
a block device. Add a way to specify the device type in the device tree.
Add a block device so that we can do more testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
23 months agovirtio: Avoid strange behaviour on removal
Simon Glass [Tue, 17 Jan 2023 17:47:50 +0000 (10:47 -0700)]
virtio: Avoid strange behaviour on removal

This device does a check on removal which is better handled in the actual
test. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>