Stefan Roese [Thu, 23 Jul 2020 14:34:10 +0000 (16:34 +0200)]
pci: pci-uclass: Dynamically allocate the PCI regions
Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.
Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Stefan Roese [Thu, 6 Aug 2020 15:49:49 +0000 (17:49 +0200)]
ARM: renesas: Drop unnecessary function ft_board_setup()
Marek explained on IRC, that ft_board_setup() is not used / necessary
at all. So its best to just drop it completely, as it interferes with
the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed).
Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Thu, 23 Jul 2020 14:26:07 +0000 (16:26 +0200)]
pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Mon, 24 Aug 2020 13:06:02 +0000 (09:06 -0400)]
Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Add CCF clocks definitions for iMX6Q enet (ETH)
- Several fixes for CCF framework - the most notable is the one, which
adds get_rate helper to clk-mux.c
- Improvements for clk command - better visibility and alignment.
Dario Binacchi [Wed, 3 Jun 2020 13:36:25 +0000 (15:36 +0200)]
clk: ccf: mux: change the get_rate helper
The previous version of the get_rate helper does not work if the mux
clock parent is changed after the probe. This error has not been
detected because this condition has not been tested. The error occurs
because the set_parent helper does not change the parent of the clock
device but only the clock selection register. Since changing the parent
of a probed device can be tricky, the new version of the get_rate helper
provides the rate of the selected clock and not that of the parent.
Dario Binacchi [Sat, 2 May 2020 15:58:33 +0000 (17:58 +0200)]
clk: ccf: mux: fix access to the sandbox register
The tests developed for the mux clock are run on the sandbox. They don't
call the clk_mux_set_parent routine and therefore they do not detect
this error.
The top-level framework flags are passed as parameter to the common
clock framework (ccf) registration routines without being used.
Checks of the flags setting added by the patch have been added in the
ccf test.
dm: test: clk: add the test for the ccf gated clock
Unlike the other clock types, in the case of the gated clock, a new
driver has been developed which does not use the registering routine
provided by the common clock framework.
The addition of the ecspi0 clock to sandbox therefore allows testing
the ccf gate clock.
Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Mon, 24 Feb 2020 13:55:26 +0000 (14:55 +0100)]
clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock
After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF need
to provide PTP clock.
On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux
kernel's CCF.
Code in this change models the simplest case when enet reference clock is
generated from 'osc' clock.
Lukasz Majewski [Mon, 24 Feb 2020 13:55:24 +0000 (14:55 +0100)]
clk: imx6: Add definition for IMX6QDL_CLK_ENET clock
After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF
need to provide IMX6QDL_CLK_ENET.
This change defines the missing clock in i.MX6Q's CCF.
Ovidiu Panait [Mon, 17 Aug 2020 18:27:51 +0000 (21:27 +0300)]
sandbox: u-boot.lds: Remove bogus __bss_start symbol
The sections described in the sandbox linker script are inserted before
data section via "INSERT BEFORE .data;". Running readelf -S on sandbox
u-boot binary shows that the bss section is located after the data
section:
This means that the __bss_start assignment in the linker script is bogus,
as the actual bss section start is located elsewhere. Remove this
assignment, as the __bss_start symbol is not used on sandbox anyway.
Ovidiu Panait [Mon, 17 Aug 2020 18:27:50 +0000 (21:27 +0300)]
board_f: Remove dead code from init_func_i2c
Since commit 69153988a6f4 ("i2c: Finish dropping use of CONFIG_I2C_HARD")
init_func_i2c is wrapped only by "#if defined(CONFIG_SYS_I2C)". Because
of this, the second ifdef within becomes pointless:
Simon Glass [Wed, 5 Aug 2020 19:27:46 +0000 (13:27 -0600)]
binman: Move GetEntryModules() to control
When binman is installed its main program is in a different directory
to its modules. This means that __file__ is different and we cannot use
it to obtain the path to etype/ from main.py
To fix this, move the function to the 'control' module, since it is
installed with all the other modules, including the etype/ directory.
Masahiro Yamada [Tue, 4 Aug 2020 05:14:43 +0000 (14:14 +0900)]
treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.
To generate this commit, I ran the following semantic patch
excluding include/dm/.
Ovidiu Panait [Mon, 3 Aug 2020 19:17:35 +0000 (22:17 +0300)]
dm: core: Fix devfdt_get_addr_ptr return value
According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.
Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking (void *)FDT_ADDR_T_NONE to check for NULL.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add documentation in doc/drivel-model for the bind/unbind command.
Part of this documentation is extracted from original patch commit
message:
commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a driver from the command line")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
As bind-test is now binded at sandbox startup and no more by
test_bind.py, bind-test nodes are not located at the end of
"dm tree" output, but can be located everywhere in the tree, so
bind-test output could either be:
sandbox: dts: Add compatible string for bind-test node
Usage of lists_bind_fdt() in bind command imposes to add
a compatible string for bind-test node.
Others impacts are:
- bind-test node is binded at sandbox start, so no need to bind it
in test_bind_unbind_with_node() test.
- As explained just above, after sandbox start, now a phy exist.
In test/dm/phy.c, it was verified that a third phy didn't exist,
now we must verified that a fourth phy doesn't exist.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data
This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
In sandbox_phy_bind() a check is added to validate driver_data
content.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Initial implementation invokes device_bind_with_driver_data()
with driver_data parameter equal to 0.
For driver with driver data, the bind command can't bind
correctly this driver or even worse causes data abort as shown below:
As example, for debug purpose on STM32MP1 platform, ethernet
(dwc_eth_qos.c) driver needed to be unbinded/binded.
This driver is using driver data:
In the case of the live tree ofnode_read_addr_cells() and
ofnode_read_size_cells() return the #address-cells and #size-cells defined
in the parent node. With the patch the same is done for a non-live tree.
The only consumer of these functions is currently the CFI flash driver.
This patch fixes the incorrect parsing of the device tree leading to
'saveenv' failing on qemu_arm64_defconfig.
For testing qemu-system-aarch64 has to be called with
Michal Simek [Thu, 23 Jul 2020 07:24:06 +0000 (09:24 +0200)]
clk: versal: Move pm_query_id out of clock driver
There is no reason to have firmware specific structure in clock driver.
Move it to generic location and also initialize enum values which is based
on https://lore.kernel.org/linux-arm-kernel/20200318125003.GA2727094@kroah.com/
recommended way to go to make sure that values guaranteed by compiler.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Faiz Abbas [Thu, 23 Jul 2020 04:12:19 +0000 (09:42 +0530)]
mmc: sdhci: Enable high speed conditional on the corresponding bit
The capabilities register has a field to indicate whether the host
supports high speed mode or not. Add high speed host_caps based on
this bit instead of enabling it by default.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Michal Simek <michal.simek@xilnx.com> Tested-by: Michal Simek <michal.simek@xilnx.com>
(zcu104 with sdhci-caps-mask = <0 0x200000>;)
Linux kernel for arm32 requires dtb and initrd to be placed in low memory
to work properly. This requirement is described in chapter 4b) and 5) in
Linux documentation (Documentation/arm/booting.rst).
There is an issue on arm32 with 2GB of memory that bootm_size is bigger
than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm
size on these systems not to be above 768MB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 12 Aug 2020 10:04:50 +0000 (12:04 +0200)]
xilinx: common: Get rid of fdt_high variable
There is no need to setup this variable if bootm_low and bootm_size
variable are properly setup. If fdt_high variable is missing U-Boot is
asking LMB to return free memory which is not used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 3 Aug 2020 10:59:28 +0000 (12:59 +0200)]
xilinx: Change logic around zynq_board_read_rom_ethaddr()
There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:32 +0000 (23:17 +0100)]
xilinx: zynqmp: fix incorrect map not align with IPI HW
Current IPI module register description is not align with IPI HW. The
registers with the wrong offset are not used so it does not cause real
issues. This patch aligns the register description.
Additionally comments added to explain why recv function does not check
any flag prior copying rx data.
Fixes: 660b0c77d816 ("mailbox: zynqmp: ipi mailbox driver") Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:30 +0000 (23:17 +0100)]
xilinx: zynqmp: remove chip_id function
Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:28 +0000 (23:17 +0100)]
xilinx: zynqmp: get chip ID using firmware driver
Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:27 +0000 (23:17 +0100)]
xilinx: zynqmp: merge firmware calls for EL2 and EL3
This patch merges ZynqMP firmware calls under xilinx_pm_request in order
to make trainsparent the EL. Calls at EL3 are send through IPI messages
and EL2 through SMC calls.
The EL2 call uses fixed payload and arg size as the EL3 call. The
firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
firmware API is limited by the SMC call size.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the
firmware driver. Additionally fixes payload buffer declarations without
macro usage
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Jul 2020 12:20:34 +0000 (14:20 +0200)]
xilinx: zynqmp: Enable DFU tftp support
Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to
have command present for showing how to use it.
boot FIT image has been created from below fragment. Key part is that type
of image has to be firmware. Also based on experiment load property is
completely ignored and base addresses are taken from dfu_alt_info variable.
Michal Simek [Wed, 15 Jul 2020 13:43:52 +0000 (15:43 +0200)]
xilinx: Align dfu ram with booti command
Image should be loaded to 0x80000 address and not to $kernel_addr_r.
Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined
that's why define it to be aligned with Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
New function should be called from board dram_init() because it initialized
gd->ram_base/ram_size. It finds the lowest available memory.
On systems with multiple memory nodes finding out the first memory node by
fdtdec_setup_mem_size_base() is not enough because this memory can be above
actual U-Boot VA mapping. Currently only mapping till 39bit is supported
(Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove
non-full-va map code")).
If DT starts with the first memory node above 39bit address then system can
be unpredictable.
The function is available only when multiple memory bank support is
enabled.
Calling fdtdec_setup_memory_banksize() from dram_init() is not possible
because fdtdec_setup_memory_banksize() is saving dram information to bd
structure which is placed on stack but not initialized at this time. Also
stack is placed at location setup in dram_init().
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ibai Erkiaga [Wed, 1 Jul 2020 23:10:58 +0000 (00:10 +0100)]
versal: fix versal PM ret payload size
The PM return payload size is defined as 4 bytes for Versal arquitecture
while the PM calls implemented both in the Versal clock driver and
ZynqMP firmware driver expects 5 bytes length.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Igor Lantsman [Wed, 24 Jun 2020 12:33:46 +0000 (14:33 +0200)]
arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:
As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.
The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.
Fixes: 91d7e0c47f51 ("arm64: zynqmp: Create fdtfile from compatible string") Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com> Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 6 Aug 2020 13:18:36 +0000 (15:18 +0200)]
xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Michal Simek [Thu, 9 Jul 2020 13:57:56 +0000 (15:57 +0200)]
xilinx: Setup bootm variables
On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Frank Wunderlich [Thu, 13 Aug 2020 08:20:48 +0000 (10:20 +0200)]
dts: r64: add sata- and asm_sel nodes
asm_sel is for switching between sata and pcie mode
on r64 there is GPIO90 connected to ASM1480 which
switches RX/TX pairs to PCIe/SATA connector
output-low means sata-controller is active
with 2020-10 now reg is also needed for the phy itself
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>