Simon Glass [Fri, 10 Jul 2020 00:39:38 +0000 (18:39 -0600)]
binman: Allow external binaries to be missing
Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.
U-Boot does with with ATF (ARM Trusted Firmware) today.
Add a new flag to binman to request this behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 10 Jul 2020 00:39:36 +0000 (18:39 -0600)]
binman: Add an etype for external binary blobs
It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.
Introduce a new 'blob-ext' entry type for that.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 10 Jul 2020 00:39:33 +0000 (18:39 -0600)]
binman: Adjust pylibfdt for incremental build
If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.
Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.
Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 10 Jul 2020 00:39:31 +0000 (18:39 -0600)]
binman: Add support for calling mkimage
As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.
Simon Glass [Fri, 10 Jul 2020 00:39:30 +0000 (18:39 -0600)]
binman: Set a default toolpath
When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.
Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.
Simon Glass [Fri, 10 Jul 2020 00:39:29 +0000 (18:39 -0600)]
binman: Specify the toolpath when running test coverage
At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.
Simon Glass [Fri, 10 Jul 2020 00:39:28 +0000 (18:39 -0600)]
binman: Correct the search patch for pylibfdt
Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 10 Jul 2020 00:39:26 +0000 (18:39 -0600)]
binman: Output errors to stderr
At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 6 Jul 2020 03:41:55 +0000 (21:41 -0600)]
patman: Add a 'test' subcommand
At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.
Give this subcommand the same default arguments as the others.
Simon Glass [Mon, 6 Jul 2020 03:41:54 +0000 (21:41 -0600)]
patman: Allow different commands
At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').
Simon Glass [Mon, 6 Jul 2020 03:41:52 +0000 (21:41 -0600)]
patman: Allow skipping patches at the end
The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.
Add a -e option to easily skip a number of commits at the bottom of the
branch.
Simon Glass [Mon, 6 Jul 2020 03:41:50 +0000 (21:41 -0600)]
patman: Add a test that uses gitpython
It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.
Simon Glass [Mon, 6 Jul 2020 03:41:49 +0000 (21:41 -0600)]
patman: Move main code out to a control module
To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.
Add comments and fix a few code-style issues while we are here.
- Fix SiFive HiFive Unleashed board booting failure problem.
- Enable SiFive fu540 PWM driver.
- Support SiFive fu540: SPI boot.
- Update OpenSBI used for RISC-V CI testing.
- Revert "riscv: Allow use of reset drivers".
- Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"".
- sysreset: syscon:
- Don't assume default value for offset and mask property.
- Support value property.
- qemu: Add syscon reboot and poweroff support.
- Fix SIFIVE debug serial dependency.
- Fix linking error when building u-boot-spl with no SMP support.
- AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg.
- Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi
- SiFive fu540 avoid using hardcoded ram base and size.
Bin Meng [Mon, 20 Jul 2020 06:06:35 +0000 (23:06 -0700)]
ram: sifive: Avoid using hardcoded ram base and size
At present the SiFive FU540 RAM driver uses hard-coded memory base
address and size to initialize the DDR controller. This may not be
true when this driver is used on another board based on FU540.
Update the driver to read the memory information from DT and use
that during the initialization.
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Rick Chen [Fri, 17 Jul 2020 08:24:44 +0000 (16:24 +0800)]
riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.
Signed-off-by: Rick Chen <rick@andestech.com> Acked-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Leo Liang <ycliang@andestech.com>
Leo Yu-Chi Liang [Mon, 29 Jun 2020 08:27:28 +0000 (16:27 +0800)]
riscv: Fix linking error when building u-boot-spl with no SMP support
Switch off SMP support when building u-boot-spl would cause linking error as follow:
undefined reference to 'secondary hart relocate' and 'smp_call_function'.
Add macro to wrap up proper code region that needs SMP configuration on.
Signed-off by: Leo Liang <ycliang@andestech.com> Cc: rick@andestech.com Reviewed-by: Bin Meng <bin.meng@windriver.com>
Michal Simek [Fri, 10 Jul 2020 10:41:13 +0000 (12:41 +0200)]
serial: Fix SIFIVE debug serial dependency
The commit 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for
debug consoles") has added incorrect dependency for SIFIVE debug uart which
should depend on SIFIVE driver instead of PL01x.
Fixes: 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for debug consoles") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
Bin Meng [Tue, 23 Jun 2020 05:29:43 +0000 (22:29 -0700)]
sysreset: syscon: Support value property
Per the DT binding, <mask> and <value> property can have either one
or both, and if <value> is missing, <mask> should be used, which is
what current U-Boot sysreset_syscon driver supports.
This adds support to the <value> property to the driver, and <mask>
semantics is updated to really be a mask to the value if both exist.
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Bin Meng [Tue, 23 Jun 2020 05:29:42 +0000 (22:29 -0700)]
sysreset: syscon: Don't assume default value for offset and mask property
Per the DT binding, <offset> is a required property. Let's abort
the probe if it is missing. For the <mask> property, current codes
assume a default value of zero, which is not correct either.
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Jagan Teki [Wed, 15 Jul 2020 10:09:03 +0000 (15:39 +0530)]
sifive: fu540: Enable SF distro bootcmd
Enable SPI flash(SF) distro boot command in Sifive FU540.
This distro boot will read the boot script at specific
location at the flash and start sourcing the same.
Included the SF device at the last of the target devices
list since all the rest of the devices on the list have
more possibility to boot the distribution due to the
size of the SPI flash is concern.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
Jagan Teki [Wed, 15 Jul 2020 10:09:02 +0000 (15:39 +0530)]
sifive: fu540: Add boot flash script offset, size
HiFive-Unleashed-A00 has SPI flash with 32MiB size.
So, let's use the script offset at the end of 4K.
This way it cannot overlap any offsets being used
by software components in flash layout.
So, SF distrocmd will pick the script at desired
script address and run.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
Jagan Teki [Wed, 15 Jul 2020 10:09:01 +0000 (15:39 +0530)]
sifive: fu540: Mark the default env as SPI flash
Mark the default U-Boot environment as SPI flash since
this is an on board flash device.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
Bin Meng [Mon, 20 Jul 2020 06:17:07 +0000 (23:17 -0700)]
riscv: Make SiFive HiFive Unleashed board boot again
Commit 40686c394e53 ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.
The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.
It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.
Considering that the original refactor does have benefits, that it
makes the IPI code more similar to U-Boot initialization idioms.
It also removes some quite ugly macros. Let's do the minimal revert
instead of a complete revert, plus a fixes to arch_cpu_init_dm() to
consider the SPL case.
Fixes: 40686c394e53 ("riscv: Clean up IPI initialization code") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Tested-by: Leo Liang <ycliang@andestech.com>
Tom Rini [Thu, 23 Jul 2020 12:57:35 +0000 (08:57 -0400)]
Merge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc1 (5)
The series provides bug fixes for:
* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation
The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)
Tom Rini [Wed, 22 Jul 2020 15:30:52 +0000 (11:30 -0400)]
Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;
Jagan Teki [Tue, 21 Jul 2020 15:06:04 +0000 (20:36 +0530)]
rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y
ROC-RK3399-PC has specific set of configurations for
on-board led setup.
Due to easiness for user to know the state of the board
roc-rk339-pc board code will setup the low power led
on/off, and waiting for user to press power key and then
glow full power led.
All this needs to happen only during power-on-reset not
for soft reset or WDT.
Also, it is not a proper usage to ask the user to press
the Power key if the board connected remotely, so add
the environment variable 'pwr_key' to check as well.
So, user need to press Power key only
- during POR
- pwr_key=y
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 21 Jul 2020 15:06:03 +0000 (20:36 +0530)]
rockchip: Separate the reset cause from display cpuinfo
reset cause is a generic functionality based on the soc
cru registers in rockchip. This can be used for printing
the cause of reset in cpuinfo or some other place where
reset cause is needed.
Other than cpuinfo, reset cause can also be using during
bootcount for checking the specific reset cause and glow
the led based on the reset cause.
So, let's separate the reset cause code from cpuinfo, and
add a check to build it for rk3399, rk3288 since these two
soc are supporting reset cause as of now.
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 21 Jul 2020 15:06:02 +0000 (20:36 +0530)]
rockchip: Don't clear the reset status reg
reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.
Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.
However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 21 Jul 2020 15:06:01 +0000 (20:36 +0530)]
rockchip: roc-rk3399-pc: Add custom led_setup()
roc-rk3399-pc has some specific requirements to support LEDS,
environment. board detection and etc prior to U-Boot proper.
So as of now SPL would be a better stage for these custom board
requirements to support unlike TPL. Adding few of these custom
requirements like LEDS in TPL would require extra code pulling
and also the size of TPL can grow.
So, this patch moves the leds code from TPL into SPL Board init
led_setup code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(split tpl.c change as separate patch) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Mon, 20 Jul 2020 18:55:48 +0000 (00:25 +0530)]
arm64: dts: rockchip: Add ROCKPi 4A/4B support
Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Use 4B dts into default rock-pi-4 defconfig until we find any
solution for dynamic detection of these variants.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Wed, 22 Jul 2020 11:46:19 +0000 (19:46 +0800)]
rockchip: firefly-rk3399: enable CONFIG_USB_DWC3
To fix below build error:
drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy'
drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Sat, 18 Jul 2020 14:45:19 +0000 (22:45 +0800)]
rockchip: rk3399: Add default env to support compressed kernel Image
Add default kernel_comp_addr_r and kernel_comp_size to support boot
from compressed kernel Image, this space is temporarily used during
decompress according to README.distro.
Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Alex Bee [Tue, 14 Jul 2020 23:03:31 +0000 (01:03 +0200)]
rockchip: sdram: fix dram_init_banksize
Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board
if CONFIG_SPL_OPTEE is set. This is troublesome when booting a
linux kernel since this size will be injected in FDT of the kernel.
gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE)
must not be taken into consideration for calculation of second bank
size, since this offset is already included in calculation of "top".
After applying this patch 992 MB (1024 MB - 32 MB reserved for
optee-os) is correctly calculated and has also been verified on
2 GB boards.
Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Mon, 20 Jul 2020 10:34:12 +0000 (18:34 +0800)]
rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set
The empty function define should not be in the header file, or else the
build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG
is disabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock64-rk3328_defconfig: Add SPI Flash support
Add U-Boot SPI Flash support for the PINE64 Rock64 board
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add U-Boot SPI Flash support for the PINE64 Rock64 board
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(fix checkpatch error for code ident) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers: clk: rockchip: clk_rk3328: Add SPI support
Add SPI support for the RK3328 clock driver
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 7 Jul 2020 13:50:44 +0000 (19:20 +0530)]
rockchip: rock-pi-4: Enable USB3 Host
Enable USB3.0 Host support for RockPI-4 boards.
Note that the Upper USB3.0 port is marked as otg and
lower USB3.0 port marked as host, so this below log
capture when USB3.0 mass storage plug in at lower
USB 3.0 port.
Log:
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... cannot reset port 1!?
2 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
lib: crypto: export and enhance pkcs7_verify_one()
The function, pkcs7_verify_one(), will be utilized to rework signature
verification logic aiming to support intermediate certificates in
"chain of trust."
To do that, its function interface is expanded, adding an extra argument
which is expected to return the last certificate in trusted chain.
Then, this last one must further be verified with signature database, db
and/or dbx.
This function was nullified when the file, pkcs7_verify.c, was imported
because it calls further linux-specific interfaces inside, hence that
could lead to more files being imported from linux.
We need this function in pkcs7_verify_one() and so simply re-implement it
here instead of re-using the code.