Gerald Van Baren [Sat, 31 Mar 2007 16:22:10 +0000 (12:22 -0400)]
Add a flattened device tree (fdt) command (1 of 2)
The fdt command uses David Gibson's libfdt library to manipulate as well
as print the flattened device tree. This patch is the new command,
the second part is the modifications to the existing code.
Gerald Van Baren [Sat, 31 Mar 2007 16:13:43 +0000 (12:13 -0400)]
libfdt: Enhanced and published fdt_next_tag()
Enhanced the formerly private function _fdt_next_tag() to allow stepping
through the tree, used to produce a human-readable dump, and made
it part of the published interface.
Also added some comments.
Stefan Roese [Sat, 31 Mar 2007 06:46:08 +0000 (08:46 +0200)]
ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Stefan Roese [Wed, 28 Mar 2007 12:52:12 +0000 (14:52 +0200)]
i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined
The "old" i2c commands (iprobe, imd...) are now compiled in again,
even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
config option.
Haiying Wang [Thu, 7 Dec 2006 16:35:55 +0000 (10:35 -0600)]
Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
Stefan Roese [Fri, 16 Mar 2007 20:11:42 +0000 (21:11 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Michal Simek [Sun, 11 Mar 2007 12:48:24 +0000 (13:48 +0100)]
[Microblaze][PATCH] part 2
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
Michal Simek [Sun, 11 Mar 2007 12:42:58 +0000 (13:42 +0100)]
[Microblaze][PATCH]
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
Stefan Roese [Thu, 8 Mar 2007 09:13:16 +0000 (10:13 +0100)]
[PATCH] Update AMCC Luan 440SP eval board support
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Stefan Roese [Thu, 8 Mar 2007 09:10:18 +0000 (10:10 +0100)]
[PATCH] Update AMCC Yucca 440SPe eval board support
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
Stefan Roese [Wed, 7 Mar 2007 15:43:00 +0000 (16:43 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Stefan Roese [Wed, 7 Mar 2007 15:39:36 +0000 (16:39 +0100)]
[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
Stefan Roese [Tue, 6 Mar 2007 06:47:04 +0000 (07:47 +0100)]
[PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.
For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.
Timur Tabi [Tue, 13 Feb 2007 16:41:42 +0000 (10:41 -0600)]
mpc83xx: write MAC address to mac-address and local-mac-address
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, this patch
updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
This function already updates local-mac-address.
projects / u-boot.git / log