Ying Sun [Sun, 25 Jun 2023 08:24:47 +0000 (16:24 +0800)]
cmd: CONFIG_CMD_SAVES depends on CONFIG_CMD_LOADS
CONFIG_CMD_SAVES is used to enable support for the "saveenv" command
and is only implemented in cmd/load.c
when "#if defined(CONFIG_CMD_LOADS)" is met.
It is recommended to add dependency constraints to its definition.
Prevents "saveenv" command from not being supported
when "CONFIG_CMD_SAVES=y CONFIG_CMD_LOADS=n".
Suggested-by: Yanjie Ren <renyanjie01@gmail.com> Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn> Reviewed-by: Simon Glass <sjg@chromium.org>
Tobias Deiminger [Mon, 19 Jun 2023 22:41:07 +0000 (00:41 +0200)]
test: Find leftovers after clean/mrproper
Docs describe 'make clean' to delete most generated files, 'make
mrproper' to delete current configuration and all generated files. This
test tries to assert it.
Idea is to search remaining files by patterns in copies of the initial
out-of-source build, which has two advantages:
- looking in an out-of-source build dir allows to tell generated source
code from committed source code
- copying is fast (compared to rebuilding each time) which allows to do
a "world clean"
Tobias Deiminger [Mon, 19 Jun 2023 22:41:02 +0000 (00:41 +0200)]
Kbuild: Fix cleanup of generated sources in tools
On 'make clean', generated C files in tools/env/ and tools/boot/ are
currently not removed, but they should.
Auto-generation for shared sources was first introduced with ad80c4a3220b ("kbuild, tools: generate wrapper C sources automatically
by Makefile"). Cleanup later regressed (see Fixes:), because shared
files were moved out of lib/ and common/, but 'clean-dirs := lib common'
was not adjusted accordingly. Further, the generated
tools/env/embedded.c became a sibling to project files, which prevents
directory-wise cleanup at all.
To solve it, we establishe tools/generated/ as the sole place for
generated sources. Wrappers are now generated as
tools/generated/<orig_dirname>/<orig_filename>, and 'make clean' can
remove tools/generated/ as a whole (Linux Makefile.asm-generic headers
are cleaned similarly). This way we don't have to maintain separate
clean-files or clean-dirs entries for each single added or moved wrapper
file.
Fixes: 0649cd0d4908 ("Move environment files from common/ to env/") Fixes: 19a91f2464a8 ("Create a new boot/ directory") Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
[trini: Correct mkfwupdate case] Signed-off-by: Tom Rini <trini@konsulko.com>
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
On some AE350 boards, we need to explicitly initialize the priority
registers to a non-zero value so the boot hart can instruct secondary
harts to jump to OpenSBI.
This patch also updates the information about PLICSW.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Hoegeun Kwon [Wed, 28 Jun 2023 10:19:49 +0000 (19:19 +0900)]
clk: starfive: pll: Fix to use postdiv1_mask
There is a problem that the rates of PLL0 and PLL1 are set incorrectly
because the postdiv1_mask value is incorrectly entered when setting
the pll clk reg. Modify postdiv1's mask value to be put correctly.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Conor Dooley [Thu, 15 Jun 2023 10:12:44 +0000 (11:12 +0100)]
board: microchip: set mac address for ethernet1 on icicle
The dts sync from Linux leaves mac0/ethernet1 enabled on icicle, but
U-Boot does not currently set a mac address for it. Expand on the code
which currently sets the mac for mac1/ethernet0 to optionally set the
mac address for the second ethernet.
Conor Dooley [Thu, 15 Jun 2023 10:12:43 +0000 (11:12 +0100)]
riscv: dts: sync mpfs-icicle devicetree with linux
The "notable" disappearances are:
- the pac193x stanza - there's nothing in mainline linux w.r.t. bindings
for this & what is going to appear in mainline linux is going to be
incompatible with what is currently in U-Boot.
- operating points - these operating points should not be set at the
soc.dtsi level as they may not be possible depending on the design
programmed to the FPGA
- clock output names - there are defines for the clock indices, these
should not be needed
- the dt maintainers in linux NAKed using defines for IRQ numbers
- the qspi nand, which is not part of the icicle's default configuration
is removed.
Conor Dooley [Thu, 15 Jun 2023 10:12:42 +0000 (11:12 +0100)]
riscv: dts: drop microchip from dts filenames
The original names picked for the DT doesn't match Linux's naming scheme
and it was renamed there a while ago. Rename it in U-Boot to allow
easily syncing dts between the two projects.
Eugen Hristev [Wed, 19 Apr 2023 13:45:24 +0000 (16:45 +0300)]
regulator: implement basic reference counter
Some devices share a regulator supply, when the first one will request
regulator disable, the second device will have it's supply cut off before
graciously shutting down. Hence there will be timeouts and other failed
operations.
Implement a reference counter mechanism similar with what is done in
Linux, to keep track of enable and disable requests, and only disable the
regulator when the last of the consumers has requested shutdown.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently, spl_end points to the __bss_end address, which
is an external RAM address instead of the end of the SPL text
section in the internal RAM.
This causes boot failures on imx6-colibri, for example:
```
Trying to boot from MMC1
SPL: Image overlaps SPL
resetting ...
```
Fix this problem by assigning spl_end to _image_binary_end, as this
symbol properly represents the end of the SPL text section.
Jonas Karlman [Mon, 26 Jun 2023 19:43:06 +0000 (19:43 +0000)]
rockchip: Restore support for boot scripts in legacy image format
Use of CONFIG_SPL_FIT_SIGNATURE=y cause CONFIG_LEGACY_IMAGE_FORMAT=n as
default, this prevent boot scripts in legacy image format from working
and was an unintended change in the listed fixes commits:
Wrong image format for "source" command
Add CONFIG_LEGACY_IMAGE_FORMAT=y to defconfig for affected boards to
restore support for boot scripts in legacy image format.
Marek Vasut [Sat, 1 Jul 2023 15:26:19 +0000 (17:26 +0200)]
ARM: arm11: Add C wrapper for allow_unaligned()
Rename current assembler implementation of allow_unaligned() to
arm11_arch_cp15_allow_unaligned() and add it into arm11.h header,
then add C wrapper of allow_unaligned().
This fixes misbehavior when linking U-Boot, where the CPU specific
allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .
The problem is triggerd by c7c0ca37673 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.
Marek Vasut [Sat, 1 Jul 2023 15:26:18 +0000 (17:26 +0200)]
ARM: armv7: Add C wrapper for allow_unaligned()
Rename current assembler implementation of allow_unaligned() to
v7_arch_cp15_allow_unaligned() and add it into armv7.h header,
then add C wrapper of allow_unaligned().
This fixes misbehavior when linking U-Boot on ARMv7a i.MX6Q, where the
CPU specific allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .
The problem is triggerd by c7c0ca37673 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.
Tom Rini [Mon, 26 Jun 2023 19:19:54 +0000 (15:19 -0400)]
CI: Azure: Split keymile jobs out
Currently the PowerPC build job in Azure will hit the maximum time limit
for a build and stop. Looking at the job, the easiest path to reducing
it is to move Keymile vendor boards to their own job and exclude them
from the PowerPC one (and while at this, the ls102 job).
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Currently, the imx93_evk is configured with CONFIG_ENV_IS_IN_MMC and the
chosen environment offset in the config is 0x400000. Unless the user
programs the associated fuses, this offset is the default secondary boot
image offset used by the i.MX 93 ROM bootloader. With certain
combinations of environmental variables, the CRC and beginning of the
environment can potentially falsely appear as a valid boot image
container header. If the expected "sw_version" offset within this
mistaken boot image container is greater than the primary's, the ROM
bootloader can skip booting of the primary image altogether and attempt
to boot with the content of the environment data. This will then hang
the system.
To fix this, move the environment from 0x400000 to 0x700000 reserving up
to 3 MB at 0x400000 for any actual secondary user image container.
Signed-off-by: Ken Sloat <ken.s@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
Jonas Karlman [Thu, 8 Jun 2023 10:59:38 +0000 (10:59 +0000)]
pinctrl: rockchip: Fix Data Abort exception in SPL
Using CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y and CONFIG_OF_LIVE=y triggers
a Data Abort exception from unaligned memory access when the pinctrl
driver iterate node properties, e.g. for UART2 on RK3568.
Fix this by replacing the loop to access node properties with use of
ofnode_for_each_prop instead of the current ifdef.
Also continue to next prop instead of aborting at first sign of an
unknown property.
This fixes the Data Abort exception and also pinconf of e.g. pull and
drive in SPL, e.g. for UART2 on RK3568.
setting mux of GPIO0-24 to 1
setting mux of GPIO0-24 to 1
setting pull of GPIO0-24 to 5
setting mux of GPIO0-25 to 1
setting mux of GPIO0-25 to 1
setting pull of GPIO0-25 to 5
Fixes: e7ae4cf27a6d ("pinctrl: rockchip: Add common rockchip pinctrl driver") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Ondrej Jirman [Thu, 25 May 2023 13:27:08 +0000 (15:27 +0200)]
pinephone-pro: Fix I/O port voltage (GPIO3D4A is 1.8V)
This fixes access to camera sensor over I2C during probe time in
the kernel. (Kernel will fix I/0 port voltage by itself, but the
timing depends on probe order of the drivers, so the fix can
come after the camera sensor driver already failed to probe.)
Signed-off-by: Ondrej Jirman <megi@xff.cz> Cc: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
Eugen Hristev [Mon, 22 May 2023 08:39:58 +0000 (11:39 +0300)]
phy: rockchip: inno-usb2: fix phy reg=0 case
The support for #address-cells=2 has a loophole: if the reg is actually 0,
but the #address-cells is actually 1, like in such case below:
syscon {
#address-cells = <1>;
phy {
reg = <0 0x10>;
};
};
then the second u32 of the 'reg' is the size, not the address.
The code should check for the parent's #address-cells value, and not
assume that if the first u32 is 0, then the #address-cells is 2, and the
reg property is something like
reg = <0 0xff00 0x10>;
Fixed this by looking for the #address-cells value and retrieving the
reg address only if this is ==2.
To avoid breaking anything I also kept the check `if reg==0` as some DT's
may have a wrong #address-cells as parent and even if this commit is
correct, it might break the existing wrong device-trees.
Fixes: d538efb9adcf ("phy: rockchip: inno-usb2: Add support #address_cells = 2") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Alexey Romanov [Wed, 31 May 2023 09:31:56 +0000 (12:31 +0300)]
drivers: meson: introduce secure power controller driver
This patch adds Power controller driver support for Amlogic
A1 family using secure monitor calls. The power domains register
only can access in secure world.
Import the device tree from mainline linux (v6.4-rc1) and add the
old PHY reset bindings in the PHY node, else U-Boot and linux won't
be able to use the PHY.
Bin Meng [Tue, 27 Jun 2023 01:24:56 +0000 (09:24 +0800)]
riscv: Fix alignment of RELA sections in the linker scripts
In current linker script both .efi_runtime_rel and .rela.dyn sections
are of RELA type whose entry size is either 12 (RV32) or 24 (RV64).
These two are arranged as a continuous region on purpose so that the
prelink-riscv executable can fix up the PIE addresses in one loop.
However there is an 'ALIGN(8)' between these 2 sections which might
cause a gap to be inserted between these 2 sections to satisfy the
alignment requirement on RV32. This would break the assumption of
the prelink process and generate an unbootable image.
Fixes: 9a6569a043d3 ("riscv: Update alignment for some sections in linker scripts") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
Marek Vasut [Sun, 28 May 2023 21:00:30 +0000 (23:00 +0200)]
imx: hab: Simplify the mechanism
The current mechanism is unnecessarily complex. Simplify the whole mechanism
such that the entire fitImage is signed, IVT is placed at the end, followed
by CSF, and this entire bundle is also authenticated. This makes the signing
scripting far simpler.
Mingli Yu [Mon, 19 Jun 2023 06:22:50 +0000 (14:22 +0800)]
mkimage: Use PATH_MAX for path length
Fixed when build xilinx_zynqmp in long directory ( >256):
| /buildarea1/testtest/wr_build/wr1023test_secureboot/test1-what/test2-what/test3-what/test4-what/test5-what/test6-what/test7-what/test8-what/test9-what/test10-what/test11-what/test12-what/build/tmp-glibc/work/xilinx_zynqmp-wrs-linux/u-boot-xlnx/1_v2023.01-xilinx-v2023.1+gitAUTOINC+40a08d69e7-r0/build/fitImage-linux: Image file name (uboot-mkimage) too long, can't create tmpfile.
| Error: Bad parameters for FIT image type
Tom Rini [Tue, 20 Jun 2023 20:00:20 +0000 (16:00 -0400)]
doc: statistics: Re-generate the last 3 releases
With some changes to our mapping files in gitdm, re-generate the last
few releases worth of statistics to correctly reflect contributions. We
only go back this far to try and find a balance between highlighting
contributions and still being reviewable.
Simon Glass [Sat, 17 Jun 2023 10:49:48 +0000 (11:49 +0100)]
menu: Re-enable the ANSI codes
The intent here was to allow ANSI codes to be disabled, since it was
proving impoosible to test operation of the menu code when it kept moving
the cursor. Unfortunately this ended up in the patch.
Correct this by enabling ANSI again.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Pali Rohár <pali@kernel.org> Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl> Reported-by: Frank Wunderlich <frank-w@public-files.de> Fixes: 32bab0eae51b ("menu: Make use of CLI character processing") Tested-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Simon Glass [Fri, 23 Jun 2023 12:22:09 +0000 (13:22 +0100)]
doc: Tidy up the format docs to be more generic
Avoid reference to uImage which is the old format. Drop the historical
language at the top and rewrite a few other sections. Correct the
U-Boot filename which is now in the boot/ directory.
Tom Rini [Thu, 22 Jun 2023 13:59:43 +0000 (09:59 -0400)]
Merge branch '2023-06-21-fix-get_ram_size-with-cache-enabled' into next
To quote the author:
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses to
aliased (not physically present) addresses are cached and wrong size is
returned.
This was discovered while working on a TI AM625 based board where cache
is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable
dcache in SPL").
Emanuele Ghidoli [Tue, 30 May 2023 13:33:27 +0000 (15:33 +0200)]
common/memsize.c: Fix get_ram_size() when cache is enabled
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.
This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable dcache in SPL").
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Emanuele Ghidoli [Tue, 30 May 2023 13:33:26 +0000 (15:33 +0200)]
sandbox: Add a dummy dcache_status() function
This adds dcache_status() so that code using it can build
without error on sandbox. This is required in preparation
of adding cache handling into get_ram_size function.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
usb: dwc2: Fix the write to W1C fields in HPRT register
Fix the write to the HPRT register which treat W1C fields
as if they were mere RW. This leads to unintended clearing of such fields
This bug was found during the testing on Simics model. Referring to
specification DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
Databook (3.30a)"5.3.4.8 Host Port Control and Status Register (HPRT)", the
HPRT.PrtPwr is cleared by this mistake. In the Linux driver (contrary to
U-Boot), HPRT is always read using dwc2_read_hprt0 helper function which
clears W1C bits. So after write back those bits are zeroes.
projects / u-boot.git / log