Marek Vasut [Sun, 11 Feb 2024 17:34:30 +0000 (18:34 +0100)]
ARM: renesas: Enable LTO on R-Car
Enable LTO globally on Renesas R-Car platforms. This has been enabled
on a subset of boards already, but at this point it is safe to enable
it globally. This saves units or tens of kiB from the resulting build.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sun, 11 Feb 2024 17:34:28 +0000 (18:34 +0100)]
ARM: renesas: Disable EFI on R-Car Gen2
These systems are unlikely to use EFI as this functionality has not been
enabled until it got pulled in by Kconfig default. This functionality
does add some 60-70 kiB to the u-boot.img size, which overflows the size
limit. Disable it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
clk: renesas: Fix broken clocks on all Gen2 boards
To prepare support for multiple register layouts pointers to register
tables where added to struct cpg_mssr_info. These pointers are suppose
to be filled in at probe time and no intended change in behavior was
intended.
However the new pointers where only filled in by some paths of the
driver implemented in clk-rcar-gen3.c. The path implemented in
clk-rcar-gen2.c was not updated leaving the pointers uninitialized
leading to a crash when trying to probe the clocks.
Fix this by filling in the pointers in the Gen2 code path with the
values used before they where moved to struct cpg_mssr_info.
Fixes: d413214fb748 ("clk: renesas: Add register pointers into struct cpg_mssr_info") Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R8A7791 Porter Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
- Fix avb_verify command with SD cards
- Add u-boot-dfu maintainer tree for AB/AVB
- Avb: report verified boot state based on lock state
- Misc avb refactors improve code quality
Igor Opaniuk [Fri, 9 Feb 2024 19:20:44 +0000 (20:20 +0100)]
cmd: avb: rework do_avb_verify_part
Use existing str_avb_slot_error() function for obtaining
verification fail reason details.
Take into account device lock state for setting correct
androidboot.verifiedbootstate kernel cmdline parameter.
Igor Opaniuk [Fri, 9 Feb 2024 19:20:40 +0000 (20:20 +0100)]
avb: move SPDX license identifiers to the first line
Move SPDX license identifiers to the first line, so it conforms
to license placement rule [1]:
Placement:
The SPDX license identifier in kernel files shall be added at the first
possible line in a file which can contain a comment. For the majority
of files this is the first line, except for scripts which require the
'#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX
identifier goes into the second line.
Tom Rini [Tue, 13 Feb 2024 22:31:11 +0000 (17:31 -0500)]
Merge branch '2024-02-13-assorted-updates'
- Add the button command patch, update MAINTAINERS entry for a platform,
fix a problem with the hash command, fix a problem on K3 platforms and
revert a change on verdin-am62.
According to TI changing the VDD_CORE while the SoC is running is not
allowed, the voltage must be set before the AM62 device reset is
released, revert this change therefore.
The correct solution would be to program the PMIC during manufactoring
according to the speed grade of the SoC.
Caleb Connolly [Tue, 9 Jan 2024 11:51:09 +0000 (11:51 +0000)]
boot: add support for button commands
With the relatively new button API in U-Boot, it's now much easier to
model the common usecase of mapping arbitrary actions to different
buttons during boot - for example entering fastboot mode, setting some
additional kernel cmdline arguments, or booting with a custom recovery
ramdisk, to name a few.
Historically, this functionality has been implemented in board code,
making it fixed for a given U-Boot binary and requiring the code be
duplicated and modified for every board.
Implement a generic abstraction to run an arbitrary command during boot
when a specific button is pressed. The button -> command mapping is
configured via environment variables with the following format:
button_cmd_N_name=<button label>
button_cmd_N=<command to run>
Where N is the mapping number starting from 0. For example:
button_cmd_0_name=vol_down
button_cmd_0=fastboot usb 0
This will cause the device to enter fastboot mode if volume down is held
during boot.
After we enter the cli loop the button commands are no longer valid,
this allows the buttons to additionally be used for navigating a boot
menu.
Tom Rini [Mon, 12 Feb 2024 20:22:05 +0000 (15:22 -0500)]
Merge tag 'doc-2024-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2024-04-rc2
Documentation:
* Fix and extend utf8_to_utf32_stream() documentation
* Fix rendering of OpenSBI logo in VisionFive 2 description
* Document imxrt1170-evk board
* codingstyle.rst: Clarify include section
Nils Le Roux [Sat, 2 Dec 2023 09:39:49 +0000 (10:39 +0100)]
net: designware: Support high memory nodes
Some platforms (such as the Lichee Pi 4A) have their dwmac device
addressable only in high memory space. Storing the node's base address
on 32 bits is not possible in such case.
Use platform's physical address type to store the base address.
Signed-off-by: Nils Le Roux <gilbsgilbert@gmail.com> Cc: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini [Fri, 9 Feb 2024 14:35:20 +0000 (09:35 -0500)]
doc/develop/codingstyle.rst: Clarify include section
Rework the section about includes slightly. We should not be using
common.h anywhere, so remove that from examples and ask people to send
patches removing it when found. Doing this also means we need to reword
other parts of this section. Be clearer about using alphabetical
ordering.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
efi_loader: simplify error message in efi_disk_create_raw()
The error message
Adding disk for usb_mass_storage.lun0 failed (err=-9223372036854775788/0x8000000000000014)
provides a decimal and a hexadecimal notation of the EFI status code
EFI_ALREADY_STARTED which is defined as (EFI_ERROR_MASK | 20).
The decimal output does not convey the value 20 clearly.
With the patch we write
Adding block device usb_mass_storage.lun0 failed, r = 20
similar to other EFI error messages.
Fixes: 952018117ab4 ("dm: sandbox: Switch over to using the new host uclass") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Fix the i.MX8MP SPI compatible string.
- Let the SPL clock code do the configuration on Data Modul i.MX8M Plus
eDM SBC.
- Enable secure boot on the imx93_var_som board.
Michal Simek [Thu, 1 Feb 2024 12:38:41 +0000 (13:38 +0100)]
arm64: zynqmp: Remove arm,cortex-a53-edac node
There is no dt schema associated with it. Also Linux driver have been
removed in Xilinx Linux tree and never gets to upstream that's why remove
description for it.
Michal Simek [Tue, 30 Jan 2024 14:51:06 +0000 (15:51 +0100)]
arm64: zynqmp: Fix kr260 clock wiring
kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.
On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.
Michal Simek [Mon, 29 Jan 2024 07:46:43 +0000 (08:46 +0100)]
arm64: zynqmp: Describe 25MHz fixed clock for PL GEMs
Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).
Michal Simek [Fri, 26 Jan 2024 07:24:41 +0000 (08:24 +0100)]
arm64: zynqmp: Sync clock labels with kr260 revB
Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using one si5332 and revB multiple clock chips
using the same clock labels helping with keeping only one device tree
overlay which targets PL. That's why synchronize clock labels and use
labels from revB which are more generic.
Unfortunately if there is driver for si5332 chip split could happen again
but it is still worth to do it now and solve this issue when occurs.
Saeed Nowshadi [Thu, 25 Jan 2024 08:07:58 +0000 (09:07 +0100)]
arm64: zynqmp: Add 'silabs, skip-recall' to all si570 clk nodes
Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting. This re-calibration causes a glitch on the output clock. At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation. System Controller should skip the re-calibration
step to prevent any clock instability for Versal.
Michal Simek [Wed, 24 Jan 2024 10:58:40 +0000 (11:58 +0100)]
arm64: xilinx: Enable EFI_HTTP_BOOT by default
Enable EFI_HTTP_BOOT to be able to booting OS via http.
In case of that dhcp server is not providing dns server IP set it up via
setenv dnsip <ip addr>.
configs: versal_net: Enable CONFIG_LTO for mini qspi/ospi
Adding a tiny bit more code for mini u-boot leads to a OCM
image overflow. Fix this by enabling LTO for this board, so that such
changes still can be made to the common U-Boot code.
Enable building mini u-boot image with LTO, which results in about 8KB
reduction in size.
configs: versal: Enable CONFIG_LTO for mini qspi/ospi
Adding a tiny bit more code for mini u-boot leads to a OCM
image overflow. Fix this by enabling LTO for this board, so that such
changes still can be made to the common U-Boot code.
Enable building mini u-boot image with LTO, which results in about 8KB
reduction in size.
Marek Vasut [Thu, 8 Feb 2024 23:59:50 +0000 (00:59 +0100)]
spi: mxc_spi: Add imx6ul-ecspi compatible string
Recent i.MX8MP DTs use new fsl,imx6ul-ecspi compatible string instead
of the fsl,imx51-ecspi compatible string. Add the new compatible string
to fix ECSPI operation on i.MX8MP.
For details, see Linux: 48d74376fb68 ("arm64: dts: imx8mp: update ecspi compatible and clk") 8eb1252bbedf ("spi: imx: remove ERR009165 workaround on i.mx6ul")
Fixes: 451799a6ceac ("arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4") Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 8 Feb 2024 17:33:50 +0000 (18:33 +0100)]
ARM: imx: Let SPL configure ECSPI1 clock on Data Modul i.MX8M Plus eDM SBC
The SPL clock code does configure the ECSPI clock frequency, which has
to match the mxc-spi driver configuration for successful SPI NOR boot.
Drop the assigned-clock from DT ecspi1 node on this board to let the
SPL clock code do the configuration and keep it aligned with the driver
expectation.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Hai Pham [Sun, 28 Jan 2024 15:52:08 +0000 (16:52 +0100)]
ARM: dts: renesas: Add Renesas Gray Hawk boards support
Initial support for the Renesas Gray Hawk CPU and BreakOut boards.
The arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi is extended version of:
https://lore.kernel.org/linux-renesas-soc/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be/
The version currenty submitted upstream lacks functionality which is
present in this series. Once the upstream support implements that
missing functionality, these DTs will be updated to match.
Hai Pham [Sun, 28 Jan 2024 15:52:06 +0000 (16:52 +0100)]
ARM: dts: renesas: Add Renesas R8A779H0 V4M SoC support
Add initial support for the Renesas R8A779H0 (R-Car V4M) SoC.
The current version is imported and modified from:
https://lore.kernel.org/linux-renesas-soc/4107bc3d7c31932da29e671ddf4b1564ba38a84c.1706194617.git.geert+renesas@glider.be/
The modifications contain nodes from previous version
which are useful in U-Boot and not part of the Linux
kernel DT yet. The following nodes were added:
- pfc
- gpio0..gpio7
- i2c0..i2c3
- avb0..avb2
- mmc0
Hai Pham [Sun, 28 Jan 2024 15:52:05 +0000 (16:52 +0100)]
mtd: spi: renesas: Add R8A779H0 V4M support
Support RPC SPI on R8A779H0 V4M SoC.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Hai Pham [Sun, 28 Jan 2024 15:52:03 +0000 (16:52 +0100)]
pinctrl: renesas: Add R8A779H0 V4M PFC tables
Add pinctrl tables for R8A779H0 V4M SoC.
The current version of these PFC tables is imported and squashed from:
https://lore.kernel.org/linux-renesas-soc/cover.1706264667.git.geert+renesas@glider.be/
Marek Vasut [Sun, 28 Jan 2024 15:52:02 +0000 (16:52 +0100)]
clk: renesas: Implement R8A779H0 V4M PLL7 support
Add PLL7 support to Gen3/Gen4 common clock driver. Add initial PLL7
multiplier and divider values into table in R8A779H0 V4M clock driver.
The PLL7 is new PLL added in R8A779H0 V4M SoC. Only integer multiplication
mode is supported by PLL7. The PLL reference clock are either 16.66 MHz or
20 MHz on R8A779H0 V4M SoC, and the output frequency must be 2000 MHz. The
multiplier values fitting this requirement are calculated to 120 or 100.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Sun, 28 Jan 2024 15:52:01 +0000 (16:52 +0100)]
clk: renesas: Add R8A779H0 V4M clock tables
Add clock tables for R8A779H0 V4M SoC.
The current version is imported from:
https://lore.kernel.org/linux-renesas-soc/c678ef7164e3777fa91572f72e47ef385cea64b8.1706194617.git.geert+renesas@glider.be/
The current version still contains PLL7 extras from the
previous version to provide ethernet support in U-Boot.
Sean Anderson [Thu, 1 Feb 2024 18:18:51 +0000 (13:18 -0500)]
lib: sparse: Fix error checking for write_sparse_chunk_raw
The return value of write_sparse_chunk_raw is unsigned, so the existing
check has no effect. Use IS_ERR_VALUE to detect error instead, which is
what write_sparse_chunk_raw does itself.
Igor has not been active for quite some time on lore:
https://lore.kernel.org/all/?q=igor.opaniuk@gmail.com
I'm interested in helping with maintaining the android_avb
command. I'm a long time android/aosp developer and my daily job is
still doing android work.
Add myself as maintainer for Android AVB.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io> Acked-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20240112-maintainers-ab-v1-2-f2a538eab18a@baylibre.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Igor has not been active for quite some time on lore:
https://lore.kernel.org/all/?q=igor.opaniuk@gmail.com
I'm interested in helping with maintaining the android_ab
command. I'm a long time android/aosp developer and my daily job is
still doing android work.
Tom Rini [Thu, 8 Feb 2024 14:37:16 +0000 (09:37 -0500)]
Merge tag 'u-boot-imx-master-20240208' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Add USB support for phycore-imx8mp
- Fix environment corruption, reset on mx6sabresd
- Print reset cause on imx8
- Extend mkimage to support generating an image for i.MXRT FlexSPI
- Add new apalis and colibri variants
- Add support for phyBOARD-Segin-i.MX93 support
- Fix when FEC is primarily used instead of EQOS on i.MX93.
Primoz Fiser [Tue, 30 Jan 2024 12:43:37 +0000 (13:43 +0100)]
imx9: clock: Fix board_interface_eth_init for FEC
Commit d5eae216d833 ("net: dwc_eth_qos: Add board_interface_eth_init()
for i.MX93") implemented board_interface_eth_init for i.MX9 platforms.
However it only accounted for the EQOS interface while any board using
FEC as primary Ethernet interface was left out as return value -EINVAL
is always returned from the function in such case.
Fix this by returning 0 (success) when FEC interface is primarily used
instead of EQOS interface on i.MX93.
Marek Vasut [Mon, 22 Jan 2024 14:55:48 +0000 (15:55 +0100)]
ARM: imx: Enable kaslrseed command on Data Modul i.MX8M Mini/Plus eDM SBC
Linux 6.6.y with KASLR enabled would print the following message on boot:
"
KASLR disabled due to lack of seed
"
Enable the 'kaslrseed' command so a random number seed can be pulled
from CAAM and inserted into the /chosen node 'kaslr-seed' property of
Linux kernel DT before boot, thus letting KASLR work properly.
Mike Looijmans [Tue, 30 Jan 2024 14:26:56 +0000 (15:26 +0100)]
fsl-layerscape/soc.c: do not destroy bootcmd environment
When an XXX_BOOTCOMMAND isn't defined, the result is that bootcmd is set
to some random memory content. Fix it so that the function does nothing
in that case and leaves the bootcmd environment unmodified.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Dhruva Gole [Tue, 30 Jan 2024 15:00:00 +0000 (20:30 +0530)]
firmware: ti_sci: Add comment explaining the is_secure code
Add a comment to explain the code under is_secure condition of
ti_sci_do_xfer. This will help avoid confusion amongst people who may in
future touch upon this code.
Dhruva Gole [Tue, 30 Jan 2024 14:59:59 +0000 (20:29 +0530)]
firmware: ti_sci: fix the secure_hdr in do_xfer
The ti_sci driver in U-Boot has support for secure_msg as part of it's
do_xfer function. This let's U-boot send secure messages during boot up.
The protocol to send such secure messages is described as part of the
struct ti_sci_secure_msg_hdr. As part of this, there are 2 fields for
checksum and reserved that occupy the first 4 bytes of any secure
message. This is called as the secure_hdr.
As of now, the secure_hdr needs to be 0 init-ed before sending secure
messages. However the existing code was never putting the zero-inited vars
into the secure_buf, leading to possibility of the first 4 bytes of
secure_buf being possibly garbage.
Fix this by initialising the secure_hdr itself to the secure_buf
location, thus when we make secure_hdr members 0, it automatically ensures
the first 4 bytes of secure_buf are 0.
Fixes: 32cd25128bd849 ("firmware: Add basic support for TI System Control Interface (TI SCI)") Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com>
arm: mach-k3: j721s2_init: Support less than max DDR controllers
The number of DDR controllers to be initialised and used should depend
on the device tree with the constraint of the maximum number of
controllers the device supports. Since J721S2 has multiple (2)
controllers, instead of hardcoding the number of probes, move to
depending on the device tree UCLASS_RAM nodes present.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
dma: ti: k3-udma: Use ring_idx to pair k3 nav rings
Use ring_idx to pair rings. ring_idx will be same as tx flow_id for all
non-negative flow_ids. For negative flow_ids, ring_idx will be tchan->id
added with bchan_cnt.
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