common/console.c: In function ‘console_record_reset’:
common/console.c:615:16: error: passing argument 1 of ‘membuff_purge’
discards ‘volatile’ qualifier from pointer target type
[-Werror=discarded-qualifiers]
615 | membuff_purge(&gd->console_out);
| ^~~~~~~~~~~~~~~~
by casting to non-volatile.
The volatile property stems from declarations like
arch/arm/include/asm/global_data.h:114:
But there is no need to treat gd->console_out and gd->console_in as
volatile in the context of common/console.c.
Fixes: b612312816ff ("console: Add a function to read a line of the output / eof") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Thu, 6 Feb 2020 16:12:59 +0000 (17:12 +0100)]
test: aes: fix memleak
In the first version, the result of malloc is checked
with ut_assertnonnull. But on a fail, this macro exit
the function, so previously malloc are not freed.
So to avoid a memleak, we don't use ut_assertnonnull,
but simply check the return of malloc. If one has failed,
we freed all the allocated memory and quit the function.
Tom Rini [Wed, 12 Feb 2020 22:20:25 +0000 (17:20 -0500)]
Merge tag 'arc-fixes-for-2020.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
As usual a bit late a couple of tiny fixes and improvements for ARC.
1. Switch from ARC UART to a convenient DW UART on ARC
simulation platforms. This became avaialble when nSIM got support
of that much more standard UART (starting from nSIM v2019.06).
FWIW also available now in Free nSIM [1].
This among other things allows us finally to use the same one binary
on all our simulators & FPGA-based emulators.
2. Disable networking support on simulated platforms as there's no
network interface in them.
3. Add Virtio net & block devices for the configuration supported
by QEMU so that we may leverage those virtual peripherals and
in fact it's possible to load uImage from TFTP server and bootm it.
4. Minor fixes for HSDK clocks.
5. Rework of how we chose and use compiler options for ARC-based boards.
In real world ARC-based designs are customized more or less but very
rarely match any of our "templates" thus it makes not much sense to
pretend we have some fixed configs, instead we now will fully reply
on a SoC or even board on getting precise set of compiler options
preferably even extracted from real HW via "tcfgen" utility.
6. Well and finally yet another simplification - switch to generic
written in C accessors which are much more universal and just work
for any target supported by the complier as compared to GAS
implementation which is much more target-dependent.
This one was heavily "inspired" by similar implementation for RISCV
and ARM.
Alexey Brodkin [Mon, 20 Jan 2020 10:37:38 +0000 (13:37 +0300)]
ARC: Switch to generic accessors
First of all U-Boot is not that performance oriented as real run-time
software like OS or user bare-metal app so we may afford being not super
fast as we only being executed once. That in return allows us to be more
universal and support wider variety of devices.
And looking forward that will significantly reduce maintenance and simplify
support of newer architectures.
And while at it we add quad-word accessors like readq(), writeq() etc.
Eugeniy Paltsev [Wed, 12 Feb 2020 11:23:54 +0000 (14:23 +0300)]
ARC: rework setting of ARC CPU specific compiler options
It's a very rare if at all existing occasion when ARC CPU template
is used as is w/o any changes - in the end it's a beauty and competitive
advantage of ARC cores to be tailored for a particular use-case - and
so it doesn't make a lot of sense to offer template-based "-mcpu" selection.
Given for each and every platform we end-up adding quite a few more flags
it's logical to move "-mcpu" selection to platform's definition as well
which we exactly do here.
Alexey Brodkin [Thu, 26 Dec 2019 11:47:42 +0000 (14:47 +0300)]
ARC: nsim_hs38: Add support of Virtio NET & BLK
Given now nsim_hs38 configuration is usable on QEMU and in QEMU
we have Virtio working perfectly fine the next logical step
is to add support of supported & known to work net & bkl to this
config.
Alexey Brodkin [Thu, 26 Dec 2019 10:46:27 +0000 (13:46 +0300)]
ARC: nSIM: switch from ARC UART to DW UART
Since v2019.06 DesingWare nSIM supports DesignWare UART simulation
and so we may switch from pretty unusual ARC UART to much more standard
DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART).
This among other things makes built dinaries compatible with our other
platforms to name a few: FPGA-based HAPS boards, QEMU and even ZeBU.
Lukasz Majewski [Sat, 25 Jan 2020 08:00:58 +0000 (09:00 +0100)]
regulator: fix: Move code to enable gpio regulator to pre_probe from ofdata_to_platdata
The commit e8e9715df2d4 ("regulator: fixed: Modify enable-active-high behavior")
fixed the regulator driver behavior when 'enable-active-high' is defined.
Unfortunately, this patch used dm_regulator_platdata()'s "boot_on" member
to set GPIOD_IS_OUT_ACTIVE flag and enable the regulator.
The issue here is that regulator_common_ofdata_to_platdata() is called
_before_ regulator_pre_probe() function in which the 'regulator-boot-on'
property is asserted.
As a result the GPIOD_IS_OUT_ACTIVE flag is not set and gpio_request_by_name()
called in the former function is not enabling the regulator.
This is problematic for e.g. i.MX ethernet driver, which then tries to
perform initialization without power (and fails).
The solution here is to explicitly enable regulator in regulator_pre_probe()
callback only when 'regulator-boot-on' property is present in device tree.
The GPIOD_IS_OUT_ACTIVE flag is not set at all, but relevant gpio is
requested.
- Move P2SB from Apollo Lake to a more generic location
- Add a function to find a device by drvdata in DM core
- Enhancement of DM IRQ uclass driver
- Add a clock driver for Intel devices
- Add support for ACPI general-purpose events
- Add a TPM driver for H1/Cr50
- Enable TPM on Google Chromebook Coral
Jagan Teki [Mon, 30 Dec 2019 14:29:09 +0000 (19:59 +0530)]
doc: fix opensbi build steps for AX25-AE350
OpenSBI build steps are marked as normal text in
AX25-AE350 documentation.
Move them into code-block so-that it can show it
as build steps.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 25 Dec 2019 05:27:44 +0000 (00:27 -0500)]
riscv: Add option to print registers on exception
When debugging, it can be helpful to see more information about an
unhandled exception. This patch adds an option to view the registers at
the time of the trap, similar to the linux output on a kernel panic.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 18 Dec 2019 02:35:32 +0000 (21:35 -0500)]
riscv: Fix breakage caused by linker relaxation
Due to the two-instruction sequence needed to access arbitrary memory
locations, the RISC-V linker aggressively optimises memory accesses and
jumps at link-time. This is called "linker relaxation," and is discussed
in this SiFive article
<https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain>.
One of the optimizations in place is to assume that the __global_pointer
symbol is placed in the gp register. To quote the article:
"...The magic __global_pointer$ symbol is defined to point 0x800 bytes
past the start of the .sdata section. The 0x800 magic number allows
signed 12-bit offsets from __global_pointer$ to address symbols at the
start of the .sdata section. The linker assumes that if this symbol is
defined, then the gp register contains that value, which it can then use
to relax accesses to global symbols within that 12-bit range. The
compiler treats the gp register as a constant so it doesn't need to be
saved or restored, which means it is generally only written by _start,
the ELF entry point."
However, U-Boot instead keeps the global data pointer in gp. This causes
memory accesses and jumps optimized to use the gp pointer to fail. To
fix this problem, we undefine the __global_pointer symbol.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
Use `test' command to test for file existence instead of relying on the
old functionality of the `ext2load' command (which now reports an error
when attempting to load a zero length file).
Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Ian Ray <ian.ray@ge.com>
Robert Beckett [Fri, 31 Jan 2020 13:07:59 +0000 (15:07 +0200)]
board: ge: bx50v3: Enable DM PWM for backlight
Add backlight and panel devicetree definitions
Use UCLASS_PANEL to enable backlight via display enable handler
Remove old explicit gpio code for handling backlight
Use cls command to initiate display in HW agnostic manner
Enable DM regulator and pwm
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Ian Ray [Fri, 31 Jan 2020 13:07:57 +0000 (15:07 +0200)]
board: ge: mx53ppd: enable DM_VIDEO
Enable DM_VIDEO for mx53ppd.
Enable DM_REGULATOR_FIXED and DM_PWM for the backlight.
Remove unused MX53PPD_LCD_POWER.
Remove old (incorrect) setup_iomux_lcd.
Enable backlight via display enable handler.
Use cls command to initiate display in HW agnostic manner.
Modify `failbootcmd' to use lcdputs.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Robert Beckett [Fri, 31 Jan 2020 13:07:54 +0000 (15:07 +0200)]
board: ge: bx50v3, imx53ppd: use DM I2C
Remove old (pre-DM) i2c setup code.
Enable DM i2c.
Convert common code to use DM rtc.
Convert common code to read VPD from eeprom partition.
Convert the generic i2c PMIC init code to use the new da9063 driver.
mx53ppd only:
Correct RTC compatible in device tree.
Enable MXC DM i2c driver.
Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc.
Make GPIO banks available during preloc, since initialisation is done
in board_early_init_f().
Add gpio_request() calls to satisfy the DM_GPIO compatibility API.
Remove unused power configuration.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Ian Ray <ian.ray@ge.com>
Alifer Moraes [Mon, 20 Jan 2020 16:31:02 +0000 (13:31 -0300)]
mx6sabresd: Convert PCI to driver model
Convert imx6sabresd PCI to driver model to fix the following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_PCI Please update
the board to use CONFIG_DM_PCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
After the conversion the following commands were used for testing:
=> pci enum
PCI: Failed autoconfig bar 10
PCI: Failed autoconfig bar 10
=> pci 1
Scanning PCI devices on bus 1
BusDevFun VendorId DeviceId Device Class Sub-Class Reviewed-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Mon, 20 Jan 2020 16:31:01 +0000 (13:31 -0300)]
mx6sabre_common: Remove FEC related settings
In preparation for converting to DM_ETH and moving the FEC symbols
to Kconfig we need to move the FEC definitions to mx6sabreauto.h
and mx6sabresd.h to avoid build breakage during the conversion.
Heiko Schocher [Thu, 30 Jan 2020 13:10:05 +0000 (14:10 +0100)]
imx6: aristainetos: fix NAND detection with latest mainline
commit 88718be30010 ("mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND")
moved CONFIG_NAND -> CONFIG_MTD_RAW_NAND. Adapt board code to this
change, as last merge did not respect the above commit.
Joris Offouga [Wed, 29 Jan 2020 21:06:01 +0000 (22:06 +0100)]
mx7dsabre: Fix usbtog probe when use dfu or ums
Before:
=> ums 0 mmc 0
UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1dacc00
usb dr_mode not found
CTRL+C - Operation aborted
=> dfu 0 mmc 0
usb dr_mode not found
The 'enable-active-high' DTS property configures GPIO so it is active with
HIGH state (by default it is low).
The 'regulator-boot-on' property indicates that the regulator was enabled
in the 'earlier' stage - i.e. bootloader/firmware.
In the XEA case the 'fec-3v3' was configured (as a "wrapper" on GPIO0_0) in
very early SPL code, so it shouldn't be modified at latter stages.
Fabio Estevam [Tue, 21 Jan 2020 13:30:09 +0000 (10:30 -0300)]
mx7ulp_com: Remove unneeded SoC definitions
Since commit 9c27310ac23c ("mx7ulp: Move SoC base address to a common
file") we no longer need to have these SoC definitions in the board
file, so remove them.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
Joel Johnson [Wed, 29 Jan 2020 16:17:18 +0000 (09:17 -0700)]
cmd: mdc/mwc: normalize disjoint MX_CYCLIC usage
Both CMD_MX_CYCLIC and MX_CYCLIC are in use and defined in Kconfig,
but only the non-CMD version currently does anything. This changes all
usages to prefer the CMD_MX_CYCLIC option (since it's only affecting
addition of the commands), and switches defconfigs using the non-CMD
version to use the CMD version.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Tom Rini <trini@konsulko.com>
When a firmware file is missing the warning message doesn't indicate the
firmware file name because '$tmp' var doesn't exist.
Fix the warning message and while at it reduce the if/else statement.
Fabio Estevam [Wed, 29 Jan 2020 16:58:02 +0000 (13:58 -0300)]
gpio: Let DM_74X164 be built without CONFIG_SPL_GPIO
Since commit bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL")
CONFIG_DM_74X164 is no longer built for mx7dsabresd_defconfig, as
this target does not use CONFIG_SPL_GPIO.
Remove such dependency and let the the 74X164 GPIO driver be built
again.
This restores Ethernet functionality on the imx7-sdb board as the
Ethernet reset PHY comes from a GPIO driven by a 74LV595PW I/O
expander.
Fixes: bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Alifer Moraes <alifer.wsdm@gmail.com>
Igor Opaniuk [Tue, 28 Jan 2020 13:42:25 +0000 (14:42 +0100)]
board: toradex: Add Verdin iMX8M Mini support
This adds initial minimal support for the Toradex Verdin iMX8M Mini Quad
2GB WB IT V1.0A module. They are now strapped to boot from eFuses which
are factory fused to properly boot from their on-module eMMC. U-Boot
supports booting from the on-module eMMC only, SDP support is disabled
for now due to missing i.MX 8M Mini USB support.
Functionality wise the following is known to be working:
- eMMC, 8-bit and 4-bit MMC/SD card slots
- Ethernet
- GPIOs
- I2C
Boot sequence is:
SPL ---> ATF (TF-A) ---> U-boot proper
ATF, U-boot proper and u-boot.dtb images are packed into a FIT image,
loaded by SPL.
Boot:
U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
Normal Boot
Trying to boot from MMC1
NOTICE: Configuring TZASC380
NOTICE: RDC off
NOTICE: BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty
NOTICE: BL31: Built : 01:11:41, Jan 25 2020
NOTICE: sip svc init
CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz
Reset cause: POR
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial# 06535149
Net: eth0: ethernet@30be0000
Hit any key to stop autoboot: 0
Verdin iMX8MM #
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Tom Rini [Sat, 8 Feb 2020 00:04:23 +0000 (19:04 -0500)]
Merge branch '2020-02-07-master-imports'
- 2 FAT fixes.
- MediaTek ethernet support improvement.
- Initial Cortina Access CAxxxx family support.
- Correct return value of do_gpio() and so gpio shell command.
Jason Li [Thu, 30 Jan 2020 20:34:58 +0000 (12:34 -0800)]
serial: serial_cortina: add UART DM driver for CAxxxx SoCs
Add serial UART driver support for all Cortina Access
CAxxxx family of SoCs.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Jason Li [Thu, 30 Jan 2020 20:34:57 +0000 (12:34 -0800)]
watchdog: cortina_wdt: add support for HW WDT on CAxxxx SoCs
Add support for hardware watchdog timer on all Cortina Access
CAxxxx family of SoCs.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Jason Li [Thu, 30 Jan 2020 20:34:56 +0000 (12:34 -0800)]
gpio: cortina_gpio: add DM_GPIO driver for CAxxxx SoCs
DM_GPIO based GPIO controller driver for CAxxxx SoCs.
This driver support multiple CPU architectures and
Cortina Access SoC platforms.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Jason Li [Thu, 30 Jan 2020 20:34:55 +0000 (12:34 -0800)]
gpio: do not include <asm/arch/gpio.h> for Cortina CAxxxx SoCs
The Cortina CAxxxx GPIO driver maintains DM_GPIO support
across different CPU ISA in the CAxxxx Soc Family; Not just ARM.
Therefore, it is not desirable to split out and maintain separete
gpio header file for each CPU architecture.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Tom Rini [Wed, 29 Jan 2020 16:03:34 +0000 (11:03 -0500)]
cmd/elf.c: Add SPDX tag
Based on reading the text of the license comment this appears to be
the BSD-2-Clause license but with an imperfect word match as
BSD-2-Clause was not (as far as I recall) a common license choice at the
time the code was written.
Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
fat: write: adjust data written in each partial write
The code for handing file overwrite incorrectly calculated the amount of
data to write when writing to the last non-cluster aligned chunk. Fix
this by ensuring that no more data than the 'filesize' is written to disk.
While touching min()-based calculations, change it to type-safe min_t()
function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch finally fixes the issue revealed by the test script from the
previous patch. The correctness of the change has been also verified by
the following additional test scripts:
The code for handing file overwrite incorrectly assumed that the file on
disk is always contiguous. This resulted in corrupting disk structure
every time when write to existing fragmented file happened. Fix this
by adding proper check for cluster discontinuity and adjust chunk size
on each partial write.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch partially fixes the issue revealed by the following test
script:
Overwritting a discontiguous test file (file0007.raw) no longer causes
corruption to file0003.raw, which's data lies between the chunks of the
test file. The amount of data written to disk is still incorrect, what
causes damage to the file (file0005.raw), which's data lies next to the
test file. This will be fixed by the next patch.
Feel free to prepare a proper sandbox/py_test based tests based on the
provided test scripts.
Simon Glass [Thu, 6 Feb 2020 16:55:04 +0000 (09:55 -0700)]
tpm: Add a driver for H1/Cr50
H1 is a Google security chip present in recent Chromebooks, Pixel phones
and other devices. Cr50 is the name of the software that runs on H1 in
Chromebooks.
This chip is used to handle TPM-like functionality and also has quite a
few additional features.
Simon Glass [Thu, 6 Feb 2020 16:55:01 +0000 (09:55 -0700)]
x86: Add support for ACPI general-purpose events
ACPI GPEs are used to signal interrupts from peripherals that are accessed
via ACPI. In U-Boot these are modelled as interrupts using a separate
interrupt controller. Configuration is via the device tree.
Add a simple driver for this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 6 Feb 2020 16:55:00 +0000 (09:55 -0700)]
dm: irq: Add support for requesting interrupts
At present driver model supports the IRQ uclass but there is no way to
request a particular interrupt for a driver.
Add a mechanism, similar to clock and reset, to read the interrupts
required by a device from the device tree and to request those interrupts.
U-Boot itself does not have interrupt-driven handlers, so just provide a
means to read and clear an interrupt. This can be useful to handle
peripherals which must use an interrupt to determine when data is
available, for example.
Bring over the basic binding file as well, from Linux v5.4. Note that the
older binding is not supported in U-Boot; the newer 'special form' must be
used.
Add a simple test of the new functionality.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 6 Feb 2020 16:54:57 +0000 (09:54 -0700)]
dm: irq: Add support for interrupt controller types
There can be different types of interrupt controllers in a system and some
drivers may need to distinguish between these. In general this can be
handled using the device tree by adding the interrupt information to
device nodes.
However on x86 devices we have interrupt controllers which are not tied
to any particular device and not really used in U-Boot. These still need
to be inited, so a convenient method is to give each controller a type
and allow a particular controller type to be probed.
Add support for this in sandbox along with a test.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the new bland line at EOF of test/dm/irq.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 6 Feb 2020 16:54:55 +0000 (09:54 -0700)]
x86: apl: Drop the I2C config in FSP-S
This config is not actually used here and in U-Boot it seems better to set
this using the device tree for each individual controller. The monolithic
config of the FSP-S is only necessary if the FSP is actually configuring
something, but here it is not.
The FSP-S does enable/disable the various I2C ports. It might be nice to
handle this using the okay/disabled property of each port, but that can be
considered later.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>