Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

Merge branch 'master' of git://git.denx.de/u-boot-sh

Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

sh: Remove CC line from board's Makefile

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Replaced "@./mkconfig" for @$(MKCONFIG)

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Add support sh2 to MAKEALL

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Fix compile error rsk7203 board

This boards used old type preprocessor.
This patch fix compile error.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Fix compile error sh7785lcr board

This boards used old type preprocessor.
This patch fix compile error.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Renesas Solutions AP325RXA board support

AP325RXA is SH7723's reference board.
This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
In this patch, support SCIF, NOR Flash, and Ethernet.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: add support Renesas SH7723

Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other.
This patch supports CPU register's header file and SCIF serial driver.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Renesas RSK+ 7203 board support

This adds initial support for the RTE RSK+ SH7203 board.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Add support Renesas SH7203 processor

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Add support SH2/SH2A which is CPU of Renesas Technology

Add support SH2/SH2A basic function.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: Renesas R0P7785LC0011RL board support

This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
Graphic, Ethernet, USB, SD, RTC, and I2C controller.

This patch supports the following functions:
 - 128MB DDR2-SDRAM (29-bit address mode only)
 - NOR Flash
 - USB host
 - Ethernet

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: add support for SH7785

Renesas SH7785 has DDR2-SDRAM controller, PCI, and other.
This patch supports CPU register's header file.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

davinci: fix remaining dm644x_eth

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

smdk6400: add gitignore

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

smdk6400: Use CONFIG_FLASH_CFI_DRIVER

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

smdk6400: remove redundant bootargs definition

Double bootargs setting leads to a duplicated environmant entry.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

ARM: Add support for S3C6400 based SMDK6400 board

SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

NAND: add NAND driver for S3C64XX

Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

S3C64XX: remove broken HWFLOW support from the serial driver

As noted by Harald Welte, HWFLOW support in the S3C64XX serial driver is
broken and currently unused. Remove it.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

serial: add S3C64XX serial driver

Based on the original S3C64XX UART driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

USB: Add support for OHCI controller on S3C6400

Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

ARM: Add arm1176 core with S3C6400 SoC

Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

ARM DaVinci: Changing function names for EMAC driver

DM644x is just one of a series of DaVinci chips that use the EMAC driver.
By replacing all the function names that start with dm644x_* to davinci_*
we make these function more portable. I have tested this change on my EVM.
DM6467 is another DaVinci SOC which uses the EMAC driver and i will
be sending patches that add DaVinci DM6467 support to the list soon.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

Integrator[AP/CP] - Remove unused file memsetup.S

- memsetup.s is changed/merged to lowlevel_init.S
  memsetup.S has a global label memsetup that just returns back to caller
- memsetup global label is changed/merged to lowlevel_init
  This label is not called from anywhere.

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>

ARM DaVinci: Standardize names of directories/files

ARM DaVinci: Standardize names of directories/files.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM DaVinci: Move common functions to board/davinci/common

ARM DaVinci: Move common functions to board/davinci/common.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>

ppc4xx/NAND: Add select_chip function to 4xx NDFC driver

This function is needed for the new NAND infrastructure. We only need
a dummy implementation though for the NDFC.

Signed-off-by: Stefan Roese <sr@denx.de>

ppc4xx: Increase image size for NAND boot target

This is needed since now with HUSH enabled (amcc-common.h) the image
read from NAND exceeds the previous limit.

Signed-off-by: Stefan Roese <sr@denx.de>

Move MPC512x_FEC driver to drivers/net

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Move MPC5xxx_FEC driver to drivers/net

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

ppc4xx: NAND configuration

Made NAND bank configuration setting a config variable.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Stefan Roese <sr@denx.de>

ppc4xx: fix UIC external_interrupt hang on UIC0

This patch fixes a UIC external_interrupt hang if critical or non-critical
interrupt is set at the same time as a normal interrupt is set on UIC0.

Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>

ppc4xx: Optimizations/Cleanups for IBM DDR2 Memory Controller

Removed Magic numbers from Initialization preload registers
Tested with Kilauea, Glacier, Canyonlands and Katmai boards
About 5-7% improvement seen for LMBench memtests

Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>

ADS5121: Fix NOR and CPLD ALE timing for rev 2 silicon

MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.

The default is to assert CS together with ALE.  The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.

The default is wrong for the NOR flash and CPLD on the ADS5121.

This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.

Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>

Add I2C frequency dividers for ColdFire

The existing I2C freqency dividers for FDR does not apply
to ColdFire platforms; thus, a seperate table is added
based on MCF5xxx Reference Manual

Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Tabi Timur <timur@freescale.com>

ColdFire: I2C fix for multiple platforms

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

ColdFire: Add CONFIG_MII_INIT for M5272C3

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

ColdFire: Multiple fixes for MCF5445x platforms

Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

ColdFire: Change the SDRAM BRD2WT timing from 3 to 7

The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

ColdFire: Raise uart baudrate to 115200 bps

M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
uart baudrate increase from 19200 to 115200 bps

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

ColdFire: Fix board.c warning message

Implicit declaration of nand_init() warning message

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

Merge branch 'master' of /home/wd/git/u-boot/custodians

Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.

Signed-off-by: Heiko Schocher <hs@denx.de>

mpc85xx: remove redudant code with lib_ppc/interrupts.c

For some reason we duplicated the majority of code in lib_ppc/interrupts.c
not show how that happened, but there is no good reason for it.

Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

mpc85xx: Add support for the MPC8536DS reference board

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

mpc85xx: Add support for the MPC8536

The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>

mpc85xx: Add support for the MPC8572DS reference board

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Remove old SPD support from cpu/mpc85xx

All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert STXSSA to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert STXGP3 to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert SBC8560 to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8540EVAL to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert PM856 to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert PM854 to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert sbc8548 to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert atum8548 to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert socrates to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8544DS to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8568MDS to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8548CDS to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8541CDS to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8555ADS to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8560ADS to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8540ADS to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Add 85xx specific register setting

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Add e500 TLB helper for DDR code

Provide a helper function that board code can call to map TLBs when
setting up DDR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

dm9000 remove dead external phy support, gpio fix

dm9000 has code to detect and initialize external phy parts, but later
on in the code the part is forced to use the internal phy
unconditionally.  Remove the unused/untested code.

change the GPIO initialization so that only the GPIO used as an
internal phy reset (hardwired in the chip) is set as an output.  The
remaining GPIO need to be handled by board specific code to prevent
possible drive conflicts.  Set as inputs for safety.

replace a few magic numbers with defines

Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Standardize bootp, tftpboot, rarpboot, dhcp, and nfs command descriptions

cmd_net.c command descriptions were updated to describe the optional
hostIPaddr argument.  The dhcp command help message was also updated
to more closely reflect the other commands in cmd_net.c

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Fix bogus error message in the DHCP handler

The DHCP handler has 1 state that is not listed in this case, causing a
failure message when there is actually no failure.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Fix compile error when CONFIG_BOOTP_RANDOM_DELAY is set.

The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a
missing extern inside the net/bootp.h header

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

ColdFire: Add FEC Buffer descriptors in SRAM

Add FEC Buffer descriptors and data buffer in SRAM for
faster execution and access.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Fix ColdFire FEC warning messages

Types mismatch and implicit declaration of icache_invalid()
warning messages

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved initialization of SKGE Ethernet driver to board code.

The only board using this driver is the SL8245 board.
Removed initialization for the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved conditional compilation to Makefile for SK98 Ethernet driver

Brute-force removal of #ifdefs.  Didn't touch the code.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved initialization of ULI526X Ethernet driver to board code.

The only board using this driver is the Freescale MPC8610HPCD board.
Removed initialization for the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved initialization of Blackfin EMAC Ethernet controller to board_eth_init()

Added board_eth_init() function to bf537-stamp board.
Removed initialization for the Blackin EMAC driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved initialization of GRETH Ethernet driver to CPU directory

Added a cpu_eth_init() function to leon2/leon3 CPU directories and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved initialization of MCFFEC Ethernet driver to CPU directory

Added a cpu_eth_init() function to coldfire CPU directories and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Moved initialization of FSL_MCDMAFEC Ethernet driver to CPU directory

Added a cpu_eth_init() function to cpu/mcf547x_8x directory and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

FSL DDR: Remove old SPD support from cpu/mpc86xx

All 86xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert SBC8641D to new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8610HPCD to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Convert MPC8641HPCN to new DDR code.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Add 86xx specific register setting

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Add DDR2 DIMM paramter support

Compute DIMM parameters based upon the SPD information.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Add DDR1 DIMM paramter support

Compute DIMM parameters based upon the SPD information in spd.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.

The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers.  (83xx, 85xx, 86xx).

The code is broken up into the following steps:
GET_SPD
COMPUTE_DIMM_PARMS
COMPUTE_COMMON_PARMS
GATHER_OPTS
ASSIGN_ADDRESSES
COMPUTE_REGS
PROGRAM_REGS

This allows us to share more code an easily allow for board specific code
overrides.

Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

FSL DDR: Provide a generic set_ddr_laws()

Provide a helper function that will setup the last available
LAWs (upto 2) for DDR.  Useful for SPD/dyanmic DDR setting code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Add proper SPD definitions for DDR1/2/3

Also adds helper functions for DDR1/2 to verify the checksum.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>

Add support for muas3001 board (MPC8270)

Signed-off-by: Heiko Schocher <hs@denx.de>

common/cmd_load.c cleanup - remove unused variables

- Remove unused global variable os_data_count.
- Remove unused variable z.

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>

remove MVS1 board

MVS1 board has reached end-of-life and can be removed completely.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>