]> git.dujemihanovic.xyz Git - u-boot.git/log
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17 months agoexpo: Allow setting the start of the dynamic-ID range
Simon Glass [Thu, 1 Jun 2023 16:22:47 +0000 (10:22 -0600)]
expo: Allow setting the start of the dynamic-ID range

Provide a way to set this value so that it is easy to separate the
statically allocated IDs (generated by the caller) from those
generated dynamically by expo itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoconsole: Allow measuring the bounding box of text
Simon Glass [Thu, 1 Jun 2023 16:22:46 +0000 (10:22 -0600)]
console: Allow measuring the bounding box of text

For laying out text accurately it is necessary to know the width and
height of the text. Add a measure() method to the console API, so this
can be supported.

Add an implementation for truetype and a base implementation for the
normal console.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agovideo: Allow temporary colour changes
Simon Glass [Thu, 1 Jun 2023 16:22:45 +0000 (10:22 -0600)]
video: Allow temporary colour changes

It is sometimes necessary to highlight some text in a different colour.
Add an easy way to do this and then restore the original console colours.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agovideo: Correct docs for video_index_to_colour()
Simon Glass [Thu, 1 Jun 2023 16:22:44 +0000 (10:22 -0600)]
video: Correct docs for video_index_to_colour()

This uses the private data of the video uclass, not the console uclass
(its child). Update the comment to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: a032e4b55ea ("video: Move console colours to the video uclass")
17 months agobootstd: Add a separate log category for expo
Simon Glass [Thu, 1 Jun 2023 16:22:43 +0000 (10:22 -0600)]
bootstd: Add a separate log category for expo

This feature is different enough from bootstd that it probably deserves
its own log category. It cannot use a uclass since it is not a device.

Add a new category.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agofdt: Allow more general use of livetree
Simon Glass [Thu, 1 Jun 2023 16:22:42 +0000 (10:22 -0600)]
fdt: Allow more general use of livetree

At present livetree can only be used for the control FDT. It is useful
to be able to use the ofnode API for other FDTs, e.g. those used by
the upcoming configuration editor.

We already have most of the support present, and tests can be marked with
the UT_TESTF_OTHER_FDT flag to use another FDT as a special case. But
with this change, the functionality becomes more generally available.

Plumb in the require support.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agofdt: Clarify the fdt pre-relocation warning
Simon Glass [Thu, 1 Jun 2023 16:22:41 +0000 (10:22 -0600)]
fdt: Clarify the fdt pre-relocation warning

Reword this so it is easier to understand.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agofdt: Align the start of the livetree
Simon Glass [Thu, 1 Jun 2023 16:22:40 +0000 (10:22 -0600)]
fdt: Align the start of the livetree

Ensure that the block of memory used by live tree is aligned according to
the default for structures. This ensures that the root node appears at
the start of the block, so it can be used with free(), rather than being
4 bytes later in some cases.

This corrects a rather obscure bug in unflatten_device_tree().

Fixes: 8b50d526ea5 ("dm: Add a function to create a 'live' device tree")
Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agocat: Update command to use fs_load_alloc()
Simon Glass [Thu, 1 Jun 2023 16:22:39 +0000 (10:22 -0600)]
cat: Update command to use fs_load_alloc()

Use this new function since it implements the required functionality and
reduces duplicated code.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agofs: Create functions to load and allocate a file
Simon Glass [Thu, 1 Jun 2023 16:22:38 +0000 (10:22 -0600)]
fs: Create functions to load and allocate a file

This functionality current sits in bootstd, but it is more generally
useful. Add a function to load a file into memory, allocating it as
needed. Adjust bootstd to use this version.

Note: Tests are added in the subsequent patch which converts the 'cat'
command to use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoexpo: Rename exp_set_text_mode()
Simon Glass [Thu, 1 Jun 2023 16:22:37 +0000 (10:22 -0600)]
expo: Rename exp_set_text_mode()

Rename this function to match its peers, using the full "expo' prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoconsole: Correct truetype spacing error
Simon Glass [Thu, 1 Jun 2023 16:22:36 +0000 (10:22 -0600)]
console: Correct truetype spacing error

The putc_xy() method is supposed to return the amount of space used. The
existing implementation erroneously adds the previous sub-pixel position
to the returned value. This spaces out the characters very slightly more
than it should. It is seldom noticeable but it does make accurate
measurement of the text impossible.

Fix this minor but long-standing bug.

Fixes: a29b012037c ("video: Add a console driver that uses TrueType fonts")
Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoexpo: Avoid automatically arranging the scene
Simon Glass [Thu, 1 Jun 2023 16:22:35 +0000 (10:22 -0600)]
expo: Avoid automatically arranging the scene

This should ideally be done once after all scene changes have been made.
Require an explicit call when everything is ready.

Always arrange after a key it sent, just for convenience.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoexpo: Store the console in the expo
Simon Glass [Thu, 1 Jun 2023 16:22:34 +0000 (10:22 -0600)]
expo: Store the console in the expo

Rather than finding this each time, keep a pointer to it. This simplifies
the code a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agovideo: Provide a way to clear part of the console
Simon Glass [Thu, 1 Jun 2023 16:22:33 +0000 (10:22 -0600)]
video: Provide a way to clear part of the console

This is useful when the background colour must be written before text
is updated, to avoid strange display artifacts.

Add a function for this, using the existing code from the truetype
console.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agovideo: Drop #ifdefs from console_truetype
Simon Glass [Thu, 1 Jun 2023 16:22:32 +0000 (10:22 -0600)]
video: Drop #ifdefs from console_truetype

Use if() instead to reduce the number of build paths.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agodm: core: Avoid registering an inaccessible tree
Simon Glass [Thu, 1 Jun 2023 16:22:31 +0000 (10:22 -0600)]
dm: core: Avoid registering an inaccessible tree

At present there are various restrictions on the use of livetree:

- It is only available once the tree is unflattened, i.e. after relocation
- It is designed to be used with the control FDT
- It can (in principle) be used with other FDTs, but only if they are
  unflattened first; this is not supported

Add a few checks to make sure that any tree that is created is actually
valid. Otherwise it can be confusing when nodes and properties cannot
actually be accessed.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agogpio: Avoid using an invalid ofnode
Simon Glass [Thu, 1 Jun 2023 16:22:30 +0000 (10:22 -0600)]
gpio: Avoid using an invalid ofnode

Devices do not necessarily have nodes attached to them, since they can be
created from platdata. In SPL a devicetree may in fact not exist at all.

Check the node before using it. This avoids failure when OF_CHECKS is
enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 5fc7cf8c8e2 ("gpio: add gpio-hog support")
Reviewed-by: Heiko Schocher <hs@denx.de>
17 months agotest: Restore test behaviour on failure
Simon Glass [Thu, 1 Jun 2023 16:22:29 +0000 (10:22 -0600)]
test: Restore test behaviour on failure

A recent change makes test continue to run after failure. This results in
a lot of useless output and may lead to a segfault. Fix this by adding
back the 'return' statement.

Fixes: fa847bb409d ("test: Wrap assert macros in ({ ... }) and fix")
Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agosandbox: Fix quiting when the LCD window is closed
Simon Glass [Thu, 1 Jun 2023 16:22:28 +0000 (10:22 -0600)]
sandbox: Fix quiting when the LCD window is closed

With recent changes to how sandbox handles reset, closing the window
currently just restarts sandbox.

Use the correct sysreset type to tell it to shut down.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoexpo: Convert to using a string ID for the scene title
Simon Glass [Thu, 1 Jun 2023 16:22:27 +0000 (10:22 -0600)]
expo: Convert to using a string ID for the scene title

This is easier to deal with if it uses the existing string handling,
since we will be able to use translations, etc. in the future.

Update it to use an ID instead of a string.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoexpo: Correct some header-file comments
Simon Glass [Thu, 1 Jun 2023 16:22:26 +0000 (10:22 -0600)]
expo: Correct some header-file comments

The use of Returns instead of @return still confuses me. Fix some problems
that have crept in.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agobinman: Correct coverage gap in control
Simon Glass [Thu, 1 Jun 2023 16:22:25 +0000 (10:22 -0600)]
binman: Correct coverage gap in control

Add a pragma to deal with the code-coverage gap which drops binman down to
90% coverage.

Fixes: de65b122a25 (tools: Fall back to importlib_resources on Python 3.6)
Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agobdinfo: Correct use of assertions
Simon Glass [Wed, 12 Jul 2023 02:46:30 +0000 (20:46 -0600)]
bdinfo: Correct use of assertions

This test was written for the incorrect use of assertions. Update it to
build with the previous approach, where tests fail at the first
assertion.

All assertion functions return 0 on success and non-zero on failure.
They can be nested into functions simply by declaring a function that
returns an int and using ut_assertok() to call it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
17 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Fri, 14 Jul 2023 00:39:10 +0000 (20:39 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- Add xtxtech spi-nor chip parts (Bruce Suen)
- Add bcm63xx-hsspi driver fixes (William Zhang)

17 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Fri, 14 Jul 2023 00:38:50 +0000 (20:38 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- mvebu: Thecus: Misc enhancement and cleanup (Tony)
- mvebu: Add AC5X Allied Telesis x240 board support incl NAND
  controller enhancements for this SoC (Chris)

17 months agoMerge tag 'u-boot-imx-20230713' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Fri, 14 Jul 2023 00:38:24 +0000 (20:38 -0400)]
Merge tag 'u-boot-imx-20230713' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230713
-------------------

Merge for 2023.10.

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16888

17 months agoarm: mvebu: Remove unused alias from RC AC5X dts
Chris Packham [Sun, 9 Jul 2023 22:47:37 +0000 (10:47 +1200)]
arm: mvebu: Remove unused alias from RC AC5X dts

The sar-reg0 alias was left over from an earlier iteration of the
patches adding support for this board. Remove the unused alias.

Fixes: 6cc8b5db40 ("arm: mvebu: Add RD-AC5X board")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
17 months agoarm: mvebu: Add Allied Telesis x240 board
Chris Packham [Sun, 9 Jul 2023 22:47:36 +0000 (10:47 +1200)]
arm: mvebu: Add Allied Telesis x240 board

The x240 and SE240 are a series of L2+ switches from Allied Telesis.
There are a number of them in the range but as far as U-Boot is
concerned all the CPU block components are the same so there's only one
board defined.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
17 months agomx7dsabresd: Retrieve the second MAC address from fuses
Fabio Estevam [Tue, 11 Jul 2023 21:57:57 +0000 (18:57 -0300)]
mx7dsabresd: Retrieve the second MAC address from fuses

Currently, a random MAC address is assigned to eth1 in Linux.

Fix this behavor by retrieving the second MAC address from the fuses.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agoarm64: imx: imx8mp-beacon: Enable LTO
Adam Ford [Mon, 29 May 2023 18:08:34 +0000 (13:08 -0500)]
arm64: imx: imx8mp-beacon: Enable LTO

With LTO enabled, SPL shrinks about 10K and U-Boot shrinks
about 30K.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoconfig: xea: Disable support for FAT file system
Lukasz Majewski [Wed, 12 Jul 2023 10:20:47 +0000 (12:20 +0200)]
config: xea: Disable support for FAT file system

On the XEA (imx287) system the FAT file system is not used neither in
SPL nor u-boot proper.

Hence, to save ~6KiB of u-boot.img size - it has been disabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agoconfig: xea: Disable support for boot methods EXTLINUX and VBE
Lukasz Majewski [Wed, 12 Jul 2023 10:20:46 +0000 (12:20 +0200)]
config: xea: Disable support for boot methods EXTLINUX and VBE

The XEA system (imx287 based) is not using support for EXTLINUX and VBE.
As those configuration options have been enabled by default with modern
Kconfig it is safe to explicitly disable them.

After that change the u-boot.img size has been reduced by ~16 KiB.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agomx23_olinuxino: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Tue, 11 Jul 2023 21:09:03 +0000 (18:09 -0300)]
mx23_olinuxino: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agomx23evk: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Tue, 11 Jul 2023 21:09:02 +0000 (18:09 -0300)]
mx23evk: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agomx28evk: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Tue, 11 Jul 2023 21:09:01 +0000 (18:09 -0300)]
mx28evk: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agoarm64: dts: verdin-imx8mp: add ctrl_sleep_moci# hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:18 +0000 (11:09 +0200)]
arm64: dts: verdin-imx8mp: add ctrl_sleep_moci# hog

Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal
may be used to control some power-rails on the carrier board, therefore
it should be set to high when the module is booting.

To do this as early as possible is generally a good idea and the issue
was noticed on the Yavia carrier board where it is needed to power the
I2C EEPROM on the carrier board.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoconfigs: verdin-imx8mp: enable spl_gpio_hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:17 +0000 (11:09 +0200)]
configs: verdin-imx8mp: enable spl_gpio_hog

Enable CONFIG_SPL_GPIO_HOG option to be able to control GPIO hogs from
SPL.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoarm64: dts: verdin-imx8mm: add ctrl_sleep_moci# hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:16 +0000 (11:09 +0200)]
arm64: dts: verdin-imx8mm: add ctrl_sleep_moci# hog

Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal
may be used to control some power-rails on the carrier board, therefore
it should be set to high when the module is booting.

To do this as early as possible is generally a good idea and the issue
was noticed on the Yavia carrier board where it is needed to power the
I2C EEPROM on the carrier board.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoconfigs: verdin-imx8mm: enable spl_gpio_hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:15 +0000 (11:09 +0200)]
configs: verdin-imx8mm: enable spl_gpio_hog

Enable CONFIG_SPL_GPIO_HOG option to be able to control GPIO hogs from
SPL.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoverdin-imx8mm/verdin-imx8mp: synchronise device trees with linux
Marcel Ziswiler [Tue, 11 Jul 2023 09:09:14 +0000 (11:09 +0200)]
verdin-imx8mm/verdin-imx8mp: synchronise device trees with linux

Synchronise device trees with linux v6.5-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoarm: dts: imx8mp-beacon-kit: Enable USB Power domains
Adam Ford [Tue, 30 May 2023 22:49:34 +0000 (17:49 -0500)]
arm: dts: imx8mp-beacon-kit: Enable USB Power domains

The USB Power domains should not have been removed as it causes
the board to hang if the USB is started.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
17 months agoarm: dts: imx8mp: Sync the DT with kernel 6.4-rc4
Adam Ford [Tue, 30 May 2023 22:45:58 +0000 (17:45 -0500)]
arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4

Several changes have been made to the device tree
in the kernel, so update that as well as the
corresponding imx8mp-u-boot.dtsi files to prevent
breaking the booting.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
17 months agoclk: imx8mp: Update clocks based on kernel 6.4-RC4
Adam Ford [Tue, 30 May 2023 22:45:57 +0000 (17:45 -0500)]
clk: imx8mp: Update clocks based on kernel 6.4-RC4

There are some newer clocks added to the kernel recently,
so to fix prepare for resycing the device trees, update
the clock list.  Since there are some minor changes to
the USB clocks, update which USB clocks are enabled
to match with the upstream kernel as well.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
17 months agoboard: colibri-imx8x: initialize snvs
Andrejs Cainikovs [Mon, 3 Apr 2023 11:14:26 +0000 (13:14 +0200)]
board: colibri-imx8x: initialize snvs

Initialize Secure Non-Volatile Storage, aka SNVS.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
17 months agoimx8mn-var-som: adjust PHY reset gpios according to hardware configuration
Hugo Villeneuve [Thu, 25 May 2023 21:02:29 +0000 (17:02 -0400)]
imx8mn-var-som: adjust PHY reset gpios according to hardware configuration

For SOM with the EC configuration, the ethernet PHY is located on the
SOM itself, and connected to the CPU ethernet controller. It has a
reset line controlled via GPIO1_IO9. In this configuration, the PHY
located on the carrier board is not connected to anything and is
therefore not used.

For SOM without EC configuration, the ethernet PHY on the carrier
board is connected to the CPU ethernet controller. It has a reset line
controlled via the GPIO expander PCA9534_IO5.

The hardware configuration (EC) is determined at runtime by
reading from the SOM EEPROM.

To support both hardware configurations (EC and non-EC), adjust/fix
the PHY reset gpios according to the hardware configuration
read at runtime from the SOM EEPROM. This adjustement is done in
U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
17 months agoARM: dts: imx: Fix eMMC boot on Data Modul i.MX8M Plus eDM SBC
Marek Vasut [Wed, 5 Jul 2023 23:26:10 +0000 (01:26 +0200)]
ARM: dts: imx: Fix eMMC boot on Data Modul i.MX8M Plus eDM SBC

In case the i.MX8M Plus starts from eMMC BOOT1/BOOT2 HW partitions, the
flash.bin container is stored at offset 0 from the start, that means the
fitImage itb is at offset 0x2c0 instead of 0x300 sectors from the start.
Handle this difference in custom spl_mmc_get_uboot_raw_sector() .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
17 months agoimx93_evk: defconfig: add adc support
Luca Ellero [Wed, 5 Jul 2023 12:56:17 +0000 (14:56 +0200)]
imx93_evk: defconfig: add adc support

iMX93 ADC features:
    - 4 channels
    - 12 bit resolution

Signed-off-by: Luca Ellero <l.ellero@asem.it>
17 months agodm: adc: add iMX93 ADC support
Luca Ellero [Wed, 5 Jul 2023 12:56:16 +0000 (14:56 +0200)]
dm: adc: add iMX93 ADC support

This commit adds driver for iMX93 ADC.

The driver is implemented using driver model and provides
ADC uclass's methods for ADC single channel operations:
    - adc_start_channel()
    - adc_channel_data()
    - adc_stop()

ADC features:
    - channels: 4
    - resolution: 12-bit

Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
17 months agoARM: imx: romapi: Fix signed integer bitwise ops misuse
Marek Vasut [Sun, 2 Jul 2023 01:03:51 +0000 (03:03 +0200)]
ARM: imx: romapi: Fix signed integer bitwise ops misuse

Bitwise operations on signed integers are not defined,
replace them with per-call checks.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
17 months agoconfigs: imx8m: Prepare imx8m-venice boards for HAB support
Tim Harvey [Fri, 23 Jun 2023 16:44:59 +0000 (09:44 -0700)]
configs: imx8m: Prepare imx8m-venice boards for HAB support

In order to enable HAB, FSL_CAAM, ARCH_MISC_INIT and
SPL_CRYPTO should be enabled in Kconfig like other i.MX8M
boards.

This also needs to occur in the SPL so enable CONFIG_SPL_BOARD_INIT and
add a void spl_board_init function which calls arch_misc_init to probe
the CAAM driver.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoboard: gateworks: venice: switch to 2-bank dram config
Tim Harvey [Fri, 23 Jun 2023 16:44:17 +0000 (09:44 -0700)]
board: gateworks: venice: switch to 2-bank dram config

Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoboard: phytec: phycore_imx8mm: Update lpddr4_timing
Cem Tenruh [Fri, 16 Jun 2023 08:28:13 +0000 (10:28 +0200)]
board: phytec: phycore_imx8mm: Update lpddr4_timing

Update RAM Timings for 2GB RAM based on DDR Controller Configuration
Spreadsheet revision 22. Including the update of the refresh
rate to workaround errata ERR050805.

Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
17 months agomx8m: csf.sh: use vars for keys to avoid file edits when signing
Tim Harvey [Thu, 15 Jun 2023 15:21:08 +0000 (08:21 -0700)]
mx8m: csf.sh: use vars for keys to avoid file edits when signing

The csf_spl.txt and csf_fit.txt templates contain file paths which must
be edited for the location of your NXP CST generated key files.

Streamline the process of signing an image by assigning unique var names
to these which can be expended from env variables in the csf.sh script.

The following vars are used:
 SRK_TABLE - full path to SRK_1_2_3_4_table.bin
 CSF_KEY - full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem
 IMG_KEY - full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem

Additionally provide an example of running the csf.sh script.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: fsl_sec: preprocessor casting issue with addresses involving math
Utkarsh Gupta [Thu, 15 Jun 2023 10:09:27 +0000 (18:09 +0800)]
imx: fsl_sec: preprocessor casting issue with addresses involving math

The sec_in32 preprocessor is defined as follows in include/fsl_sec.h file:
When address "a" is calculated using math for ex: addition of base address and
an offset, then casting is applied only to the first address which in this
example is base address.

caam_ccbvid_reg = sec_in32(CONFIG_SYS_FSL_SEC_ADDR + CAAM_CCBVID_OFFSET)
resolves to:
caam_ccbvid_reg = in_le32((ulong *)(ulong)CONFIG_SYS_FSL_SEC_ADDR +
 CAAM_CCBVID_OFFSET)
instead it should resolve to:
caam_ccbvid_reg = in_le32((ulong *)(ulong)(CONFIG_SYS_FSL_SEC_ADDR +
 CAAM_CCBVID_OFFSET))

Thus add parenthesis around the address "a" so that however the address is
calculated, the casting is applied to the final calculated address.

Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: priblob: Update to use structure
Maximus Sun [Thu, 15 Jun 2023 10:09:26 +0000 (18:09 +0800)]
imx: priblob: Update to use structure

Use structure to avoid define CAAM_SCFGR for each platform

Signed-off-by: Maximus Sun <maximus.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8m: add CAAM_BASE_ADDR
Peng Fan [Thu, 15 Jun 2023 10:09:25 +0000 (18:09 +0800)]
imx: imx8m: add CAAM_BASE_ADDR

Add CAAM_BASE_ADDR which will be used by priblob.c

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8: ahab: sha256: enable image verification using ARMv8 crypto extension
Gaurav Jain [Thu, 15 Jun 2023 10:09:24 +0000 (18:09 +0800)]
imx: imx8: ahab: sha256: enable image verification using ARMv8 crypto extension

add support for SHA-256 secure hash algorithm using the ARM v8
SHA-256 instructions for verifying image hash.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ahab: Update AHAB for iMX8 and iMX8ULP
Ye Li [Thu, 15 Jun 2023 10:09:23 +0000 (18:09 +0800)]
imx: ahab: Update AHAB for iMX8 and iMX8ULP

Abstract common interfaces for AHAB authentication operations.
Then share some common codes for AHAB and SPL container authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: parse-container: Use malloc for container processing
Nitin Garg [Thu, 15 Jun 2023 10:09:22 +0000 (18:09 +0800)]
imx: parse-container: Use malloc for container processing

If the container has image which conflicts with
spl_get_load_buffer address, there are processing failures.
Use malloc instead of spl_get_load_buffer.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8m: clock: not configure reserved SRC register
Peng Fan [Thu, 15 Jun 2023 10:09:21 +0000 (18:09 +0800)]
imx: imx8m: clock: not configure reserved SRC register

i.MX8M[M,N,P] SRC not has 0x1004 offset register, so drop it.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8: bootaux: Add i.MX8 M4 boot support
Ye Li [Thu, 15 Jun 2023 10:09:20 +0000 (18:09 +0800)]
imx: imx8: bootaux: Add i.MX8 M4 boot support

1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
   M4 image to any DDR address first. Then use the
   "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
   or CM4_1, the default core id is 0 for CM4_0.

   Since current M4 only supports running in TCM. The bootaux will copy
   the M4 image from DDR to its TCML.

2. Implment bootaux for HIFI on QXP
   command: bootaux 0x81000000 1

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: bootaux: Fix bootaux issue when running on ARM64
Ye Li [Thu, 15 Jun 2023 10:09:19 +0000 (18:09 +0800)]
imx: bootaux: Fix bootaux issue when running on ARM64

The bootaux uses ulong to read private data and write to M4 TCM,
this cause problem on ARM64 platform where the ulong is 8bytes.
Fix it by using u32 to replace ulong.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: bootaux: change names of MACROs used to boot MCU on iMX devices
Peng Fan [Thu, 15 Jun 2023 10:09:18 +0000 (18:09 +0800)]
imx: bootaux: change names of MACROs used to boot MCU on iMX devices

The current bootaux supports i.MX8M and i.MX93, but the name "_M4_"
implies that the SoCs have Cortex-M4. Actually i.MX8MM/Q use Cortex-M4,
i.MX8MN/P use Cortex-M7, i.MX93 use Cortex-M33, so use "_MCU_" in place
of "_M4_" to simplify the naming.

Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: iamge-container: support secondary container
Peng Fan [Thu, 15 Jun 2023 10:09:17 +0000 (18:09 +0800)]
imx: iamge-container: support secondary container

Add the support for loading image from secondary container set on
iMX8QM B0, iMX8QXP C0.

Using the SCFW API to get container set index, if it is the secondary
boot, get the offset from fuse and apply to offset of current container
set beginning for loading.

Also override the emmc boot partition to check secondary boot and switch
to the other boot part.

This patch is modified from NXP downstream:
imx8: Fix the fuse used by secondary container offset
imx: container: Skip container set check for ROM API
imx8: spl: Support booting from secondary container set

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: image-container: Fix container header checking
Ye Li [Thu, 15 Jun 2023 10:09:16 +0000 (18:09 +0800)]
imx: image-container: Fix container header checking

Checking container header tag and version is wrong, it causes to fail
to bypass invalid container

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: hab: Fix coverity issue in HAB event decoding
Ye Li [Thu, 15 Jun 2023 10:09:15 +0000 (18:09 +0800)]
imx: hab: Fix coverity issue in HAB event decoding

Fix below coverity issues caused by get_idx function where "-1" is
compared with uint8_t "element"
343336 Unsigned compared with neg
343337 Operands don't affect result

Additional, this function returns "-1" will cause overflow to
event string array.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8ulp: start the ELE RNG at boot
Peng Fan [Thu, 15 Jun 2023 10:09:14 +0000 (18:09 +0800)]
imx: imx8ulp: start the ELE RNG at boot

On the imx8ulp A1 SoC, the ELE RNG needs to be manually started.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: misc: ele_mu: Update ELE MU driver
Ye Li [Thu, 15 Jun 2023 10:09:13 +0000 (18:09 +0800)]
imx: misc: ele_mu: Update ELE MU driver

Extend the RX timeout value to 10s, because when authentication is failed
the ELE needs long time (>2s for 28M image) to return the result. Print
rx wait info per 1s.

Also correct TX and RX status registers in debug.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: misc: ele_mu: Update MU TR registers count
Ye Li [Thu, 15 Jun 2023 10:09:12 +0000 (18:09 +0800)]
imx: misc: ele_mu: Update MU TR registers count

According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All
of them are used for ELE message. So update TR count to 8 and fix a
typo in receive msg

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: cmd_dek: add ELE DEK Blob generation support
Clement Faure [Thu, 15 Jun 2023 10:09:11 +0000 (18:09 +0800)]
imx: cmd_dek: add ELE DEK Blob generation support

Add ELE DEK Blob generation for the cmd_dek command.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: cmd_dek: Fix Uninitialized pointer read
Ye Li [Thu, 15 Jun 2023 10:09:10 +0000 (18:09 +0800)]
imx: cmd_dek: Fix Uninitialized pointer read

Fix Coverity (CID 21143558).
When tee_shm_register returns failure, the shm_input pointer is
invalid, should not free it. Same issue also exists on registering
shm_output.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ele_api: add DEK Blob generation
Peng Fan [Thu, 15 Jun 2023 10:09:09 +0000 (18:09 +0800)]
imx: ele_api: add DEK Blob generation

- Add crc computation.
- Add ele_generate_dek_blob API for encrypted boot support.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ele_api: support program secure fuse and return lifecycle
Peng Fan [Thu, 15 Jun 2023 10:09:08 +0000 (18:09 +0800)]
imx: ele_api: support program secure fuse and return lifecycle

Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse
Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ele_ahab: use hextoul
Peng Fan [Thu, 15 Jun 2023 10:09:07 +0000 (18:09 +0800)]
imx: ele_ahab: use hextoul

Use hextoul which looks a bit simpler.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: parse-container: fix build warning
Peng Fan [Thu, 15 Jun 2023 10:09:06 +0000 (18:09 +0800)]
imx: parse-container: fix build warning

Fix build warning:
warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3
has type ‘u64’ {aka ‘long long unsigned int’} [-Wformat=]
         printf("can't find memreg for image %d load address 0x%x, error %d\n",
warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘sc_faddr_t’ {aka ‘long long unsigned int’} [-Wformat=]
          debug("memreg %u 0x%lx -- 0x%lx\n", mr, start, end);

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: use generic name ele(EdgeLockSecure Enclave)
Peng Fan [Thu, 15 Jun 2023 10:09:05 +0000 (18:09 +0800)]
imx: use generic name ele(EdgeLockSecure Enclave)

Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: scu_api: update to version 1.16 and add more APIs
Peng Fan [Thu, 15 Jun 2023 10:09:04 +0000 (18:09 +0800)]
imx: scu_api: update to version 1.16 and add more APIs

Upgrade SCFW API to 1.16
Add more APIs:
 sc_misc_get_button_status
 sc_pm_reboot
 sc_seco_v2x_build_info

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: congatec/cgtqmx8: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:03 +0000 (18:09 +0800)]
imx: congatec/cgtqmx8: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
17 months agoimx: advantech: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:02 +0000 (18:09 +0800)]
imx: advantech: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
17 months agoimx: siemens/capricorn: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:01 +0000 (18:09 +0800)]
imx: siemens/capricorn: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: toradex/colibri-imx8x: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:00 +0000 (18:09 +0800)]
imx: toradex/colibri-imx8x: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: toradex/apalis-imx8: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:08:59 +0000 (18:08 +0800)]
imx: toradex/apalis-imx8: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: mach: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:08:58 +0000 (18:08 +0800)]
imx: mach: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoconfigs: phycore-imx8mm_defconfig: Enable LTO
Teresa Remmet [Wed, 14 Jun 2023 12:36:48 +0000 (14:36 +0200)]
configs: phycore-imx8mm_defconfig: Enable LTO

Enable LTO for binary size reduction.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
17 months agoconfigs: phycore-imx8mp_defconfig: Enable LTO
Teresa Remmet [Wed, 14 Jun 2023 12:36:47 +0000 (14:36 +0200)]
configs: phycore-imx8mp_defconfig: Enable LTO

Enable LTO for binary size reduction.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
17 months agocolibri_imx6: fix RALAT and WALAT values
Stefan Eichenberger [Wed, 14 Jun 2023 09:01:37 +0000 (11:01 +0200)]
colibri_imx6: fix RALAT and WALAT values

Running a memtest in U-Boot and Linux shows that some Colibri iMX6
produce bitflips at temperatures above 60°C. This happens because the
RALAT and WALAT values on the Colibri iMX6 are too low. The problems
were introduced by commit 09dbac8174c4 ("mx6: ddr: Restore ralat/walat
in write level calibration") before the calibration process overwrote
the values and set them to the maximum value. With this commit, we make
sure that the RALAT and WALAT values are set to the maximum values
again. This has been proven to work for years.

Fixes: 09dbac8174c4 ("mx6: ddr: Restore ralat/walat in write level calibration")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
17 months agodoc: board: phytec: add phycore_imx8mp
Yannic Moog [Wed, 14 Jun 2023 07:12:20 +0000 (09:12 +0200)]
doc: board: phytec: add phycore_imx8mp

Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Plus.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
17 months agodoc: board: phytec: add phycore_imx8mm
Yannic Moog [Wed, 14 Jun 2023 07:12:19 +0000 (09:12 +0200)]
doc: board: phytec: add phycore_imx8mm

Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Mini.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
17 months agomtd: spi-nor: Add support for w25q256jwm
Venkatesh Yadav Abbarapu [Mon, 26 Jun 2023 03:32:37 +0000 (09:02 +0530)]
mtd: spi-nor: Add support for w25q256jwm

Add support for Winbond 256M-bit flash w25q256jwm.
Performed basic erase/write/readback operations on
ZynqMP zc1751+dc1 board.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agospi: npcm_pspi: use ACTIVE_LOW flag for cs gpio and set default max_hz
Jim Liu [Tue, 4 Jul 2023 08:01:56 +0000 (16:01 +0800)]
spi: npcm_pspi: use ACTIVE_LOW flag for cs gpio and set default max_hz

If cs gpio is requested with ACTIVE_HIGH flag, it will
be pulled low(i.e. active). This is not what we expected.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agomtd: spi-nor-ids: add xtxtech part#
Bruce Suen [Thu, 13 Jul 2023 08:42:41 +0000 (14:12 +0530)]
mtd: spi-nor-ids: add xtxtech part#

add following XTX part numbers to the list:

xt25f08: 3V QSPI, 8Mbit
xt25f16: 3V QSPI, 16Mbit
xt25f32: 3V QSPI, 32Mbit
xt25f64: 3V QSPI, 64Mbit
xt25f128: 3V QSPI, 128Mbit
xt25f256: 3V QSPI, 256Mbit
xt25q08: 1.8V QSPI, 8Mbit
xt25q16: 1.8V QSPI, 16Mbit
xt25q32: 1.8V QSPI, 32Mbit
xt25q64: 1.8V QSPI, 64Mbit
xt25q128: 1.8V QSPI, 128Mbit
xt25q256: 1.8V QSPI, 256Mbit
xt25q512: 1.8V QSPI, 512Mbit
xt25q01g: 1.8V QSPI, 1Gbit
xt25w512: wide voltage, QSPI, 512Mbit
xt25w01g: wide voltage, QSPI, 1Gbit

remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f
share same jdec id,we use xt25f128 instead.

Signed-off-by: Bruce Suen <bruce_suen@163.com>
[jagan: re-edited the entire patch]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agomtd: spi-nor-ids: change full company name of XTX
Bruce Suen [Mon, 19 Jun 2023 10:28:58 +0000 (06:28 -0400)]
mtd: spi-nor-ids: change full company name of XTX

XTX changed full company name from "XTX Technology (Shenzhen) Limited
to "XTX Technology Limited" since 2020,So remove "(Shenzhen)".

Signed-off-by: Bruce Suen <bruce_suen@163.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agodoc: bindings: soft-spi: Remove the usage of deprecated properties
Fabio Estevam [Thu, 18 May 2023 22:22:41 +0000 (19:22 -0300)]
doc: bindings: soft-spi: Remove the usage of deprecated properties

According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:

sck-gpios, miso-gpios and mosi-gpios.

gpio-sck, gpio-mosi and gpio-miso are considered deprecated.

Update the bindings to suggest the recommeded properties.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agospi: soft_spi: Support the recommended soft spi properties
Fabio Estevam [Thu, 18 May 2023 22:22:40 +0000 (19:22 -0300)]
spi: soft_spi: Support the recommended soft spi properties

According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:

sck-gpios, miso-gpios and mosi-gpios.

gpio-sck, gpio-mosi and gpio-miso are considered deprecated.

Currently, U-Boot only supports the deprecated properties.

Allow the soft_spi driver to support both the new and old properties.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agodt-bindings: spi: Add bcm63xx-hsspi controller support
William Zhang [Wed, 7 Jun 2023 23:37:06 +0000 (16:37 -0700)]
dt-bindings: spi: Add bcm63xx-hsspi controller support

Bring the device tree binding document from Linux to u-boot

Port from linux patches:
Link: https://lore.kernel.org/r/20230207065826.285013-2-william.zhang@broadcom.com
Link: https://lore.kernel.org/r/20230207065826.285013-3-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agospi: synquacer: remove SPI_TX_BYTE handling
Masahisa Kojima [Wed, 24 May 2023 07:32:46 +0000 (16:32 +0900)]
spi: synquacer: remove SPI_TX_BYTE handling

Current code expects that SPI_TX_BYTE is single bit mode
but it is wrong. It indicates byte program mode,
not single bit mode.

If SPI_TX_DUAL, SPI_TX_QUAD and SPI_TX_OCTAL bits are not set,
the default transfer bus width is single bit.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agospi: bcmbca-hsspi: Add driver for newer HSSPI controller
William Zhang [Wed, 7 Jun 2023 23:37:05 +0000 (16:37 -0700)]
spi: bcmbca-hsspi: Add driver for newer HSSPI controller

The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
updated SPI controller that add the capability to allow the driver to
control chip select explicitly. Driver can control and keep cs low
between the transfers natively. Hence the dummy cs workaround or prepend
mode found in the bcm63xx-hsspi driver are no longer needed and this new
driver is much cleaner.

Port from linux patch:
Link: https://lore.kernel.org/r/20230209200246.141520-15-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agospi: bcm63xx-hsspi: Add prepend mode support
William Zhang [Wed, 7 Jun 2023 23:37:04 +0000 (16:37 -0700)]
spi: bcm63xx-hsspi: Add prepend mode support

Due to the controller limitation to keep the chip select low during the
bus idle time between the transfer, a dummy cs workaround was used when
this driver was first upstreamed to the u-boot based on linux kernel
driver. It basically picks the dummy cs as !actual_cs so typically dummy
cs is 1 when most of the case only cs 0 is used in the board design.
Then invert the polarity of both cs and tell the controller to start the
transfers using dummy cs. Assuming both cs are active low before the
inversion, effectively this keeps dummy cs high and actual cs low during
the transfer and workaround the issue.

This workaround requires that dummy cs 1 pin to is set to SPI chip
selection function in the pinmux when the transfer clock is above 25MHz.
The old chips likely have default pinmux set to chip select on the dummy
cs pin so it works but this is not case for the new Broadband BCA chips
and this workaround stop working. This is specifically an issue to
support SPI NAND and SPI NOR flash because these flash devices can
typically run at or above 100MHz.

This patch utilizes the prepend feature of the controller to combine the
multiple transfers in the same message to a single transfer when
possible. This way there is no need to keep clock low between transfers
and solve the issue without any pinmux requirement.

Multiple transfers within a SPI message may be combined into one
transfer if the following are all true:
  * One or more half duplex write transfer in single bit mode
  * Optional full duplex read/write at the end
  * No delay and cs_change between transfers

Most of the SPI device meets this requirements such as SPI NOR, SPI NAND
flash, Broadcom SPI voice card and etc. So this change switches to the
prepend mode as the default mode. For any SPI message that does not meet
the above requirement, we switch to original dummy cs mode but limit the
clock rate to the safe 25MHz.

Port from linux patch:
Link: https://lore.kernel.org/r/20230209200246.141520-12-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
17 months agospi: bcm63xx-hsspi: Add new compatible string support
William Zhang [Wed, 7 Jun 2023 23:37:03 +0000 (16:37 -0700)]
spi: bcm63xx-hsspi: Add new compatible string support

New compatible string brcm,bcmbca-hsspi-v1.0 is introduced based on
dts document brcm,bcm63xx-hsspi.yaml. Add it to the driver to support
this new binding.

Port from linux patch:
Link: https://lore.kernel.org/r/20230207065826.285013-6-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>