Boris Brezillon [Sun, 2 Dec 2018 09:54:32 +0000 (10:54 +0100)]
mtd: sf: Make sf_mtd.c more robust
SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.
This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).
Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
Boris Brezillon [Sun, 2 Dec 2018 09:54:31 +0000 (10:54 +0100)]
mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).
Implement ->remove() and call spi_flash_mtd_unregister() from there.
Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Sun, 2 Dec 2018 09:54:30 +0000 (10:54 +0100)]
mtd: Don't stop MTD partition creation when it fails on one device
MTD partition creation code is a bit tricky. It tries to figure out
when things have changed (either MTD dev list or mtdparts/mtdids vars)
and when that happens it first deletes all the partitions that had been
previously created and then creates the new ones based on the new
mtdparts/mtdids values.
But before deleting the old partitions, it ensures that none of the
currently registered parts are being used and bails out when that's
not the case. So, we end up in a situation where, if at least one MTD
dev has one of its partitions used by someone (UBI for instance), the
partitions update logic no longer works for other devs.
Rework the code to relax the logic and allow updates of MTD parts on
devices that are not being used (we still refuse to updates parts on
devices who have at least one of their partitions used by someone).
Boris Brezillon [Sun, 2 Dec 2018 09:54:29 +0000 (10:54 +0100)]
mtd: Make sure we don't parse MTD partitions belonging to another dev
The mtdparts variable might contain partition definitions for several
MTD devices. Each partition layout is separated by a ';', so let's
make sure we don't pick a wrong name when mtdparts is malformed.
Boris Brezillon [Sun, 2 Dec 2018 09:54:26 +0000 (10:54 +0100)]
mtd: Use get_mtdids() instead of env_get("mtdids") in mtd_search_alternate_name()
The environment is not guaranteed to contain a valid mtdids variable
when called from mtd_search_alternate_name(). Call get_mtdids() instead
of env_get("mtdids").
Fixes: ff4afa8a981e ("mtd: uboot: search for an equivalent MTD name with the mtdids") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
Boris Brezillon [Sun, 2 Dec 2018 09:54:25 +0000 (10:54 +0100)]
mtd: sf: Make sure we don't register the same device twice
spi_flash_mtd_register() can be called several times and each time it
will register the same mtd_info instance like if it was a new one.
The MTD ID allocation gets crazy when that happens, so let's track the
status of the sf_mtd_info object to avoid that.
Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Sun, 2 Dec 2018 09:54:22 +0000 (10:54 +0100)]
mtd: Add a function to report when the MTD dev list has been updated
We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.
Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
Rick Chen [Mon, 3 Dec 2018 09:48:20 +0000 (17:48 +0800)]
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE
to boot from ram which allow the board to override the fdt
address originally.
But after this patch
riscv: save hart ID and device tree passed by prior boot stage
It provide prior_stage_fdt_address which offer a temporary
memory address to keep the dtb address passing from loader(gdb)
to u-boot with a1.
So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and
can be removed. And it also somehow may corrupted BBL if it
was be arranged in CONFIG_SYS_SDRAM_BASE.
In board_fdt_blob_setup()
When boting from ram:
prior_stage_fdt_address will be use to reserved dtb temporarily.
When booting from ROM:
dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base.
Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM)
which is provided by HW.
Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
Anup Patel [Mon, 3 Dec 2018 05:27:41 +0000 (10:57 +0530)]
riscv: qemu: Use different SYS_TEXT_BASE for S-mode
When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.
Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.
Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Anup Patel [Mon, 3 Dec 2018 05:27:40 +0000 (10:57 +0530)]
riscv: Add kconfig option to run U-Boot in S-mode
This patch adds kconfig option RISCV_SMODE to run U-Boot in
S-mode. When this opition is enabled we use s<xyz> CSRs instead
of m<xyz> CSRs.
It is important to note that there is no equivalent S-mode CSR
for misa and mhartid CSRs so we expect M-mode runtime firmware
(BBL or equivalent) to emulate misa and mhartid CSR read.
In-future, we will have more patches to avoid accessing misa and
mhartid CSRs from S-mode.
Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:55:01 +0000 (20:55 +0100)]
ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCB
The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:48:16 +0000 (20:48 +0100)]
ARM: dts: rmobile: Extract CPLD node on H3 and M3W ULCB
The CPLD node is missing in Linux 4.17 DTs on H3/M3W ULCB, pull the
node into U-Boot specific DT until it hits mainline Linux, to make
syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:45:22 +0000 (20:45 +0100)]
ARM: dts: rmobile: Extract AVB node extras on V3M Eagle
The AVB node is not complete in Linux 4.17 DTs on V3M Eagle, pull the
AVB node extras into U-Boot specific DT until they hit mainline Linux,
to make syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:39:07 +0000 (20:39 +0100)]
ARM: dts: rmobile: Extract SDHI nodes on M3N
The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:17:50 +0000 (20:17 +0100)]
ARM: dts: rmobile: Extract RPC node to u-boot specific DT
The RPC DT bindings are still work in progress. Extract the RPC DT node
from the DT to allow easier update and so it can be replaced once the DT
bindings are stable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 26 Nov 2018 23:19:03 +0000 (00:19 +0100)]
ARM: rmobile: Convert to bootm_size
Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both
fdt_high and initrd_high. This change implies that the FDT and initrd
will always be copied into the first 256 MiB of RAM instead of being
used in place, which can cause various kinds of inobvious problems.
The simpler problems include FDT or initrd being overwritten or being
used from unaligned addresses, especially on ARM64. The overhead of
copying the FDT to aligned location is negligible and these problems
go away, so the benefit is significant.
Regarding alignment problems with fitImage. The alignment of DT properties
is always 32 bits, which implies that the alignment of the "data" property
in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The
kernel expects all elements, including DT and initrd, to be aligned to
64 bits on ARM64, thus using them in place may not be possible. Using the
bootm_size assures correct alignment, again with negligible overhead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sun, 18 Nov 2018 02:25:08 +0000 (03:25 +0100)]
mmc: Do not issue CMD 6 on SD 1.00 and SD 1.01
According to SD Specifications Part 1 Physical Layer Simplified Specification
Version 6.00 August 29, 2018, section 4.3.10 (Switch Function Command) and
section 5.6 (SCR register), SD cards version 1.00 and 1.01 do not support the
SD CMD 6.
Currently, U-Boot will issue CMD 6 unconditionally in sd_set_card_speed()
while configuring the bus for selected frequency. This will make SD cards
version 1.00 and 1.01 time out and thus fail detection altogether.
Fix this by not sending CMD 6 on such cards. Tested on Matsushita Electric
Industrial Co., Ltd. Japan RP-SD008B / Victor 8MB SD card, CU-SD008, which
is correctly detected with this patch as:
Device: sd@ee160000
Manufacturer ID: 1
OEM: 5041
Name: S008B
Bus Speed: 25000000
Mode : SD Legacy
Rd Block Len: 512
SD version 1.0
High Capacity: No
Capacity: 6.5 MiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.
Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com
Tom Rini [Thu, 29 Nov 2018 23:21:14 +0000 (18:21 -0500)]
dm: MIGRATION: Update migration plan for BLK
The biggest part of migration to using CONFIG_BLK is that we need to
have the various subsystems migrated first, so reword the plan here to
reference the new deadlines.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 29 Nov 2018 23:21:13 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for CONFIG_SATA
As the core of the subsystem has been converted along with some of the
drivers, formalize a deadline for migration.
Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Marek Vasut <marex@denx.de> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Soeren Moch <smoch@web.de> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 29 Nov 2018 23:21:11 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for DM_MMC
Given that at this point the MMC subsystem itself has been migrated
along with a number of subsystem drivers, formalize a deadline for
migration.
Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tom Rini [Tue, 4 Dec 2018 00:30:54 +0000 (19:30 -0500)]
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze:
- Use default functions for memory decoding
- Showing model from DT
zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets
zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting
Tom Rini [Mon, 3 Dec 2018 22:52:40 +0000 (17:52 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-12-03
This release is fully packed with lots of glorious improvements in UEFI
land again!
- Make PE images more standards compliant
- Improve sandbox support
- Improve correctness
- Fix RISC-V execution on virt model
- Honor board defined top of ram (fixes a few boards)
- Imply DM USB access when distro boot is available
- Code cleanups
Christophe Leroy [Wed, 21 Nov 2018 08:51:55 +0000 (08:51 +0000)]
board_r: fix build with DM_SPI
CC common/board_r.o
common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function)
initr_spi,
^
make[1]: *** [common/board_r.o] Error 1
Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Wed, 21 Nov 2018 08:51:45 +0000 (08:51 +0000)]
drivers: watchdog: add a DM driver for the MPC8xx watchdog
This patch adds a DM driver for the MPC8xx watchdog.
Basically, the watchdog is enabled by default from the start and
SYPCR register has to be writen once to set the timeout and/or
deactivate the watchdog. Once written, it cannot be written again.
It means that wdt_stop() can be called before wdt_start() to stop the
watchdog, but cannot be called if wdt_start() has been called.
Philippe Reynes [Wed, 14 Nov 2018 12:51:05 +0000 (13:51 +0100)]
test: vboot: clean its file
This update the its file used in vboot test to respect the new
node style name defined in doc/uImage.FIT (for example: replace
kernel@1 by kernel and fdt@1 by fdt-1)
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Wed, 14 Nov 2018 12:51:00 +0000 (13:51 +0100)]
rsa: add a structure for the padding
The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Wed, 14 Nov 2018 12:50:59 +0000 (13:50 +0100)]
rsa: use new openssl API to create signature
Previous implementation of the rsa signature was using
the openssl API EVP_Sign*, but the new openssl API
EVP_DigestSign* is more flexible. So we move to this
new API.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
net: zynq_gem: Add check for 64-bit dma support by hardware
This patch throws an error if 64-bit support is expected
but DMA hardware is not capable of 64-bit support. It also
prints a debug message if DMA is capable of 64-bit but not
using it.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
T Karthik Reddy [Mon, 3 Dec 2018 14:05:09 +0000 (19:35 +0530)]
arm64: zynqmp: Add new header file for zcu104 RevC
Created a new header file for zcu104 RevC board and added below
configurations to use MAC address from EEPROM.
CONFIG_ZYNQ_GEM_EEPROM_ADDR
CONFIG_ZYNQ_EEPROM_BUS
Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to
xilinx_zynqmp_zcu104_revC_defconfig
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Marek Vasut [Wed, 31 Oct 2018 19:34:41 +0000 (20:34 +0100)]
ARM: dts: rmobile: Enable SDR modes on E3 Ebisu
Add regulators and pinmuxes for SDHI0 and SDHI1 SD and microSD
slots on E3 Ebisu and mark them as capable of up to SDR104 mode
of operation. With the SDHI fixes in place, it is now possible
to use SDR104.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Move tap_pos to private data
Move the tap_pos variable, which is the HS200/HS400/SDR104 calibration
offset, into private data, so it can be passed around. This is done in
preparation for the HS400 mode, which needs to adjust this value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Thu, 15 Nov 2018 21:01:33 +0000 (22:01 +0100)]
mmc: tmio: Reorder TMIO clock handling
Reorder the tmio_sd_set_clk_rate() function such that it handles all
of the clock requiests correctly. Specifically, before this patch,
clock request with (mmc->clock == 0 && mmc->clk_disable) could leave
the clock enabled, as the function would exit on if (!mmc->clock)
condition on top and will not handle the mmc->clk_disable at all.
Rather than band-aid fixing just that particular problem, reorder
the entire function to make it easier to understand and verify that
all the cases are covered. The function has three sections now:
First, if mmc->clock != 0, we calculate divider for the SD block.
Second, if mmc->clock != 0 and SD block clock are enabled and
current divider is not equal to the new divider, then
stop the clock and update the divider.
Third, if mmc->clk_disable is set, disable the clock, otherwise
enable the clock. This happens independently of divider
update now.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Keep generating clock when clock are enabled
The TMIO core has a feature where it can automatically disable clock output
when the bus is not in use. While this is useful, it also interferes with
switching the bus to 1.8V and other background tasks of the SD/MMC cards,
which require clock to be enabled.
This patch respects the mmc->clk_disable and only disables the clock when
the MMC core requests it. Otherwise the clock are continuously generated
on the bus.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Switch to clock framework
Switch the driver to using clk_get_rate()/clk_set_rate() instead of
caching the mclk frequency in it's private data. This is required on
the SDHI variant of the controller, where the upstream mclk need to
be adjusted when using UHS modes.
Platforms which do not support clock framework or do not support it
in eg. SPL default to 100 MHz clock.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
V2: - Fix build on certain platforms using SPL without clock framework
V3: - Turn clk_get_rate into a callback and fill it as needed on both
renesas and socionext platforms
projects / u-boot.git / log