Tom Rini [Sat, 24 Feb 2018 21:50:41 +0000 (16:50 -0500)]
bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig. We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use. We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig. In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files. The previous default
only applied in some cases, even on a specific SoC family.
Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Thu, 15 Feb 2018 14:41:40 +0000 (12:41 -0200)]
imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function"
Commit d695d6627803 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:
U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0
Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.
Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Breno Lima <breno.lima@nxp.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:36:41 +0000 (17:36 +0100)]
rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.
In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.
Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.
References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Jagan Teki [Fri, 23 Feb 2018 07:43:11 +0000 (13:13 +0530)]
rockchip: rk3288: Fix wrong TPL_TEXT_BASE
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So 0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.
Jagan Teki [Fri, 23 Feb 2018 07:43:10 +0000 (13:13 +0530)]
rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 16 Feb 2018 15:07:25 +0000 (16:07 +0100)]
rockchip: clk: rk3368: handle clk_enable requests for GMAC
Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
enabled (no actual action is necessary as the gates are open
after reset)
References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Philipp Tomsich [Fri, 16 Feb 2018 15:07:24 +0000 (16:07 +0100)]
rockchip: clk: rk3399: handle clk_enable requests for GMAC
Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.
References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Adam Ford [Tue, 6 Feb 2018 13:58:59 +0000 (07:58 -0600)]
Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
This converts the following to Kconfig:
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_DNS
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_PXE
CONFIG_BOOTP_SUBNETMASK
CONFIG_CMDLINE_EDITING
CONFIG_AUTO_COMPLETE
CONFIG_SYS_LONGHELP
CONFIG_SUPPORT_RAW_INITRD
CONFIG_ENV_VARS_UBOOT_CONFIG
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-run the migration] Signed-off-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:53 +0000 (17:38 +0100)]
rockchip: video: update MAINTAINERS
The video drivers (VOP, HDMI encoder, LVDS encoder, MIPI encoder) for
Rockchip SOCs are self-contained and are mainly impacted by other
changes in the architecture support (e.g. pinctrl, clocking, etc).
Let's add these to the list of files maintained as part of the
Rockchip port.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:52 +0000 (17:38 +0100)]
rockchip: video: rk_vop: migrate to livetree
This migrates rk_vop (the shared functions used by multiple VOP
mini-drivers) to be compatible with a live tree.
Unfortunately, there's
(i) a lot of tree traversal needed for a VOP (as each active VOP
vnode references back to the endpoints in the encoders and vice
versa) to configure the connection between VOPs and encoders;
(ii) the DTS binding is not too sane and one needs to walk a node's
parents (the original code just assumed that the device would
live 3 levels above the property linked through a phandle) until
a UCLASS_DISPLAY device can be found.
As part of the migration, the code for finding the enclosing display
device has been changed to not assume a specific depth of nesting
(i.e. we walk until we reach the root or find a matching device) and
to use the newly introduced (in the same series) ofnode_get_parent()
function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:51 +0000 (17:38 +0100)]
rockchip: video: rk_hdmi: migrate to livetree
The rk_hdmi (shared functions for multiple HDMI mini-drivers) has been
using devfdt_get_addr() to read the HDMI controller's IO base address.
This will cause a failure with a live tree.
This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Kever Yang [Fri, 23 Feb 2018 16:38:50 +0000 (17:38 +0100)]
core: add ofnode_get_by_phandle() api
We need to get ofnode from a phandle, add interface to support
both live dt and fdt.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:49 +0000 (17:38 +0100)]
core: ofnode: add ofnode_get_parent function
The Rockchip video drivers need to walk the ofnode-parrents to find
an enclosing device that has a UCLASS_DISPLAY driver bound. This
adds a ofnode_get_parent()-function that returns the parent-node.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Alexey Brodkin [Wed, 21 Feb 2018 10:06:26 +0000 (13:06 +0300)]
Makefile: Don't mess with .text section location for selected arches
Most of architectures have .text section situated in the very beginning
of U-Boot binary and thus it is very logical that CONFIG_SYS_TEXT_BASE
is used on final linkage step to specify where U-Boot gets linked to.
For that we pass the following construction to the LD:
---------------------------->8-----------------------
xxx-ld ... -Ttext $(CONFIG_SYS_TEXT_BASE) ...
---------------------------->8-----------------------
But there could be exceptions. For example:
1. In case of ARCv2 we want to put vectors table in its own section
.ivt in front of .text section which means we need either add an
offset to CONFIG_SYS_TEXT_BASE to compensate for .ivt or don't
pass "-Ttext" to the LD at all and specify link base in linker
script directly.
2. Some architectures even though have .text section in the very
beginning of the U-Boot image still use different symbols to
specify link-base:
* NIOS2: CONFIG_SYS_MONITOR_BASE (which I really like because
that exactly what makes sense - where out image starts but not
beginning of its .text section which just happened to match the
whole image beginning)
* EXTENSA: CONFIG_SYS_TEXT_ADDR
* X86: Which doesn't use CONFIG_SYS_MONITOR_BASE in case of EFI
otherwise sets explicit link base in u-boot.lds
I think that's good to allow for flexibility and don't require each and
every architecture or even platform to specify CONFIG_SYS_TEXT_BASE as well
as use it to set .text section location.
So let's only pass "-Ttext xxx" for those architectures who don't set
link-base explicitly in their linker scripts.
This patch iaddresses comments for previously sent
https://patchwork.ozlabs.org/patch/867540/.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Karl Beldan [Tue, 20 Feb 2018 23:30:08 +0000 (23:30 +0000)]
arm64: show_regs: Dump the LRs HW values
These were dropped in [1], after relocation, for their values offset by
reloc_off.
Unconditionally show the HW values and add a '(reloc)' hint for the
offset values showed after relocation.
Also, the LRs' dumps are now formatted the same way the other regs' are.
[1] Commit 082693f4 ("arm64 :show_regs: show the address before relocation")
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Michal Simek [Tue, 20 Feb 2018 09:19:00 +0000 (10:19 +0100)]
net: Remove Xilinx ll_temac driver
ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.
ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9cefdfdba62c069821bbba10273a0a8ed)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Andrew F. Davis [Wed, 14 Feb 2018 17:53:37 +0000 (11:53 -0600)]
ARM: Kconfig: Move TI_SECURE_DEVICE to a common area
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.
Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.
Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.
Fixes: a93fbf4a7892 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig") Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Sat, 10 Feb 2018 21:54:38 +0000 (16:54 -0500)]
configs: Re-sync with CONFIG_DISTRO_DEFAULTS
A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS. As they plainly intended to, set that flag and
re-sync config files.
Tom Rini [Sat, 17 Feb 2018 22:30:41 +0000 (17:30 -0500)]
sh: Do not provide strncmp
With modern GCC, we get warnings such as:
cmd/jffs2.c: In function 'mtdparts_init':
arch/sh/include/asm/string.h:110:38:
warning: array subscript is above array bounds [-Warray-bounds]
: "0" (__cs), "1" (__ct), "r" (__cs+__n)
~~~~^~~~
This results in a small size reduction as well.
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Jagan Teki [Tue, 20 Feb 2018 07:16:27 +0000 (12:46 +0530)]
imx6: engicam: Drop SPL_EXT_SUPPORT
i.MX6 boards still using raw MMC write for SPL and
u-boot-dtb.img along with Falcon mode configurations,
so drop filesystem based write through SPL_EXT_SUPPORT.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
There is no need to create a new RVT macros since the only update were the
RVT base address. Remove HAB_RVT_*_NEW macros and define a new RVT base
address.
More details about RVT base address can be found on processors Reference
Manual and in the following documents:
Utkarsh Gupta [Tue, 20 Feb 2018 01:19:25 +0000 (01:19 +0000)]
imx: hab: Check if CSF contains deprecated commands
Write, Check and Set MID commands have been deprecated from the Code
Signing Tool (CST) v2.3.3 and will not be implemented in newer versions
of HAB, hence the following features are no longer available:
- Write Data
- Clear Mask
- Set Mask
- Check All Clear
- Check All Set
- Check Any Clear
- Check Any Set
- Set MID
The inappropriate use of Write Data command may lead to an incorrect
authentication boot flow. Since no specific application has been identified
that requires the use of any of these features, it is highly recommended to
add this check.
Utkarsh Gupta [Tue, 20 Feb 2018 01:19:24 +0000 (01:19 +0000)]
imx: hab: Check if CSF is valid before authenticating image
For proper authentication the HAB code must check if the CSF is valid.
Users must call the csf_is_valid() function to parse the CSF prior to
authenticating any additional images. The function will return a failure
if any of the following invalid conditions are met:
- CSF pointer is NULL
- CSF Header does not exist
- CSF does not lie within the image bounds
- CSF command length zero
Utkarsh Gupta [Tue, 20 Feb 2018 01:19:23 +0000 (01:19 +0000)]
imx: hab: Ensure the IVT DCD pointer is Null prior to calling HAB authenticate function.
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. DCD should not be present in images that will be verified
by software using HAB RVT authentication APIs. Newer versions of HAB
will generate an error if a DCD pointer is present in an image being
authenticated by calling the HAB RVT API. Older versions of HAB will
process and run DCD if it is present, and this could lead to an incorrect
authentication boot flow.
It is highly recommended this check is in place to ensure additional HAB
verified images do not include a DCD table.
Breno Lima [Tue, 20 Feb 2018 01:19:22 +0000 (01:19 +0000)]
imx: hab: Keep CAAM clock enabled after authenticating additional images
Currently it is not possible to run CMD_DEK on i.MX SPL targets:
=> dek_blob 0x12000000 0x12001000 128
The system hangs after running dek_blob because the CAAM clock is being
disabled by the HAB code. There is no need to disable CAAM clock after
authenticating additional boot images, thus keep CAAM clock enabled to
address this issue.
Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Revert "mx6: ddr: Allow changing REFSEL and REFR fields"
This reverts commit edf0093732225c2fd0791c3864e9a3eef1f92f19 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.
These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.
Tom Rini [Sat, 17 Feb 2018 22:30:38 +0000 (17:30 -0500)]
sh: Use -m2a-nofpu only
Based on reading over the GCC manual, passing both -m2a and -m2a-nofpu
are redundant, as -m2a-nofpu will provide functional code for both. As
-m2a-nofpu functions with more toolchains and does what is expected,
switch.
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Tom Rini <trini@konsulko.com>
When FASTBOOT is activated, only one the supported device is supported in
code at the same time
- CONFIG_FASTBOOT_FLASH_MMC_DEV
- CONFIG_FASTBOOT_FLASH_NAND_DEV
But Today the choice is not exclusive in Kconfig
and that cause Kconfig issue when :
- CONFIG_FASTBOOT, CONFIG_MMC, CONFIG_NAND are activated
- CONFIG_FASTBOOT_FLASH_MMC_DEV = 0
- CONFIG_FASTBOOT_FLASH_NAND_DEV is not activated
The patch add a choice in Kconfig to select the FLASH provider
- CONFIG_FASTBOOT_FLASH_MMC
- CONFIG_FASTBOOT_FLASH_NAND
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Marek Vasut [Fri, 16 Feb 2018 15:41:19 +0000 (16:41 +0100)]
dfu: tftp: Fix arm64 build warnings
Fix two build warnings when building for arm64:
drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:59:37: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
ret = dfu_write_from_mem_addr(dfu, (void *)addr, len);
^
and
drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:41:8: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 4 has type ‘__kernel_size_t {aka long unsigned int}’ [-Wformat=]
debug("%s: image name: %s strlen: %u\n", __func__, sb, strlen(sb));
^
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Lukasz Majewski <lukma@denx.de>
Marek Vasut [Fri, 16 Feb 2018 15:41:17 +0000 (16:41 +0100)]
dfu: Fix up the Kconfig mess
Clean up the screaming mess of configuration options that DFU is.
It was impossible to configure DFU such that TFTP is enabled and
USB is not, this patch fixes that and assures that DFU TFTP and
DFU USB can be enabled separatelly and that the correct pieces
of code are compiled in.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Lukasz Majewski <lukma@denx.de>
Andre Heider [Thu, 15 Feb 2018 09:17:29 +0000 (10:17 +0100)]
usb: gadget: sdp: fix pointer cast warnings for 64bit archs
The SDP protocol contains multiple 32bit pointers. Add a helper function
to get a valid pointer from these values and use it.
This fixes the following warnings:
drivers/usb/gadget/f_sdp.c: In function ‘sdp_rx_data_complete’:
drivers/usb/gadget/f_sdp.c:347:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_jump_imxheader’:
drivers/usb/gadget/f_sdp.c:625:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
entry = (void *)headerv2->entry;
^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_handle_in_ep’:
drivers/usb/gadget/f_sdp.c:668:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
^
drivers/usb/gadget/f_sdp.c:679:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
^
Lukasz Majewski [Wed, 14 Feb 2018 10:39:48 +0000 (11:39 +0100)]
script: Make the get_default_envs.sh script working with newest u-boot
This commit fixes several issues:
- After moving env related code to ./env directory the env_common.o file
is no longer present in the system (has been replaced with built-in.o).
- Use ${OBJCOPY} if available, fallback to system default's objcopy if not
present.
- Extend the script to accept different build directory than current one.
It is extremely handy with OE usage, where source code is separated from
build.
Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Faiz Abbas [Mon, 12 Feb 2018 13:54:31 +0000 (19:24 +0530)]
env: mmc/fat/ext4: make sure that the MMC sub-system is initialized before using it
When booting from a non-MMC device, the MMC sub-system may not be
initialized when the environment is first accessed.
We need to make sure that the MMC sub-system is ready in even a non-MMC
boot case.
Therefore, initialize mmc before loading environment from it.
Alex Kiernan [Fri, 9 Feb 2018 15:24:38 +0000 (15:24 +0000)]
mmc: Fix uninitialised priv member
When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Tested-by: Robert Nelson <robertcnelson@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.
Fix this by adding the missing version in the correspondence table.
Reported-by: eil Eilmsteiner Heribert <eil@keba.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.
This fixes a problem seen with QEmu emulating a vexpress-a15.
Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Jonathan Gray <jsg@jsg.id.au>
ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1
Since DRA7xx/AM57xx SR1.1 and SR1.0 has errata to limit the frequency of
MMC1 to 96MHz and frequency of MMC2 to 48MHz for AM572x SR1.1, limit the
frequency and disable higher speed modes for those revision.
Also use the recommended IO delays (those tagged with "rev11")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
dts: am57xx-beagle-x15: disable UHS and HS200 support
The UHS modes are not supported in beagle-x15 because it's not possible to
switch the IO lines supply voltage to 1.8v.
Also HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.
ARM: dts: DRA7: use new dra7-specific compatible string
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Now that omap_hsmmc has support for hs200 mode, change the clock
frequency to 192MHz. Also change the REFERENCE CLOCK frequency to
192MHz based on which the internal mmc clock divider is calculated.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc: omap_hsmmc: Add support to set IODELAY values
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.
Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
Add a new API to perform iodelay recalibration without isolate
io to be used in uboot.
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met. The MMC driver can use the new API to
set the IO delay values depending on the MMC mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).
Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.
The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.
The suggested workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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