Bad block table option is hardcoded to read from flash with
NAND_BBT_USE_FLASH option. This decision should be done based on DT
property. Remove this hardcoding, to be able to use DT property.
Michal Simek [Mon, 20 Feb 2023 08:09:04 +0000 (09:09 +0100)]
arm64: zynqmp: Remove comment about gem spec in kv260
The latest SOM specification doesn't enforce certain MIO lines allocated
for ethernet or ethernet controller itself. That's why remove comment about
it which is likely there from early version of specification.
Also removed the same comment from pinctrl node. It is clear that it has to
be defined for different carrier cards.
Michal Simek [Wed, 15 Feb 2023 08:45:22 +0000 (09:45 +0100)]
xilinx: Enable SMC command for arm64 targets
SMC command is very useful for TF-A testing or issuing commands which are
not covered by any driver. Strongly recommend to disable this command on
any product unless it is required.
Michal Simek [Wed, 15 Feb 2023 08:45:21 +0000 (09:45 +0100)]
cmd: smccc: Print results in hex instead of dec
Printing return value in HEX instead of DEC. Return values are 64 bit
values which impossible to decode in DEC. For example getting CHIP ID in
dec is quite long.
Ilias Apalodimas [Thu, 16 Feb 2023 13:39:20 +0000 (15:39 +0200)]
arm64: zynqmp: Add an OP-TEE node to the device tree
Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.
Neal Frager [Tue, 14 Feb 2023 13:19:59 +0000 (13:19 +0000)]
fpga: zynqmppl: fix fpga loads command for unencrypted use case
When using the fpga loads command, the driver is passing the AES encryption
key address is all cases. However, for the authenticated, but not encrypted
use case, there is no AES encryption key, and this value is 0.
When AES encryption is not used on the fpga bitstream, the pmufw assumes that
the AES key address is a bitstream size value like what is used by the
unsecure fpga load command.
To fix the problem, this patch checks to see if the AES key address is zero.
If the AES key address is zero, it means that AES is not being used on the
bitstream and the bitstream size should be passed instead. Thus, matching
the fpga load functionality.
ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Michal Simek [Thu, 5 Jan 2023 08:41:22 +0000 (09:41 +0100)]
ARM: zynq: Use recommended dma-controller name instead of dmac
Use standard name for dma controller. Issue is reported by dtbs_check as
dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match
'^dma-controller(@.*)?$'
Michal Simek [Mon, 6 Feb 2023 12:50:00 +0000 (13:50 +0100)]
xilinx: dts: Remove cdns,zynq-gem
cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also
U-Boot driver has been updated to support new compatible string that's why
it is time to remove it and deprecate it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit 71efd45a5fc7 ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.
Tom Rini [Tue, 7 Mar 2023 17:54:01 +0000 (12:54 -0500)]
Merge tag 'next-20230307' of https://source.denx.de/u-boot/custodians/u-boot-video into next
- video console refactoring and optimization
- support for fonts wider than 1 byte
- use named header for 8x16 font data
- support multiple fonts configuration
- move get_font_size() to truetype driver ops
- support font size configuration at runtime
- add 16x32 Terminus font from linux
- add 12x22 Sun font from linux
- add 12x22 console simple font test
Tom Rini [Tue, 7 Mar 2023 15:42:22 +0000 (10:42 -0500)]
Merge branch '2023-03-06-assorted-platform-updates' into next
- semihosting updates for arm and riscv, assorted arm64 core updates,
assorted ast2600 updates, remove some more unused code, some TI K3
defconfig and DTS updates, uniphier DTS updates, mpc83xx Kconfig
cleanup, re-add fttmr010 driver with an update to use DM.
video console: add support for fonts wider than 1 byte
Devices with high ppi may benefit from wider fonts.
Current width implementation is limited by 1 byte, i.e. 8 bits.
New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all
width bytes, thus allowing fonts wider than 1 byte.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
- move common code to vidconsole_internal.h and console_core.c
- unite probe functions
- get rid of code duplications in switch across bpp values
- extract common pixel fill logic in two functions one per
horizontal and vertical filling
- rearrange statements in put_xy* methods in unified way
- replace types - uint*_t to u*
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Tue, 7 Feb 2023 15:21:05 +0000 (15:21 +0000)]
riscv: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about a few instructions, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
pointer land in the right registers.
This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembler.
This is much more readable and robust.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Andre Przywara [Tue, 7 Feb 2023 15:21:04 +0000 (15:21 +0000)]
arm: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about one instruction, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
pointer land in the right registers.
This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembly file.
This is much more readable and robust.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Devarsh Thakkar [Mon, 6 Feb 2023 11:34:51 +0000 (17:04 +0530)]
am62a7: dts: Enable full 4GB LPDDR4
AM62A7-SK board has 4GB LPDDR4 Micron MT53E2G32D4DE-046 AUT:B part
but only 2GB was enabled early.
Enable full 4GB memory by updating the latter 2GB memory region
which gets mapped to 0x0880000000 i.e. DDR16SS0_SDRAM as referred in
Table 2-1. AM62A Common SoC Memory of AM62Ax TRM [1].
Kunihiko Hayashi [Tue, 28 Feb 2023 02:37:09 +0000 (11:37 +0900)]
ARM: dts: uniphier: Sync DT with Linux v6.2
Synchronize devicetree sources with Linux v6.2.
- Use GIC interrupt definitions
- Add reg properties in USB-glue and SoC-glue node
- Fix node names to follow the generic names list in DT specification
- Add L2 cache and AHCI nodes
- Update nand and pcie nodes
- And some trivial fixes
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
Christophe Leroy [Sun, 26 Feb 2023 09:44:09 +0000 (10:44 +0100)]
powerpc, mpc83xx: Remove CONFIG_ELBC_BRx_ORx
Commit fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to
Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by
implementing a fine-grained selection of every bit in Kconfig.
But commit c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to
Kconfig") reworked it so that you now just have to provide the raw
value of each register in Kconfig. However, all fine-grained
Kconfig items remained allthough they are not used anymore.
Remove them all.
Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Manorit Chawdhry [Fri, 24 Feb 2023 05:07:49 +0000 (10:37 +0530)]
configs: j7200: Merge HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Andrew Davis <afd@ti.com>
Manorit Chawdhry [Fri, 24 Feb 2023 05:07:48 +0000 (10:37 +0530)]
configs: j721s2: merge HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Andrew Davis <afd@ti.com>
Marc Zyngier [Tue, 14 Feb 2023 13:38:14 +0000 (21:38 +0800)]
arm64: Reduce PT size estimation complexity
count_required_pts()'s complexity is high if mappings are not using the
largest possible block size (due to some other requirement such as tracking
dirty pages, for example).
Let's switch to a method that follows the pattern established with
the add_map() helper, and make it almost instantaneous instead of
taking a large amount of time if 2MB mappings are in use instead of
1GB.
Marc Zyngier [Tue, 14 Feb 2023 13:38:13 +0000 (21:38 +0800)]
arm64: Reduce add_map() complexity
In the add_map() function, for each level it populates, it iterates from
the root of the PT tree, making it ineficient if a mapping needs to occur
past level 1.
Instead, replace it with a recursive (and much simpler) algorithm
that keeps the complexity as low as possible. With this, mapping
512GB at level 2 goes from several seconds down to not measurable
on an A55 machine.
We keep the block mappings at level 1 for now though.
Sergei Antonov [Mon, 13 Feb 2023 17:34:36 +0000 (20:34 +0300)]
timer: fttmr010: return a previously deleted driver now ported to DM
The fttmr010 timer driver was deleted by
commit 29fc6f24926e ("ARM: remove a320evb board support")
The original source file was: arch/arm/cpu/arm920t/a320/timer.c
Return the driver to the codebase in a DM compatible form.
A platform using fttmr010 will be submitted later.
This hardware is described in the datasheet [1], starting from page 348.
According to the datasheet, there is a Revision Register at offset 0x3C,
which is not present in 'struct fttmr010'. Add it and debug() print
revision in probe function.
Memory used to hold the page tables is allocated from the top of RAM
with no prior initialization and could therefore hold invalid data. As
invalidate_dcache_all() will be called before the MMU has been
initialized and as that function relies indirectly on the page tables
when using CMO_BY_VA_ONLY, these must be in a valid state from their
allocation.
Marc Zyngier [Wed, 8 Feb 2023 20:54:27 +0000 (04:54 +0800)]
arm: cpu: Add optional CMOs by VA
Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked but also
because they are not broadcast between CPUs. Consequently, KVM traps and
emulates such maintenance in the host kernel using by-VA operations and
looping over the stage-2 page-tables. However, when running under
protected KVM, these instructions are not able to be emulated and will
instead result in an exception being delivered to the guest.
Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select
this option and perform by-VA cache maintenance instead of using the
set/way instructions.
Tom Rini [Fri, 3 Mar 2023 17:48:23 +0000 (12:48 -0500)]
Merge branch '2023-03-02-kconfig-and-CONFIG-cleanups' into next
- Partial merge of a series of mine to select some framework options
that shouldn't be prompted for (and remove some unused code related to
that), and a partial merge of a series from Simon to remove some dead
code and address various CONFIG_IS_ENABLED/IS_ENABLED issues in code.
Simon Glass [Wed, 22 Feb 2023 16:34:12 +0000 (09:34 -0700)]
test: Tidy up sandbox handling in test-main
This is pretty messy at present since it relies on a SPL_SANDBOX option
that does not exist. Use the normal options instead, so that it will work
with split config.
Simon Glass [Wed, 22 Feb 2023 16:34:06 +0000 (09:34 -0700)]
sandbox: Tidy up I2C options
At present we enable the sandbox I2C driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Wed, 22 Feb 2023 16:34:04 +0000 (09:34 -0700)]
sandbox: Tidy up RTC options
At present we enable the sandbox RTC driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Chunfeng Yun [Fri, 17 Feb 2023 09:04:10 +0000 (17:04 +0800)]
usb: xhci-mtk: modify the SOF/ITP interval for mt8195
There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
exclude IP0) have a wrong default SOF/ITP interval which is
calculated from the frame counter clock 24Mhz by default, but
in fact, the frame counter clock is 48Mhz, so we shall set the
accurate interval according to 48Mhz for those controllers.
Note:
The first controller no need set it, but if set it, shall change
tphy's pll at the same time.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Marek Vasut <marex@denx.de>
Chunfeng Yun [Fri, 17 Feb 2023 09:04:09 +0000 (17:04 +0800)]
phy: phy-mtk-tphy: add support mt8195
The T-PHY controller is designed to use use PLL integer mode, but
in fact use fractional mode for some ones on mt8195 by mistake,
this causes signal degradation (e.g. eye diagram test fail), fix
it by switching PLL to 26Mhz from default 48Mhz to improve signal
quality.
Marek Vasut [Thu, 23 Feb 2023 16:32:43 +0000 (17:32 +0100)]
usb: dwc3-meson-g12a: Select PHY instead of imply PHY
Imply means you can turn off the option and expect things to work
- "it's a good idea to have X enabled" is when to use imply
- "you must have X for Y to work" is when to use select
Use "select" here.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tom Rini [Thu, 16 Feb 2023 03:36:55 +0000 (22:36 -0500)]
s5p: Remove empty arch_misc_init
We don't need to provide an empty arch_misc_init function here, we can
just not enable the hook.
Cc: Stefan Bosch <stefan_b@posteo.net> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Thu, 16 Feb 2023 03:36:53 +0000 (22:36 -0500)]
mvebe: Drop ARCH_MISC_INIT from alleycat 5
In this platform, arch_misc_init doesn't perform any real function. The
call to get_soc_type_rev has no lasting side effects.
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tom Rini [Thu, 16 Feb 2023 03:36:52 +0000 (22:36 -0500)]
imx9: Remove ARCH_MISC_INIT
We don't need an empty function, we can just not enable the hook we
don't use.
Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Thu, 16 Feb 2023 03:36:51 +0000 (22:36 -0500)]
common: Make ARCH_EARLY_INIT_R be selected only
As platforms which require this hook need this hook enabled, in order to
function, or do not need this hook, it doesn't make sense to prompt the
user. As all platforms that need this hook now select the symbol, remove
the prompt text.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 16 Feb 2023 03:36:50 +0000 (22:36 -0500)]
arm: rk3368: Select ARCH_EARLY_INIT_R when used
On the lion and evb-px5 platforms, we need this function, so select it.
Cc: Andy Yan <andy.yan@rock-chips.com> Cc: Quentin Schulz <quentin.schulz@theobroma-systems.com> Cc: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tom Rini [Thu, 16 Feb 2023 03:36:49 +0000 (22:36 -0500)]
arm: zynq: Move to select'ing ARCH_EARLY_INIT_R if we have FPGA
The function arch_early_init_r only does anything on these platforms if
we have FPGA (or SPL and SPL_FPGA) enabled, so move the logic to select
based on that.
Cc: Michal Simek <michal.simek@amd.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 16 Feb 2023 03:36:47 +0000 (22:36 -0500)]
common/Kconfig: Reword text for BOARD_TYPES
While it is true that for some Samsung platforms, we call
get_board_type() the main usage of this CONFIG switch is to enable
board_types in global data, which is then used by various platforms.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 3 Feb 2023 20:41:45 +0000 (21:41 +0100)]
arm: mvebu: Define env_sf_get_env_addr() also for Proper U-Boot
Proper U-Boot moves SPI0 CS0 Flash mapping from 0xD4000000 to 0xF4000000
and change its size from 64 MB to 8 MB. Definitions are already in
MBUS_SPI_BASE/MBUS_SPI_SIZE macros. So define these macros also for SPL
build, use them in env_sf_get_env_addr() function and move this function
from spl.c to cpu.c to be available in Proper U-Boot too.
projects / u-boot.git / log