Kim Phillips [Tue, 1 Jun 2010 17:24:27 +0000 (12:24 -0500)]
powerpc/8xxx: Distinguish between incompatible SEC h/w types
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mike Frysinger [Mon, 5 Jul 2010 09:15:59 +0000 (05:15 -0400)]
Blackfin: bf561-acvilon: drop unused env redund define
The SPI env code didn't support redundant environments until recently, but
this code was written before that. Since it has never been tested (and
currently causes a build failure), simply punt it. If the functionality
is actually desired, it can be re-added once it has been tested.
Mike Frysinger [Thu, 10 Jun 2010 01:50:48 +0000 (21:50 -0400)]
Blackfin: bfin_mac: remove space from name
Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces. So drop the space from the Blackfin EMAC
driver.
Mike Frysinger [Fri, 29 May 2009 22:00:16 +0000 (18:00 -0400)]
Blackfin: bf518f-ezbrd: handle different PHYs dynamically
The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
ones only have a National PHY (which lack a RX Error interrupt line). So
in the board eth init code, dynamically detect what is hooked up to the MAC
and handle each accordingly.
Mike Frysinger [Wed, 2 Jun 2010 10:20:39 +0000 (06:20 -0400)]
Blackfin: bf533-stamp: scrub unused code
Much of the local bf533-stamp.h header is unused, and the few bits that
are are only needed in one file. So move the few used bits out and punt
all the rest.
Mike Frysinger [Wed, 2 Jun 2010 10:00:27 +0000 (06:00 -0400)]
Blackfin: serial: convert to portmux framework
Use the new portmux framework to handle the details when possible.
Unfortunately, we cannot yet use this in the standalone initialization
logic, so we need to keep around the old portmux writes for now.
Mike Frysinger [Wed, 2 Jun 2010 09:56:22 +0000 (05:56 -0400)]
Blackfin: bfin_mac: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details. While we're doing this, let boards declare the exact list
of pins they need in case there is one or two they don't actually have
hooked up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Ben Warren <biggerbadderben@gmail.com>
Ben Gardiner [Mon, 5 Jul 2010 17:27:07 +0000 (13:27 -0400)]
NAND: environment offset in OOB (CONFIG_ENV_OFFSET_OOB)
This is a re-submission of the patch by Harald Welte
<laforge@openmoko.org> with minor modifications for rebase and changes
as suggested by Scott Wood <scottwood@freescale.com> [1] [2].
This patch enables the environment partition to have a run-time dynamic
location (offset) in the NAND flash. The reason for this is simply that
all NAND flashes have factory-default bad blocks, and a fixed compile
time offset would mean that sometimes the environment partition would
live inside factory bad blocks. Since the number of factory default
blocks can be quite high (easily 1.3MBytes in current standard
components), it is not economic to keep that many spare blocks inside
the environment partition.
With this patch and CONFIG_ENV_OFFSET_OOB enabled, the location of the
environment partition is stored in the out-of-band (OOB) data of the
first block in flash. Since the first block is where most systems boot
from, the vendors guarantee that the first block is not a factory
default block.
This patch introduces the 'nand env.oob' command, which can be called
from the u-boot command line. 'nand env.oob get' reads the address of
the environment partition from the OOB data, 'nand env.oob set
{offset,partition-name}' allows the setting of the marker by specifying
a numeric offset or a partition name.
Thomas Chou [Wed, 16 Jun 2010 06:39:30 +0000 (14:39 +0800)]
nios2: remove EP1C20, EP1S10, EP1S40 boards
The example configuration files of nios2-generic board can generated
binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three
boards can be removed.
With nios2-generic approach, the fpga parameter header file can
be generated from hardware designs using tools. Porting u-boot for
nios2 boards is simplified. Vendors can supply their fpga parameter
file or patches to add a new nios2-generic board instance. There is
no need to include other boards support for nios2 in the u-boot
mainline.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Thomas Chou [Fri, 30 Apr 2010 03:34:18 +0000 (11:34 +0800)]
nios2: add spi flash support to nios2-generic board
This patch enables the altera_spi and spi_flash drivers for the
nios2-generic board. It allows access to the EPCS/SPI flash on
the Altera EP1C20 board.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Thomas Chou [Fri, 28 May 2010 04:08:10 +0000 (12:08 +0800)]
nios2: use gc sections to reduce image size
Follow the discussion of Charles Manning and Mike Frysinger.
Using gc_sections helps reduce image size.
Configuring for nios2-generic board...
Before,
text data bss dec hex filename
123979 3724 22892 150595 24c43 /tmp/u-boot/u-boot
After,
text data bss dec hex filename
115983 3800 22732 142515 22cb3 /tmp/u-boot/u-boot
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* the following problems are met :
config was set to use the new driver as a default but
- RMII was not enabled for the new driver
- the new driver didn't compile with RMII enabled
- the new driver initialize a PHY at address O when the PHY of
this board is at 1 thus we get "AT91 EMAC RMII: No PHY present"
* to fix these problems, this patch :
- enable RMII for the new driver
- fix the wrong define used in the at91_emac.c
- allow the config file to set a default phy address (and use
0 as a default as in the actual at91_emac.c driver)
Mike Frysinger [Thu, 3 Jun 2010 01:03:50 +0000 (21:03 -0400)]
AX88180: use standard I/O accessors
The current dm9000x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
Blackfin systems as the accesses can get out of order. So convert the
direct volatile dereferences to use the normal in/out macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Hoan Hoang <hnhoan@i-syst.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Hoan Hoang [Tue, 11 May 2010 06:43:07 +0000 (02:43 -0400)]
AX88180: make OUTW handle 32bit/16bit defines too
The current OUTW function is always defined as a 16bit function, but this
doesn't work correctly when using the 32bit access mode. So define it as
a 32bit function when in 32bit mode so things work correctly on Blackfin
32bit LE systems.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some places in the current code equate the Marvell 88E1111 PHY as the family
when in reality it's a subpart of the Alaska family. So once we generalize
that, add support for the 88E1118 PHY.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Juergen Kilb [Sat, 12 Jun 2010 19:22:01 +0000 (21:22 +0200)]
smc91xx_eeprom: Correct chip detection check.
The smc911x_detect function in /net/driver/net/smc911x.c
returns a 0 if everything was ok (a chip was found) and -1 else.
In the standalone example 'smc911x_eeprom' the return value
of smc911x_detect is interpreted in a different way
(0 for error, !0 as OK).
This leads to the error that the chip will not be detected.
Signed-off-by: Juergen Kilb <j.kilb@phytec.de> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Timur Tabi [Tue, 8 Jun 2010 13:21:21 +0000 (08:21 -0500)]
tsec: fix the return value for tsec_eth_init()
The Ethernet initialization functions are supposed to return the number of
devices initialized, so fix tsec_eth_init() so that they returns the number of
TSECs initialized, instead of just zero. This is safe because the return value
is currently ignored by all callers, but now they don't have to ignore it.
In general, if an function initializes only one device, then it should return
a negative number if there's an error. If it initializes more than one device,
then it should never return a negative number.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Thu, 10 Jun 2010 02:10:48 +0000 (22:10 -0400)]
net: warn about spaces in device names
Some commands operate on eth device names (like 'mii'), but those cannot
be passed on the command line as one argument. So detect devices like
these and warn about them so someone will fix it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Mon, 10 May 2010 20:10:00 +0000 (16:10 -0400)]
AX88180: improve phy searching
Rather than hardcode specific phy addresses, search the possible phy
address space to find the first available phy. Also respect the normal
CONFIG_PHY_ADDR option for board porters to pick a specific address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Tue, 29 Jun 2010 07:23:53 +0000 (09:23 +0200)]
net: Add option to disable fiber on M88E1111 PHY for PPC4xx
By defining CONFIG_M88E1111_DISABLE_FIBER boards can configure the
M88E1111 PYH to disable fiber. This is needed for an upcoming PPC460GT
based board, which has fiber/copper auto-selection enabled by default.
This doesn't seem to work. So we disable fiber in the PHY register.
Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Mon, 5 Jul 2010 06:29:21 +0000 (02:29 -0400)]
net: dm9000x: re-add casts to I/O pointers to fix gcc warnings
The DM9000 in/out helper functions were casting the register address when
it was accessing things directly (pre commit a45dde2293c816138e53c). But
when it was changed to using the in/out helpers, those casts were dropped
because those functions don't take pointers. Even more recently, those
functions were then changed to use the read/write helpers, but the casts
were not re-added. This is necessary because the read/write helpers do
take pointers. Otherwise we get a lot of warnings like:
dm9000x.c: In function 'dm9000_inblk_8bit':
dm9000x.c:172: warning: passing argument 1 of 'readb'
makes pointer from integer without a cast
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Thomas Weber <weber@corscience.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch add support for the ve8313 board based on
Freescale MPC8313 CPU.
- serial console on UART 1
- 128 MB DDR RAM
- 32 MB NOR Flash
- 16 MB NAND Flash
- Ethernet MII Mode over on TSEC0
- micrel ksz804 phy
- Hardware WDT MAX824
changes since v1
- Environment size = sector size
- use red. environment
- add comments from Kim Phillips
- add MAKEALL, MAINTAINERS entry
- Codingstyle issues fixed
- inserted original Copyrights
- PCI subsys vendor ID changed from 0x1057 (Motorola)
to 0x1957 (Freescale)
changes since v2
- add comments from Wolfgang Denk
- fix Codingstyle and some comments
- reworked WDT reset (just toggling the WD_TRIG pin)
- Environment size now 16KiB
- fixed RAMBOOT version
- fixed CONFIG_SYS_LOAD_ADDR
- renamed CONFIG_TSEC1_NAME to TSEC1
Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC8308RDB: minimal support for devboard from Freescale
This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
The following features are enabled in configuration but not fully tested:
I2C (used to get the board revision)
I2C-connected RTC
VSC7385 switch
There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ilya Yanok [Mon, 28 Jun 2010 12:44:33 +0000 (16:44 +0400)]
mpc8308: support for Freescale MPC8308 cpu
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Mike Frysinger [Wed, 2 Jun 2010 09:20:18 +0000 (05:20 -0400)]
Blackfin: bf537-stamp: use common spi boot workaround code
The common gpio code provides a function for handling the spi boot
workaround logic, so switch over to that rather than bang on the
gpio MMRs directly.
Mike Frysinger [Wed, 2 Jun 2010 09:08:58 +0000 (05:08 -0400)]
Blackfin: back out status_led.h stubs
When boards define CONFIG_BOARD_SPECIFIC_LED, the common led definitions
are OK for Blackfin boards. So switch the few boards using these over to
the common code.
Mike Frysinger [Wed, 2 Jun 2010 08:17:26 +0000 (04:17 -0400)]
Blackfin: import gpio/portmux layer from Linux
The current pinmux handling has spread throughout Blackfin drivers and
board code and is getting hideous to maintain. So import the gpio and
portmux layer from the Blackfin Linux code. This should spur a serious
of cleanups across the Blackfin tree.
Mike Frysinger [Wed, 5 May 2010 05:08:53 +0000 (01:08 -0400)]
Blackfin: bf537-stamp: drop old spi_flash driver
The new common spi framework and spi flash subsystem provides all the same
functionality as the old Blackfin-specific driver, so punt the old one as
it has been sticking around long enough.
Mike Frysinger [Thu, 29 Apr 2010 05:34:57 +0000 (01:34 -0400)]
Blackfin: implement bootcount support
The default storage location for bootcount is EVT0. This version uses
one 32bit value and combines the magic/count value in the upper/lower
16bits. If there is demand for more, should be easy to do.
Mike Frysinger [Thu, 29 Apr 2010 04:31:36 +0000 (00:31 -0400)]
Blackfin: clean up trace buffer handling when crashing
Avoid banging on the trace MMRs when debugging is disabled, avoid calling
the funcs multiple times in a row, disable the trace buffer earlier in the
exception handler to avoid eating more user entries, and dump the buffer
before calling the kgdb hook. This way we maximize useful debugging info
up front rather than needing external tools (like gdb/serial/etc...).
Wolfgang Denk [Mon, 28 Jun 2010 20:00:46 +0000 (22:00 +0200)]
Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
Stefan Roese [Thu, 27 May 2010 14:45:20 +0000 (16:45 +0200)]
ppc4xx: Cleanup Boot/FLASH TLB reassignment for PPC440/460
Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_code (start.S) the
cache inhibit attribute for this TLB is set to disable cache. This is
needed for the CFI FLASH driver.
This patch now cleans this code up:
- CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not
defined in the top of this file. This way, we can remove an ugly
#ifdef in this code.
- Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..."
statement with "#if defined(CONFIG_440)".
- Remove unnecessary cache invalidate calls resulting in faster bootup.
Stefan Roese [Tue, 25 May 2010 13:33:14 +0000 (15:33 +0200)]
ppc4xx: DDR2: Complete RDSS configuration on non-SPD based boards
As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The
code for this is now factored out and executed for non-SPD based boards
as well.
Stefan Roese [Tue, 25 May 2010 13:23:07 +0000 (15:23 +0200)]
ppc4xx: Enable overwriting of default scan window for IBM DDR2 controller
This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with
board specific values. The parameters of the weak default function are
corrected as well. This way we don't need the casts any more.
This feature will be used by an upcoming PPC460GT board port.
Stefan Roese [Fri, 21 May 2010 13:06:19 +0000 (15:06 +0200)]
ppc4xx: Enable PCIe support without PCI support on PPC440/460
By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's still
possible to use the U-Boot PCI infrastructure for the PCIe ports.
This configuration option is needed for a new 460GT board, which uses
PCIe but has PCI disabled.
Stefan Roese [Wed, 19 May 2010 09:13:24 +0000 (11:13 +0200)]
ppc4xx: Enable booting with Option E on 460EX/EXr/GT
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.
projects / u-boot.git / log