Copy missing Kernel patch to make SLEWCTRL_SLOW available in device tree
and to correct the value of SLEWCTRL_FAST.
After this patch, the Kernel and U-boot device tree settings for
SLEWCTRL have the same effect.
"
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness. Current users of the macro (i2c and mdio) are left
unmodified as SLEWCTRL_FAST was the macro used and actual desired state.
Tested on am335x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
"
Signed-off-by: Christian Amann <Christian.Amann@de.bosch.com>
Marek Vasut [Tue, 21 Aug 2018 13:53:33 +0000 (15:53 +0200)]
env: ubi: Add missing ENV_NAME
Add missing environment name for UBI, to prevent this NULL in output:
Loading Environment from <NULL>...
and rather have a valid UBI there:
Loading Environment from UBI...
Neil Stainton [Mon, 20 Aug 2018 15:46:19 +0000 (15:46 +0000)]
u-boot: align cache flushes in load_elf_image_shdr to line boundaries
Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.
Currently when using bootelf to load an image on Arm, several warnings
such as the following appear in the console:
CACHE: Misaligned operation at range [87800000, 8783c5e0]
CACHE: Misaligned operation at range [8783c5e0, 8784b3e0]
Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Reword commit message to include the info after the --- which
included the Signed-off-by line, and change ' at ' to '@'] Signed-off-by: Tom Rini <trini@konsulko.com>
In an earlier proposed patch, bcmstb.c implemented timer_read_counter,
but it was updated to implement get_ticks instead. This patch updates
the declaration in timer.h accordingly.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
[common/avb_verify.c:738] -> [common/avb_verify.c:741]: (warning) \
Either the condition 'ops' is redundant or there is possible null \
pointer dereference: ops.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:07 +0000 (02:43 +0200)]
common: avb_verify: Fix memory leaks
Cppcheck (v1.85) reports w/o this patch:
[common/avb_verify.c:351]: (error) Memory leak: part
[common/avb_verify.c:356]: (error) Memory leak: part
[common/avb_verify.c:361]: (error) Memory leak: part
[common/avb_verify.c:366]: (error) Memory leak: part
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:05 +0000 (02:43 +0200)]
common: kconfig: Mark AVB_VERIFY as dependent on PARTITION_UUIDS
Avoid below compiler [1] errors, reproduced with configuration [2]:
common/avb_verify.c: In function ‘get_unique_guid_for_partition’:
common/avb_verify.c:692:31: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
uuid_size = sizeof(part->info.uuid);
^
common/avb_verify.c:696:29: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
memcpy(guid_buf, part->info.uuid, uuid_size);
^
LD drivers/built-in.o
make[2]: *** [scripts/Makefile.build:278: common/avb_verify.o] Error 1
common/avb_verify.c: In function ‘avb_find_dm_args’:
common/avb_verify.c:179:30: warning: left-hand operand of comma expression has no effect [-Wunused-value]
for (i = 0; i < AVB_MAX_ARGS, args[i]; ++i) {
libavb: Handle wrong hashtree_error_mode in avb_append_options()
Exit with AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
when hashtree_error_mode value passed to avb_append_options()
is unknown (not from AvbHashtreeErrorMode enum).
Otherwise, default value is not handled in the
switch(hashtree_error_mode), which causes below compile warning:
lib/libavb/avb_cmdline.c: In function ‘avb_append_options’:
lib/libavb/avb_cmdline.c:354:13: warning: ‘dm_verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
new_ret = avb_replace(
~~~~~~~~^~~~~~~~~~~~~~
slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libavb/avb_cmdline.c:363:8: warning: ‘verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
if (!cmdline_append_option(
^~~~~~~~~~~~~~~~~~~~~~
slot_data, "androidboot.veritymode", verity_mode)) {
Jagdish Gediya [Thu, 23 Aug 2018 17:23:33 +0000 (22:53 +0530)]
armv8: layerscape: Build u-boot-with-spl.bin for selected boards
This patch reverts the changes made for ls1088a and ls2080a
based boards in commit 18b6dd6cb0564 ("armv8: layerscape: Drop
u-boot-with-spl.bin for selected boards").
u-boot-with-spl.bin is required for Gen3 based SoC where internal
ROM copy data in the internal memory
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> CC: Priyanka Jain <priyanka.jain@nxp.com> CC: Pramod Kumar <pramod.kumar_1@nxp.com> CC: Ashish Kumar <ashish.kumar@nxp.com> CC: York Sun <york.sun@nxp.com> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Jagan Teki [Fri, 20 Jul 2018 07:14:01 +0000 (12:44 +0530)]
usb: musb-new: Call musb_platform_exit from musb_stop
musb stop is musb core call during unregister or shutting down
gadget or host musb. For graceful exit add musb_platform_exit
on musb_stop so-that it can exit the musb platform driver as well.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:14:00 +0000 (12:44 +0530)]
usb: musb-new: sunxi: Add proper musb exit support
musb have platform ops to do proper graceful exit,
so add the exit call and move musb platform exit code
instead of keeping it in driver remove.
This make proper shutdown of musb where .remove will
call disable, exit serially via musb_stop.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:13:59 +0000 (12:43 +0530)]
musb-new: sunxi: Access ahb_reset0_cfg via ccm offset
reset0 is not available for sun4i, 5i and 7i so access
the reset0 offset from ccm via driver data for relevant
Allwinner SoC. this will eventually drop the existing
ifdef for SUN6I.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:13:57 +0000 (12:43 +0530)]
usb: musb-new: sunxi: Allocate struct phy in private
Allocate struct phy in private structure instead of allocating
locally and assign it to a pointer. This eventually fix miss
alignment phy which is used in another functions.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 20 Jul 2018 07:13:56 +0000 (12:43 +0530)]
usb: musb-new: Fix improper musb host pointer
When MUSB is operating in peripheral mode, probe registering
musb core using musb_register which intern return int value
for validation. so there is no scope to preserve struct musb
pointer but the same can be used in .remove musb_stop.
So fix this by return musb_register with struct musb pointer.
Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Tue, 21 Aug 2018 17:15:21 +0000 (13:15 -0400)]
Merge tag 'signed-efi-2018.09' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-08-21
A few fixes for 2018.09. Most noticable are:
- unbreak x86 target (-fdata-section fallout)
- fix undefined behavior in a few corner cases
- make Jetson TX1 boot again
- RTS fixes
- implement reset for simple output
Stephen Warren [Tue, 31 Jul 2018 18:39:07 +0000 (12:39 -0600)]
ARM: tegra: avoid more operations in non-secure world
A secure monitor that runs before U-Boot, and hence causes U-Boot to run
in non-secure world, must implement a few operations that U-Boot
otherwise implements when running in secure world. Fix U-Boot to skip
these operations when running in non-secure world. In particular:
- The secure monitor must provide the LP0 resume code and own LP0
configuration in order to maintain security, so must initialize all
the PMC scratch registers used by the boot ROM during LP0 resume.
Consequently, U-Boot should not attempt to clear those registers,
since the register accesses will fail or cause an error.
- The secure monitor owns system security, and so is responsible for
configuring security-related items such as the VPR.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
cmd: efi: Clarify calculation precedence for '&' and '?'
Fix cppcheck complaint:
[cmd/efi.c:173]: (style) Clarify calculation precedence for '&' and '?'.
Fixes: f1a0bafb5802 ("efi: Add a command to display the memory map") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Starting with commit 867a6ac86dd8 ("efi: Add start-up library code"),
sparse constantly complains about truncated constant value in efi.h:
include/efi.h:176:35: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
This can get quite noisy, preventing real issues to be noticed:
$ make defconfig
*** Default configuration is based on 'sandbox_defconfig'
$ make C=2 -j12 2>&1 | grep truncates | wc -l
441
After the patch is applied:
$ make C=2 -j12 2>&1 | grep truncates | wc -l
0
$ sparse --version
v0.5.2
Following the suggestion of Heinrich Schuchardt, instead of only
fixing the root-cause, I replaced the whole enum of _SHIFT values
by ULL defines. This matches both the UEFI 2.7 spec and the Linux
kernel implementation.
Some ELF size comparison before and after the patch (gcc 7.3.0):
efi-x86_payload64_defconfig:
text data bss dec hex filename
407174 29432 278676 715282 aea12 u-boot.old
407152 29464 278676 715292 aea1c u-boot.new
-22 +32 0 +10
efi-x86_payload32_defconfig:
text data bss dec hex filename
447075 30308 280076 757459 b8ed3 u-boot.old
447053 30340 280076 757469 b8edd u-boot.new
-22 +32 0 +10
Fixes: 867a6ac86dd8 ("efi: Add start-up library code") Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
efi_loader: avoid NULL dereference in efi_get_memory_map()
We should only dereference parameter memory_map_size after checking that
it is valid.
Fixes: 8e835554b36b ("efi_loader: check parameters of GetMemoryMap") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
AKASHI Takahiro [Fri, 10 Aug 2018 06:36:32 +0000 (15:36 +0900)]
efi_loader: fix a parameter check at CreateEvent()
The commit 21b3edfc9644 ("efi_loader: check parameters of CreateEvent")
enforces a strict parameter check at CreateEvent(). On the other hand,
UEFI specification version 2.7, section 7.1, says:
The EVT_NOTIFY_WAIT and EVT_NOTIFY_SIGNAL flags are exclusive. If
neither flag is specified, the caller does not require any notification
concerning the event and the NotifyTpl, NotifyFunction, and
NotifyContext parameters are ignored.
So the check should be mitigated so as to comply with the specification.
Without this patch, EDK2's Shell.efi won't be started.
Fixes: 21b3edfc9644 ("efi_loader: check parameters of CreateEvent") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 20 Aug 2018 12:25:49 +0000 (14:25 +0200)]
riscv: Include bss subsections in linker script
When we build with -fdata-sections we may end up with bss subsections. Our
linker script explicitly lists only a single consecutive bss section though.
Alexander Graf [Mon, 20 Aug 2018 12:20:51 +0000 (14:20 +0200)]
x86: Enable -fdata-sections always
We left -fdata-sections disabled for x86_64 before because we encountered
random bugs that were at that time inexplicable.
Turns out this really was just side effects of missing .bss* statements
in the linker scripts. With those fixed, we can enable data sections for all
targets.
Alexander Graf [Mon, 20 Aug 2018 12:17:41 +0000 (14:17 +0200)]
x86: Include bss subsections in linker script
When we build with -fdata-sections we may end up with bss subsections. Our
linker script explicitly lists only a single consecutive bss section though.
Icenowy Zheng [Sat, 18 Aug 2018 05:36:44 +0000 (13:36 +0800)]
sunxi: fix sid base address macro name for H6
In the current H6 CPU memory space code, the SUNXI in the macro name of
the SID address base is wrongly spelled as SNUXI, which leads to SID
readout not working.
Fix this macro name.
Fixes: 55f6b1c351c9 ("sunxi: add basic memory map definitions of H6 SoC") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 13 Aug 2018 17:29:40 +0000 (22:59 +0530)]
configs: sun7i: Fix to use emmc dts for OLinuXino_MICRO-eMMC
A20 OLinuXino Micro eMMC board has emmc with mmc2 slot
so use proper dts, sun7i-a20-olinuxino-micro-emmc.dts
Cc: Stefan Mavrodiev <stefan@olimex.com> Cc: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Sam Protsenko [Thu, 16 Aug 2018 20:34:13 +0000 (23:34 +0300)]
cmd: Add dtimg command
dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.
This command is needed to provide Android boot with new Android DT image
format further.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Sam Protsenko [Thu, 16 Aug 2018 20:34:12 +0000 (23:34 +0300)]
common: Add support for Android DT image
Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
- printing the dump of image structure
- getting the address and size of desired dtb/dtbo file
This patch uses dt_table.h file, that was added in commit 643cefa4d848
("Import Android's dt_table.h for DT image format") by Alex Deymo.
fs/fat: debug-print file read position during file_fat_read_at()
In order to make the debug print in file_fat_read_at() a tad more useful,
show the offset the file is being read at alongside the filename.
Suggested-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adam Ford [Fri, 10 Aug 2018 21:07:47 +0000 (16:07 -0500)]
ARM: da850evm: Enable SPL_SYS_MALLOC_SIMPLE
The SPL space is limited. In order to try to enable DM in SPL,
we need more space. When combined wtih TINY_PRINTF, this reduces
the size of SPL by 6.5k
Original:
text data bss dec hex filename
20760 1216 80 22056 5628 spl/u-boot-spl
Tiny Printf
text data bss dec hex filename
17947 1216 80 19243 4b2b spl/u-boot-spl
Malloc Simple + Tiny Printf
text data bss dec hex filename
15187 176 28 15391 3c1f spl/u-boot-spl
Adam Ford [Fri, 10 Aug 2018 20:53:41 +0000 (15:53 -0500)]
ARM: da850evm: Enable USE_TINY_PRINTF
The SPL space is limited. In order to try to enable DM in SPL,
we need more space. This reduces the size of SPL by ~2.7K
before:
text data bss dec hex filename
20760 1216 80 22056 5628 spl/u-boot-spl
after:
text data bss dec hex filename
17947 1216 80 19243 4b2b spl/u-boot-spl
Adam Ford [Fri, 10 Aug 2018 10:24:12 +0000 (05:24 -0500)]
configs: da850evm: Remove DM_I2C_COMPAT
Since using DM_I2C_COMPAT throws a warning during compilation,
and it isn't really needed any longer, so this patch removes
this feature and shrinks the code a bit.
from:
text data bss dec hex filename
343326 13388 123448 480162 753a2 u-boot
to:
text data bss dec hex filename
342924 13380 123440 479744 75200 u-boot
Stephen Warren [Thu, 2 Aug 2018 17:45:57 +0000 (11:45 -0600)]
Revert "efi_loader: efi_allocate_pages is too restrictive"
This reverts commit aa909462d01866354f4cd4534db5f571c2cf1fbb. This change
caused "dhcp filename" to crash the system on p2371-2180 (Jetson TX1), for
example when running test/py.
Reverting this change isn't optimal, but at least restores TX1 to a working
state. In the future, we should:
a) Fix whatever problem causes the crash with this patch applied. This
needs further discussion, so isn't something we can immediately do.
b) Undo the revert; re-apply the original patch to efi_allocate_pages.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 6 Aug 2018 22:29:01 +0000 (00:29 +0200)]
sandbox: Move BSS after EFI sections
Something went wrong when writing the sandbox linker scripts and so we
ended up with a .bss section marker right before the efi runtime sections.
That obviously is a terrible idea, as it may result in overwriting efi
runtime code and data. So let's move the .bss identifier behind the efi
sections.
Bin Meng [Fri, 10 Aug 2018 09:39:38 +0000 (02:39 -0700)]
x86: efi: payload: Add default TSC frequency in the device tree
It was observed sometimes U-Boot as the EFI payload fails to boot on
QEMU. This is because TSC calibration fails with no valid frequency.
This adds default TSC frequency in the device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 10 Aug 2018 09:39:37 +0000 (02:39 -0700)]
x86: coreboot: Add default TSC frequency in the device tree
It was observed sometimes U-Boot as the coreboot payload fails to
boot on QEMU. This is because TSC calibration fails with no valid
frequency. This adds default TSC frequency in the device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Fri, 10 Aug 2018 09:39:36 +0000 (02:39 -0700)]
x86: tsc: Try hardware calibration first
At present if TSC frequency is provided in the device tree, it takes
precedence over hardware calibration result. This swaps the order to
try hardware calibration first and uses device tree as last resort.
This can be helpful when a generic dts (eg: coreboot/efi payload) is
supposed to work on as many hardware as possible, including emulators
like QEMU where TSC hardware calibration sometimes fails.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Fri, 10 Aug 2018 09:39:35 +0000 (02:39 -0700)]
x86: dts: Remove coreboot_fb.dtsi
There is no need to keep a separate coreboot_fb.dtsi since now we
have a generic coreboot payload dts.
While we are here, this also remove the out-of-date description in
the documentation regarding to coreboot framebuffer driver with
U-Boot loaded as a payload from coreboot. As the testing result with
QEMU 2.5.0 shows, the driver just works like a charm.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 10 Aug 2018 09:39:33 +0000 (02:39 -0700)]
x86: coreboot: Add generic coreboot payload support
Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.
But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andy Shevchenko [Mon, 6 Aug 2018 16:00:22 +0000 (19:00 +0300)]
Makefile: Don't generate position independent code
Since gcc-8 the --enable-default-pie starts producing code which assembler
can't translate in case of U-Boot. The build fails with
{standard input}: Assembler messages:
{standard input}:21100: Error: junk at end of line, first unrecognized character is `@'
{standard input}:21120: Error: junk at end of line, first unrecognized character is `@'
and so on.
This is usually the case for x86 platform because in many cases it uses host
compiler from the Linux distributions, where PIE is enabled by default.
Previously (gcc-7 and earlier) that was a potential issue due to absence of
constructions like
.long end.5561@gotoff-start.5558@gotoff
which are a cause of above error messages in gcc-8.
Fix all these by disabling PIE on Makefile level.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Depends on board design, the gpio regulator sometimes
connects with a big capacitance. When need to off, then
on the regulator, if there is no enough delay,
the voltage does not drop to 0, so introduce this
property to handle such case.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Michal Simek [Thu, 19 Jul 2018 06:45:45 +0000 (08:45 +0200)]
env: Merge Rockchip, Sunxi, Zynq and ZynqMP
There is no reason to have the same Kconfig options for different SoCs
separately. The patch is merging them together.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
[trini: Fix ENV_SIZE around ENV_IS_NOWHERE] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Tue, 7 Aug 2018 12:08:32 +0000 (07:08 -0500)]
Removed unused references to CONFIG_SERIALx
After creating CONS_INDEX and migrating a bunch of boards to it,
there are a bunch of defined references to CONFIG_SERIALx which
are not referenced in any C code or #ifdef, so they can now be
removed
Alex Kiernan [Sat, 21 Jul 2018 20:25:33 +0000 (20:25 +0000)]
Migrate bootlimit to Kconfig
Migrate boards which set bootlimit in the environment to Kconfig.
We exclude gurnard_defconfig which includes a bootlimit=, but doesn't set
CONFIG_BOOTCOUNT_LIMIT, so we'd fail to include a bootlimit setting
if we migrated it.
display5_defconfig and display5_factory_defconfig share a SYS_CONFIG_NAME,
but only display5_defconfig enables CONFIG_BOOTCOUNT_LIMIT, so we fail to
set bootlimit= in display5_factory_defconfig. This is okay because the
display5_factory_defconfig doesn't need to have it set, as it is only
meant to prepare the board in the factory.
Environment changes for all modified configs as seen from buildman:
boards.cfg is up to date. Nothing to do.
Summary of 3 commits for 32 boards (8 threads, 1 job per thread)
01: Merge git://git.denx.de/u-boot-x86
arm: + draco etamin rastaban pxm2 display5 thuban rut
02: Add BOOTCOUNT_BOOTLIMIT to set reboot limit
03: Migrate bootlimit to Kconfig
- display5_factory: bootlimit=3
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tom Rini [Thu, 16 Aug 2018 12:16:24 +0000 (08:16 -0400)]
configs: Migrate CONFIG_NR_DRAM_BANKS
We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
CONFIG_NR_DRAM_BANKS after a check, just migrate it over now.
- CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 +
2), set this to 8.
Tom Rini [Thu, 16 Aug 2018 20:44:19 +0000 (16:44 -0400)]
CONFIG_SYS_GENERIC_BOARD: Finish migration
While we have long since migrated to CONFIG_SYS_GENERIC_BOARD being
enabled, we had just a few places left that still referenced or defined
it. Update.
Marek Vasut [Tue, 7 Aug 2018 10:24:35 +0000 (12:24 +0200)]
phy: Fix off-by-one error when parsing DT PHY bindings
The code fails to copy the last PHY phandle argument, so it is
missing from the adjusted phandle args and the consumer cannot
use it to determine what the PHY should do.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Wed, 1 Aug 2018 16:28:35 +0000 (18:28 +0200)]
mmc: socfpga: Add clock framework support
Add support for fetching the clock frequency both using the legacy
method in case clock framework is disabled as well as via the clock
framework if it is enabled. This allows for migration to the clock
framework on platforms which supports it while not breaking legacy
platforms. That said, the legacy method must be removed eventually.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Tue, 31 Jul 2018 15:58:07 +0000 (17:58 +0200)]
clk: socfpga: Add initial Arria10 clock driver
Add clock driver for the Arria10, which allows reading the clock
frequency from all the clock described in the DT. The driver also
allows enabling and disabling the clock. Reconfiguring frequency
is not supported thus far.
Since the DT bindings for the SoCFPGA clock are massively misdesigned
and the handoff DT adds additional incorrectly described entries to
the DT, the driver contains workarounds which attempt to rectify all
of those problems.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Mon, 6 Aug 2018 20:07:40 +0000 (22:07 +0200)]
ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Add the pre-reloc DT markers to clock nodes needed in SPL and early
U-Boot stages. This is required to let the Arria10 clock driver start
early and provide clock information for UART and SDMMC.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Tue, 31 Jul 2018 15:33:42 +0000 (17:33 +0200)]
ARM: socfpga: clk: Drop unused variables on Arria10
The variables removed in this patch are never used, they are only ever
assigned and then waste precious memory. Drop both the assignment and
the variables.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Mon, 6 Aug 2018 19:47:50 +0000 (21:47 +0200)]
ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
The L4SP and MMC clock precalculation is specific to Gen5, it is not
needed on Arria10/Stratix10. Isolate it to Gen5 until there is a proper
clock driver for Gen5, at which point this will go away completely.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Mon, 30 Jul 2018 13:56:19 +0000 (15:56 +0200)]
ARM: socfpga: clk: Obtain handoff base clock via DM
Bind fixed clock driver to the base clock instantiated in the handoff
DT and use DM clock framework to get their clock rate. This replaces
the ad-hoc DT parsing present thus far.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Mon, 13 Aug 2018 18:06:46 +0000 (20:06 +0200)]
ARM: socfpga: Remove adhoc ethernet reset and configuration
Remove ad-hoc ethernet syscon registers configuration and reset support.
Reset is now handled by the reset framework and the syscon registers are
set in the dwmac_socfpga.c driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
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