]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
6 years agols1088a: remove dhcp function from u-boot env as boot source
Pramod Kumar [Fri, 14 Sep 2018 11:24:33 +0000 (16:54 +0530)]
ls1088a: remove dhcp function from u-boot env as boot source

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agols1012a: remove debug info from u-boot log
Pramod Kumar [Wed, 12 Sep 2018 08:46:49 +0000 (14:16 +0530)]
ls1012a: remove debug info from u-boot log

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1043a: enable icid setup for qman portals
Laurentiu Tudor [Mon, 27 Aug 2018 14:34:00 +0000 (17:34 +0300)]
armv8: ls1043a: enable icid setup for qman portals

Enable support for ICID setup of qman portals and the required device
tree fixups.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1043a: add icid setup support
Laurentiu Tudor [Mon, 27 Aug 2018 14:33:59 +0000 (17:33 +0300)]
armv8: ls1043a: add icid setup support

Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1043a: advertise QMan v3 in configuration
Laurentiu Tudor [Mon, 27 Aug 2018 14:33:58 +0000 (17:33 +0300)]
armv8: ls1043a: advertise QMan v3 in configuration

The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: fsl-layerscape: add missing qe base address define
Laurentiu Tudor [Mon, 27 Aug 2018 14:33:57 +0000 (17:33 +0300)]
armv8: fsl-layerscape: add missing qe base address define

Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agodriver: net: fsl-mc: Memset MC reserve ram memory before usage
Prabhakar Kushwaha [Mon, 27 Aug 2018 07:28:52 +0000 (12:58 +0530)]
driver: net: fsl-mc: Memset MC reserve ram memory before usage

Memory reserved for Management Complex needs to be cleaned before any
usage.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agou-boot: fixup the iommu-map property of fsl-mc node
Nipun Gupta [Mon, 20 Aug 2018 10:31:14 +0000 (16:01 +0530)]
u-boot: fixup the iommu-map property of fsl-mc node

The iommu-map property in the fsl-mc node is updated by
valid stream-ids by u-boot. This patch is to fixup this
property for LS208x and LS1088.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agols1012afrwy: Add ls1012afrwy revC board support.
Pramod Kumar [Tue, 14 Aug 2018 04:19:55 +0000 (09:49 +0530)]
ls1012afrwy: Add ls1012afrwy revC board support.

LS1012AFRWY supports three board revisions.
Revision A and B board are collectively identified as revA/B,
Revision C board is identifies as revC.

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoscsi: ceva: add ls1021a soc support.
Peng Ma [Wed, 1 Aug 2018 06:15:43 +0000 (14:15 +0800)]
scsi: ceva: add ls1021a soc support.

Add ahci compatible support for ls1021a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarm: ls1021atwr: enable DM support for sata
Peng Ma [Wed, 1 Aug 2018 06:15:42 +0000 (14:15 +0800)]
arm: ls1021atwr: enable DM support for sata

Enable related configs to support sata DM feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv7: dts: fsl-ls1021a: add sata node support enable sata for ls1021a-qds and ls1021...
Peng Ma [Wed, 1 Aug 2018 06:15:41 +0000 (14:15 +0800)]
armv7: dts: fsl-ls1021a: add sata node support enable sata for ls1021a-qds and ls1021a-twr

Add sata node to support this feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv7: fsl: remove sata support
Peng Ma [Wed, 1 Aug 2018 06:15:40 +0000 (14:15 +0800)]
armv7: fsl: remove sata support

Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarm64: ls1043aqds: enable DM support for sata
Peng Ma [Wed, 1 Aug 2018 03:35:16 +0000 (11:35 +0800)]
arm64: ls1043aqds: enable DM support for sata

Enable related configs to support sata DM feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoscsi: ceva: add ls1043a soc support
Peng Ma [Wed, 1 Aug 2018 03:35:15 +0000 (11:35 +0800)]
scsi: ceva: add ls1043a soc support

Add ahci compatible support for ls1043a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: dts: fsl-ls1043a: add sata node support
Peng Ma [Wed, 1 Aug 2018 03:35:14 +0000 (11:35 +0800)]
armv8: dts: fsl-ls1043a: add sata node support

Add sata node to support ls1043a.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoEnable CONFIG_BLK and CONFIG_DM_MMC to Kconfig
Yinbo Zhu [Tue, 25 Sep 2018 06:47:13 +0000 (14:47 +0800)]
Enable CONFIG_BLK and CONFIG_DM_MMC to Kconfig

This enables the folowing to Kconfig:
CONFIG_BLK
CONFIG_DM_MMC

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv7: ls1021a: enable esdhc
Yinbo Zhu [Tue, 25 Sep 2018 06:47:12 +0000 (14:47 +0800)]
armv7: ls1021a: enable esdhc

This patch is to enable eSDHC for ls1021a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1046a: add eSDHC node
Yinbo Zhu [Tue, 25 Sep 2018 06:47:11 +0000 (14:47 +0800)]
armv8: ls1046a: add eSDHC node

This patch is to add eSDHC node for ls1046a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1043a: add eSDHC node
Yinbo Zhu [Tue, 25 Sep 2018 06:47:10 +0000 (14:47 +0800)]
armv8: ls1043a: add eSDHC node

This patch is to add eSDHC node for ls1043a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: add eSDHC node
Yinbo Zhu [Tue, 25 Sep 2018 06:47:09 +0000 (14:47 +0800)]
armv8: ls1088a: add eSDHC node

This patch is to add eSDHC node for ls1088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls2088a: add eSDHC node
Yinbo Zhu [Tue, 25 Sep 2018 06:47:08 +0000 (14:47 +0800)]
armv8: ls2088a: add eSDHC node

This patch is to add eSDHC node for ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8/ls1088a/ls2088a: esdhc: Add esdhc clock support
Yinbo Zhu [Tue, 25 Sep 2018 06:47:07 +0000 (14:47 +0800)]
armv8/ls1088a/ls2088a: esdhc: Add esdhc clock support

This patch adds esdhc clock support for ls1088a and ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoppa/fm/qe: use block layer in ppa/fm/qe driver
Yinbo Zhu [Tue, 25 Sep 2018 06:47:06 +0000 (14:47 +0800)]
ppa/fm/qe: use block layer in ppa/fm/qe driver

At present the MMC subsystem maintains its own list of MMC devices.
This cannot work with driver model when CONFIG_BLK is enabled, use
blk_dread to replace previous mmc read interface, use
mmc_get_blk_desc to get the mmc device property.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoMerge git://git.denx.de/u-boot-imx
Tom Rini [Thu, 20 Sep 2018 00:35:27 +0000 (20:35 -0400)]
Merge git://git.denx.de/u-boot-imx

- changes in pico-* boards
- fix imx6ull pinmux

6 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Thu, 20 Sep 2018 00:35:05 +0000 (20:35 -0400)]
Merge git://git.denx.de/u-boot-marvell

- Multiples updates to the turris boards / platform
- Changes / enhancements to the Marvell PHY drivers, mainly
  to support the turris platform
- Many fixes and enhancements to the pxa3xx NAND driver
- Fixes for the UART boot mode in kwboot
- Misc minor changes to other 32bit and 64bit boards

6 years agoarm: mvebu: clearfog: enable eMMC boot partitions support
Baruch Siach [Thu, 13 Sep 2018 09:41:50 +0000 (12:41 +0300)]
arm: mvebu: clearfog: enable eMMC boot partitions support

The Clearfog SOM can optionally have eMMC installed. Enable support for
eMMC boot partitions by default.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agophy: marvell: add SATA comphy RX/TX polarity invert support
Rabeeh Khoury [Thu, 6 Sep 2018 09:37:48 +0000 (12:37 +0300)]
phy: marvell: add SATA comphy RX/TX polarity invert support

This patch adds support to Armada 7k/8k comphy RX/TX lane swap. The
'phy-invert' DT property defines the inverted signals.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agofix: cmd: mvebu: Exclude mvebu commands from SPL builds
Konstantin Porotchkin [Wed, 29 Aug 2018 13:34:54 +0000 (16:34 +0300)]
fix: cmd: mvebu: Exclude mvebu commands from SPL builds

Exclude mvebu commands from SPL builds

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agofix: mvebu: Add SPI parameters for environment setup
Konstantin Porotchkin [Wed, 29 Aug 2018 13:34:53 +0000 (16:34 +0300)]
fix: mvebu: Add SPI parameters for environment setup

Add definitions for CONFIG_ENV_SPI_BUS and CONFIG_ENV_SPI_CS
to Armada-388-GP board configuration

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agofix: env: Fix the SPI flash device setup for DM mode
Konstantin Porotchkin [Wed, 29 Aug 2018 13:34:52 +0000 (16:34 +0300)]
fix: env: Fix the SPI flash device setup for DM mode

For some reason the spi_flash_probe_bus_cs() is called
inside the setup_flash_device() with zero values in place
of configurated SPI flash mode and maximum flash speed.
This code causes HALT error during startup environment
relocation on some platforms - namely Armada-38x-GP board.
Fix the function call by replacing zeros with the appropriate
values - CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agofix: nand: pxa3xx: Add WA for eliminating flash ready timeout
David Sniatkiwicz [Wed, 29 Aug 2018 08:56:18 +0000 (11:56 +0300)]
fix: nand: pxa3xx: Add WA for eliminating flash ready timeout

add delay before processing the status flags in pxa3xx_nand_irq().

Signed-off-by: David Sniatkiwicz <davidsn@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
c: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agonand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NAND
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:17 +0000 (11:56 +0300)]
nand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NAND

Add support for NAND chips with 8KB page, 4 and 8 bit ECC (ONFI).

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Ofer Heifetz <oferh@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agonand: pxa3xx: cosmetic: add comments to the timing layout structures
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:16 +0000 (11:56 +0300)]
nand: pxa3xx: cosmetic: add comments to the timing layout structures

Add comments with timing parameter names and some details about
nand layout fileds.
Remove unneeded definition.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agofix: nand: Replace hardcoded page chunk size with calculated one
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:15 +0000 (11:56 +0300)]
fix: nand: Replace hardcoded page chunk size with calculated one

Replace the hardcoded value of page chink with value that
depends on flash page size and ECC strength.
This fixes nand access errors for 2K page flashes with 8-bit ECC.
Move the initial flash commannd function assignment past the ECC
structures initialization for eliminating usage of hardcoded page
chunk size value.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx: add support for Toshiba flash
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:14 +0000 (11:56 +0300)]
mtd: nand: pxa3xx: add support for Toshiba flash

Add timings and device ID for Toshiba TC58NVG1S3HTA00 flash

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx: add support for 2KB 8-bit flash
Victor Axelrod [Wed, 29 Aug 2018 08:56:13 +0000 (11:56 +0300)]
mtd: nand: pxa3xx: add support for 2KB 8-bit flash

Add support for 2KB page 8-bit ECC strength flash layout

Signed-off-by: Victor Axelrod <victora@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx: Fix READOOB implementation
Boris Brezillon [Wed, 29 Aug 2018 08:56:12 +0000 (11:56 +0300)]
mtd: nand: pxa3xx: Fix READOOB implementation

In the current driver, OOB bytes are accessed in raw mode, and when a
page access is done with NDCR_SPARE_EN set and NDCR_ECC_EN cleared, the
driver must read the whole spare area (64 bytes in case of a 2k page,
16 bytes for a 512 page). The driver was only reading the free OOB
bytes, which was leaving some unread data in the FIFO and was somehow
leading to a timeout.

We could patch the driver to read ->spare_size + ->ecc_size instead of
just ->spare_size when READOOB is requested, but we'd better make
in-band and OOB accesses consistent.
Since the driver is always accessing in-band data in non-raw mode (with
the ECC engine enabled), we should also access OOB data in this mode.
That's particularly useful when using the BCH engine because in this
mode the free OOB bytes are also ECC protected.

Fixes: 43bcfd2bb24a ("mtd: nand: pxa3xx: Add driver-specific ECC BCH support")
Cc: stable@vger.kernel.org
Reported-by: Sean Nyekjær <sean.nyekjaer@prevas.dk>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: add support for partial chunks
Ofer Heifetz [Wed, 29 Aug 2018 08:56:09 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: add support for partial chunks

This commit is needed to properly support the 8-bits ECC configuration
with 4KB pages.

When pages larger than 2 KB are used on platforms using the PXA3xx
NAND controller, the reading/programming operations need to be split
in chunks of 2 KBs or less because the controller FIFO is limited to
about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to
this requirement, the data layout on NAND is a bit strange, with ECC
interleaved with data, at the end of each chunk.

When a 4-bits ECC configuration is used with 4 KB pages, the physical
data layout on the NAND looks like this:

| 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC |

So the data chunks have an equal size, 2080 bytes for each chunk,
which the driver supports properly.

When a 8-bits ECC configuration is used with 4KB pages, the physical
data layout on the NAND looks like this:

| 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC |

So, the spare area is stored in its own chunk, which has a different
size than the other chunks. Since OOB is not used by UBIFS, the initial
implementation of the driver has chosen to not support reading this
additional "spare" chunk of data.

Unfortunately, Marvell has chosen to store the BBT signature in the
OOB area. Therefore, if the driver doesn't read this spare area, Linux
has no way of finding the BBT. It thinks there is no BBT, and rewrites
one, which U-Boot does not recognize, causing compatibility problems
between the bootloader and the kernel in terms of NAND usage.

To fix this, this commit implements the support for reading a partial
last chunk. This support is currently only useful for the case of 8
bits ECC with 4 KB pages, but it will be useful in the future to
enable other configurations such as 12 bits and 16 bits ECC with 4 KB
pages, or 8 bits ECC with 8 KB pages, etc. All those configurations
have a "last" chunk that doesn't have the same size as the other
chunks.

In order to implement reading of the last chunk, this commit:

 - Adds a number of new fields to the pxa3xx_nand_info to describe how
   many full chunks and how many chunks we have, the size of full
   chunks and partial chunks, both in terms of data area and spare
   area.

 - Fills in the step_chunk_size and step_spare_size variables to
   describe how much data and spare should be read/written for the
   current read/program step.

 - Reworks the state machine to accommodate doing the additional read
   or program step when a last partial chunk is used.

This commit is taken from Linux:
'commit c2cdace755b'
("mtd: nand: pxa3xx_nand: add support for partial chunks")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: pxa3xx_nand: Simplify pxa3xx_nand_scan
Ofer Heifetz [Wed, 29 Aug 2018 08:56:08 +0000 (11:56 +0300)]
mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan

This commit simplifies the initial configuration performed
by pxa3xx_nand_scan. No functionality change is intended.

This commit is taken from Linux:
'commit 154f50fbde53'
("mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: pxa3xx_nand: Fix initial controller configuration
Ofer Heifetz [Wed, 29 Aug 2018 08:56:07 +0000 (11:56 +0300)]
mtd: pxa3xx_nand: Fix initial controller configuration

The Data Flash Control Register (NDCR) contains two types
of parameters: those that are needed for device identification,
and those that can only be set after device identification.

Therefore, the driver can't set them all at once and instead
needs to configure the first group before nand_scan_ident()
and the second group later.

Let's split pxa3xx_nand_config in two halves, and set the
parameters that depend on the device geometry once this is known.

This commit is taken from Linux:
'commit 66e8e47eae65'
("mtd: pxa3xx_nand: Fix initial controller configuration")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: pxa3xx_nand: Increase the initial chunk size
Ofer Heifetz [Wed, 29 Aug 2018 08:56:06 +0000 (11:56 +0300)]
mtd: pxa3xx_nand: Increase the initial chunk size

The chunk size represents the size of the data chunks, which
is used by the controllers that allow to split transferred data.

However, the initial chunk size is used in a non-split way,
during device identification. Therefore, it must be large enough
for all the NAND commands issued during device identification.
This includes NAND_CMD_PARAM which was recently changed to
transfer up to 2048 bytes (for the redundant parameter pages).

Thus, the initial chunk size should be 2048 as well.

On Armada 370/XP platforms (NFCv2) booted without the keep-config
devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
command:

  [..]
  pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
  pxa3xx-nand f10d0000.nand: Wait time out!!!
  nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
  nand: Micron MT29F8G08ABABAWP
  nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224

This commit is taken from Linux:
'commit c7f00c29aa8'
("mtd: pxa3xx_nand: Increase the initial chunk size")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agonand: pxa3xx: Increase READ_ID buffer and make the size static
Ofer Heifetz [Wed, 29 Aug 2018 08:56:05 +0000 (11:56 +0300)]
nand: pxa3xx: Increase READ_ID buffer and make the size static

The read ID count should be made as large as the maximum READ_ID size,
so there's no need to have dynamic size. This commit sets the hardware
maximum read ID count, which should be more than enough on all cases.
Also, we get rid of the read_id_bytes, and use a macro instead.

This commit is taken from Linux:
'commit b226eca2088'
("nand: pxa3xx: Increase READ_ID buffer and make the size static")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx-nand: fix random command timeouts
Ofer Heifetz [Wed, 29 Aug 2018 08:56:04 +0000 (11:56 +0300)]
mtd: nand: pxa3xx-nand: fix random command timeouts

When 2 commands are submitted in a row, and the second is very quick,
the completion of the second command might never come. This happens
especially if the second command is quick, such as a status read
after an erase

This patch is taken from Linux:
'commit 21fc0ef9652f'
("mtd: nand: pxa3xx-nand: fix random command timeouts")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: fix early spurious interrupt
Ofer Heifetz [Wed, 29 Aug 2018 08:56:03 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: fix early spurious interrupt

When the nand is first probe, and upon the first command start, the
status bits should be cleared before the interrupts are unmasked.

This commit is taken from Linux:
'commit 0b14392db2e'
("mtd: nand: pxa3xx_nand: fix early spurious interrupt")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: sync pxa3xx_nand_set_sdr_timing()
Ofer Heifetz [Wed, 29 Aug 2018 08:56:02 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: sync pxa3xx_nand_set_sdr_timing()

Since the pxa3xx_nand driver was added there has been a discrepancy in
pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
This brings us into line with the current Linux code.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: use nand_to_mtd()
Ofer Heifetz [Wed, 29 Aug 2018 08:56:01 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: use nand_to_mtd()

Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
one that is already part of struct nand_chip. This brings us in line
with current U-boot and Linux conventions.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: Increase initial buffer size
Ofer Heifetz [Wed, 29 Aug 2018 08:56:00 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: Increase initial buffer size

The initial buffer is used for the initial commands used to detect
a flash device (STATUS, READID and PARAM).

ONFI param page is 256 bytes, and there are three redundant copies
to be read. JEDEC param page is 512 bytes, and there are also three
redundant copies to be read. Hence this buffer should be at least
512 x 3. This commits rounds the buffer size to 2048.

This commit is taken from Linux:
'commit c16340973fcb64614' ("nand: pxa3xx: Increase initial buffer size")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoboard: turris_mox: Fixup U-Boot's device tree if PCIe connected
Marek Behún [Tue, 21 Aug 2018 10:22:09 +0000 (12:22 +0200)]
board: turris_mox: Fixup U-Boot's device tree if PCIe connected

If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agodts: mvebu: mcbin: drop redundant SD slot node
Baruch Siach [Mon, 20 Aug 2018 12:12:10 +0000 (15:12 +0300)]
dts: mvebu: mcbin: drop redundant SD slot node

Commit 61dccf73d302 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added
a redundant DT node for SD card slot. Drop it.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarch/arm/dts: Update Turris Mox device tree
Marek Behún [Fri, 17 Aug 2018 10:59:01 +0000 (12:59 +0200)]
arch/arm/dts: Update Turris Mox device tree

Remove smi_pins definition since it is already in armada-37xx.dtsi.
Add assigned-clocks definitions to spi0.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoboard: turris_mox: Enable PCI in defconfig
Marek Behún [Fri, 17 Aug 2018 10:58:55 +0000 (12:58 +0200)]
board: turris_mox: Enable PCI in defconfig

Enable the pci-aardvark driver in defconfig for Turris Mox and also
enable the pci command.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoboard: turris_mox: Fix watchdog macro name
Marek Behún [Fri, 17 Aug 2018 10:58:53 +0000 (12:58 +0200)]
board: turris_mox: Fix watchdog macro name

The macro name CONFIG_WDT_ARMADA_3720 is called CONFIG_WDT_ARMADA_37XX
instead. Fix this so that watchdog really is enabled in board_init.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoclk: armada-37xx-periph: Support changing clock parent and rate
Marek Behún [Fri, 17 Aug 2018 10:58:52 +0000 (12:58 +0200)]
clk: armada-37xx-periph: Support changing clock parent and rate

Add support for changing clock rate and parent clock for Armada 37xx
peripheral clocks.

Only clocks which can be disabled (.can_gate is true) can have parent
or rate changed.

This is needed so that Turris Mox can change SPI clock in device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agophy: marvell: Support changing SERDES map in board file
Marek Behún [Fri, 17 Aug 2018 10:58:51 +0000 (12:58 +0200)]
phy: marvell: Support changing SERDES map in board file

This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.

This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set differently when SFP module is connected and when Topaz Switch
module is connected.

This is a temporary solution. When the comphy driver for armada-3720
will be added to the kernel, the comphy driver in u-boot shall also be
updated and this should be done differently then.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: mach-mvebu: handle fall-back to UART boot
Chris Packham [Fri, 17 Aug 2018 08:47:42 +0000 (20:47 +1200)]
ARM: mach-mvebu: handle fall-back to UART boot

The bootROM in the Armada-38x (and similar) SoC has two modes for UART
boot. The first is when the normal boot media is blank (or otherwise
missing the kwb header). The second is when the boot sequence has been
interrupted with the magic byte sequence on the UART lines.

In the first mode the bootROM routine and error code register will
indicate that there was an error booting from the configured media in
bits 7:0. In the second mode there is no error to indicate but the boot
source is provided via bits 31:28.

Handle both situations so that kwboot can be used for both boot
strapping a blank board and for intercepting a regular boot sequence.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoRevert "arm: mvebu: fix boot from UART when in fallback mode"
Chris Packham [Fri, 17 Aug 2018 08:47:41 +0000 (20:47 +1200)]
Revert "arm: mvebu: fix boot from UART when in fallback mode"

This reverts commit e83e2b390038c9075642cb243a6292241beb8d73. This
prevents kwboot from overriding the hardware strapped boot source.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm64: mvebu: armada-8k: support environment in SD/eMMC
Baruch Siach [Tue, 14 Aug 2018 15:05:46 +0000 (18:05 +0300)]
arm64: mvebu: armada-8k: support environment in SD/eMMC

Detect the SD/eMMC boot device at run-time. Load the environment from
the boot deice, as well as save to it.

Leave the environment offset the same as in the SPI flash.

Make SD/eMMC 0 the default environment device when the boot device is
not detected.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agotools: kwboot: Make kwboot more robust on a38x
Jon Nettleton [Mon, 13 Aug 2018 15:24:38 +0000 (18:24 +0300)]
tools: kwboot: Make kwboot more robust on a38x

This patch accomplishes 2 things to make the kwboot procedure
on the a38x more reliable.

1)  We fill the tty with 1K of the magic bootparam.  This helps
with the timing of where the microcode picks up in the read of
the line to ensure we actually catch the break to go into recovery
mode

2)  Before starting the xmodem transfer we sleep for 2 seconds
and then flush the line.  This allows all the magic bootparam
to be flushed from the line and makes the xmodem transfer reliable
and removes the Bad message failures.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agodoc/git-mailrc: add Stefan Roese to the kirkwood alias
Baruch Siach [Mon, 13 Aug 2018 14:57:21 +0000 (17:57 +0300)]
doc/git-mailrc: add Stefan Roese to the kirkwood alias

Stefan is listed as a kirkwood maintainer since commit f822d8578ba3
(MAINTAINERS: Update Marvell custodianship).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoKirkwood: NAS220: remove bootdelay from CONFIG_EXTRA_ENV_SETTINGS
Evgeni Dobrev [Sun, 5 Aug 2018 19:56:20 +0000 (21:56 +0200)]
Kirkwood: NAS220: remove bootdelay from CONFIG_EXTRA_ENV_SETTINGS

The default bootdelay of 3 seconds is good enough and there is no need
to duplicate it in CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Wed, 19 Sep 2018 00:42:37 +0000 (20:42 -0400)]
Merge git://git.denx.de/u-boot-dm

- MPC83xx device tree additions (CPU and RAM)
- Fix sandbox build error
- Sync bitrev with Linux
- Various ofnode/DT improvements

6 years agodm: uclass: Adding missing child_pre_probe description
Bin Meng [Fri, 7 Sep 2018 14:51:52 +0000 (07:51 -0700)]
dm: uclass: Adding missing child_pre_probe description

The comment of child_pre_probe, one of the 'struct uclass_driver'
members, is currently missing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: fix alignment of help message of "dm" command
Masahiro Yamada [Fri, 7 Sep 2018 11:31:21 +0000 (20:31 +0900)]
dm: fix alignment of help message of "dm" command

Currently, "help dm" shows as follows:

=> help dm
dm - Driver model low level access

Usage:
dm tree         Dump driver model tree ('*' = activated)
dm uclass        Dump list of instances for each uclass
dm devres        Dump list of device resources for each device

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
6 years agopico-imx7d: Add a new defconfig with PICO-Hobbit selected
Otavio Salvador [Fri, 14 Sep 2018 18:53:36 +0000 (15:53 -0300)]
pico-imx7d: Add a new defconfig with PICO-Hobbit selected

This adds a new defconfig which pre-selects the PICO-Hobbit baseboard
allowing a completely non-interactive boot process.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agopico-imx7d: Add PICO-Hobbit baseboard support
Otavio Salvador [Fri, 14 Sep 2018 18:53:35 +0000 (15:53 -0300)]
pico-imx7d: Add PICO-Hobbit baseboard support

This adds the device tree to the DFU and bootmenu environment setting.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agopico-imx7d: Fix TechNexion spelling on MAINTAINERS file
Otavio Salvador [Fri, 14 Sep 2018 18:53:34 +0000 (15:53 -0300)]
pico-imx7d: Fix TechNexion spelling on MAINTAINERS file

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agopico-imx6ul: Add a new defconfig with PICO-Pi selected
Otavio Salvador [Fri, 14 Sep 2018 18:53:33 +0000 (15:53 -0300)]
pico-imx6ul: Add a new defconfig with PICO-Pi selected

This adds a new defconfig which pre-selects the PICO-Pi baseboard
allowing a completely non-interactive boot process.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agopico-imx6ul: Add PICO-Pi baseboard support
Otavio Salvador [Fri, 14 Sep 2018 18:53:32 +0000 (15:53 -0300)]
pico-imx6ul: Add PICO-Pi baseboard support

This adds the device tree to the DFU and bootmenu environment setting.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agopico-imx6ul: Fix TechNexion spelling on MAINTAINERS file
Otavio Salvador [Fri, 14 Sep 2018 18:53:31 +0000 (15:53 -0300)]
pico-imx6ul: Fix TechNexion spelling on MAINTAINERS file

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot into master
Stefano Babic [Tue, 18 Sep 2018 14:53:34 +0000 (16:53 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot into master

Signed-off-by: Stefano Babic <sbabic@denx.de>
6 years agobinman: fix a few typos in documentation
Michael Heimpold [Wed, 22 Aug 2018 20:01:24 +0000 (22:01 +0200)]
binman: fix a few typos in documentation

This fixes four small typos in the README file.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: ofnode: test ofnode_by_prop_value()
Jens Wiklander [Mon, 20 Aug 2018 09:10:00 +0000 (11:10 +0200)]
test: ofnode: test ofnode_by_prop_value()

Test ofnode_by_prop_value()

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoofnode: add ofnode_by_prop_value()
Jens Wiklander [Mon, 20 Aug 2018 09:09:58 +0000 (11:09 +0200)]
ofnode: add ofnode_by_prop_value()

Adds ofnode_by_prop_value() to search for nodes with a given property
and value, an ofnode version of fdt_node_offset_by_prop_value().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: fix devfdt_remap_addr_index()
Cédric Le Goater [Tue, 14 Aug 2018 10:48:11 +0000 (12:48 +0200)]
dm: core: fix devfdt_remap_addr_index()

commit 30a90f56c3a2 ("dm: core: add functions to get memory-mapped I/O
addresses") introduced a devfdt_remap_addr_index() routine but it does
not make use of the index parameter.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agodm: core: Scan "/firmware" node by default
Rajan Vaja [Fri, 10 Aug 2018 08:45:34 +0000 (01:45 -0700)]
dm: core: Scan "/firmware" node by default

All Linux firmware drivers are put under "/firmware" node
and it has support to populate "/firmware" node by default.

u-boot and Linux can share same DTB. In this case, driver
probe for devices under "/firmware" will not be invoked
as "/firmware" does not have its own "compatible" property.

This patch scans "/firmware" node by default like "/clocks".

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Move "/clock" node scan into function
Rajan Vaja [Fri, 10 Aug 2018 08:45:33 +0000 (01:45 -0700)]
dm: core: Move "/clock" node scan into function

Create separate function for scanning node by path and
move "/clock" node scan code into that function.

This will be usable if scanning of more node is required.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomisc: Add MPC83xx serdes driver
Mario Six [Mon, 6 Aug 2018 08:23:46 +0000 (10:23 +0200)]
misc: Add MPC83xx serdes driver

Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agocpu: Add MPC83xx CPU driver
Mario Six [Mon, 6 Aug 2018 08:23:45 +0000 (10:23 +0200)]
cpu: Add MPC83xx CPU driver

Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agotest: Add tests for CPU uclass
Mario Six [Mon, 6 Aug 2018 08:23:44 +0000 (10:23 +0200)]
test: Add tests for CPU uclass

Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agocpu: Add cpu_probe_all method
Mario Six [Mon, 6 Aug 2018 08:23:43 +0000 (10:23 +0200)]
cpu: Add cpu_probe_all method

Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agocpu: Fix cpu.h documentation
Mario Six [Mon, 6 Aug 2018 08:23:42 +0000 (10:23 +0200)]
cpu: Fix cpu.h documentation

Documentation in cpu.h is not in kernel-doc format. Change it to comply
with it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agoboard_f: Use static print_cpuinfo if CONFIG_CPU is active
Mario Six [Mon, 6 Aug 2018 08:23:41 +0000 (10:23 +0200)]
board_f: Use static print_cpuinfo if CONFIG_CPU is active

When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.

Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoinit: Fix documentation
Mario Six [Mon, 6 Aug 2018 08:23:40 +0000 (10:23 +0200)]
init: Fix documentation

The documentation in init.h is not in kernel-doc format. Fix this.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agocommon: board_f: Sort includes
Mario Six [Mon, 6 Aug 2018 08:23:39 +0000 (10:23 +0200)]
common: board_f: Sort includes

Includes should be sorted.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agotimer: Add MPC83xx timer driver
Mario Six [Mon, 6 Aug 2018 08:23:38 +0000 (10:23 +0200)]
timer: Add MPC83xx timer driver

Add a timer driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agotimer: Sort Makefile entries
Mario Six [Mon, 6 Aug 2018 08:23:37 +0000 (10:23 +0200)]
timer: Sort Makefile entries

Makefile entries should be sorted.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agoclk: Add MPC83xx clock driver
Mario Six [Mon, 6 Aug 2018 08:23:36 +0000 (10:23 +0200)]
clk: Add MPC83xx clock driver

Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agompc83xx: Add sysreset driver
Mario Six [Mon, 6 Aug 2018 08:23:35 +0000 (10:23 +0200)]
mpc83xx: Add sysreset driver

Add a sysreset driver for the MPC83xx platform.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agoboard_f: Add reset status printing
Mario Six [Mon, 6 Aug 2018 08:23:34 +0000 (10:23 +0200)]
board_f: Add reset status printing

To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agotest: Add tests for sysreset_get_status
Mario Six [Mon, 6 Aug 2018 08:23:33 +0000 (10:23 +0200)]
test: Add tests for sysreset_get_status

Add some tests for sysreset_get_status.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agosysreset: Add get_status method
Mario Six [Mon, 6 Aug 2018 08:23:32 +0000 (10:23 +0200)]
sysreset: Add get_status method

It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).

As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agopowerpc: Add read*_*/write*_* macros
Mario Six [Mon, 6 Aug 2018 08:23:31 +0000 (10:23 +0200)]
powerpc: Add read*_*/write*_* macros

Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agoram: Add driver for MPC83xx
Mario Six [Mon, 6 Aug 2018 08:23:30 +0000 (10:23 +0200)]
ram: Add driver for MPC83xx

Add a RAM driver for the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
6 years agosandbox: Enable bitrev library build
Bin Meng [Fri, 3 Aug 2018 06:58:03 +0000 (23:58 -0700)]
sandbox: Enable bitrev library build

Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agolib: bitrev: Sync with Linux kernel v4.17
Bin Meng [Fri, 3 Aug 2018 06:58:02 +0000 (23:58 -0700)]
lib: bitrev: Sync with Linux kernel v4.17

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Build with -fPIC
Andy Shevchenko [Mon, 3 Sep 2018 09:08:10 +0000 (12:08 +0300)]
sandbox: Build with -fPIC

Sandbox is not a real bootloader and it does require
a position independent code to be supported.

Thus, build it with -fPIC explicitly.

Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 17 Sep 2018 12:04:25 +0000 (08:04 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agox86: cpu: add docstring to scu_ipc_command()
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:10 +0000 (13:31 +0300)]
x86: cpu: add docstring to scu_ipc_command()

These comments were copied from the Linux kernel driver in
drivers/platform/x86/intel_scu_ipc.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: tangier: acpi: add I2C6 node
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:09 +0000 (13:31 +0300)]
x86: tangier: acpi: add I2C6 node

Now that we have I2C#6 working, it's time to add a corresponsing
ACPI binding.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>