Stefan Agner [Fri, 8 May 2015 17:07:10 +0000 (19:07 +0200)]
mtd: vf610_nfc: use in-band bad block table
Use in-band bad block table (NAND_BBT_NO_OOB) which allows to
use the full OOB for hardare ECC purposes. Since there is no
ECC correction on the OOB it is also safer to use in-band area
to store the bad block table marker.
Stefan Agner [Fri, 8 May 2015 17:07:09 +0000 (19:07 +0200)]
mtd: vf610_nfc: implement OOB only read
Implement read of OOB area only. When using column and sector size
properties, only parts of the page can be read. However, this works
only when hardware ECC is disabled, otherwise the ECC engine would
ruin the data in the buffer. To allow OOB only reads, three points
had to be addressed:
- Set ECC mode per command.
- Handle NAND_CMD_READOOB seperate. Make sure column and sector
size is correctly set up, while disabling ECC.
- Now, the OOB data end up at the beginning of the buffer. Remove
the special handling of OOB (spareonly).
Especially bad block scans benefit from this change. On a 512MiB
SLC NAND device, the bad block scan took 1.5s less than before.
Stefan Agner [Fri, 8 May 2015 17:07:07 +0000 (19:07 +0200)]
mtd: vf610_nfc: remove read on SEQIN
Since we do not support sub-page writes anyway, reading the page
back to the controller on SEQIN command is not required. Remove
the page read on SEQIN.
However, the column/page values relevant to the SEQIN command, hence
set the column/row address on SEQIN command.
Stefan Agner [Fri, 8 May 2015 17:07:06 +0000 (19:07 +0200)]
mtd: vf610_nfc: remove caching of page in buffer
To improve performance we remember the current page in the buffer
and avoid reading it twice. This implicit page cache increases
complexity while does not increase performance in real world cases.
This patch removes that feature.
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
Stephen Warren [Tue, 14 Apr 2015 14:59:00 +0000 (08:59 -0600)]
nand: fix buffer alignment in new verification feature
On systems with caches enabled, NAND I/O may need to flush/invalidate
the cache during read/write operations. For this to work correctly, all
buffers must be cache-aligned. Fix nand_verify*() to allocate aligned
buffers.
This prevents cache alignment warnings from being spewed when using
U-Boot to write an updated version of itself to flash on NVIDIA Tegra
Seaboard (after perturbation of stack/data layout in current
u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed
nand_verify_page_oob(); testing of that would be useful.
Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Fixes: 59b5a2ad83df ("nand: Add verification functions") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <scottwood@freescale.com>
Joe Hershberger [Mon, 4 May 2015 19:55:14 +0000 (14:55 -0500)]
net: Remove all references to CONFIG_ETHADDR and friends
We really don't want boards defining fixed MAC addresses in their config
so we just remove the option to set it in a fixed way. If you must have
a MAC address that was not provisioned, then use the random MAC address
functionality.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 13 May 2015 11:40:40 +0000 (13:40 +0200)]
net: phy: Add support for all targets which requires MANUAL_RELOC
Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA
relocation (mostly only GOT) where functions aray are not
updated. This patch is fixing function pointers passed to phy_register
function.
This patch was tested on Microblaze architecture.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Shengzhou Liu [Fri, 24 Apr 2015 08:57:17 +0000 (16:57 +0800)]
net/phy: refactor RTL8211F initialization
RTL8211F needs to enalbe TXDLY for RGMII during
phy initialization, so move it to rtl8211f_config
for early initialization.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Tue, 24 Mar 2015 07:41:49 +0000 (02:41 -0500)]
net: Update hardware MAC address if it changes in env
When the ethaddr changes in the env, the hardware should also be updated
so that MAC filtering will work properly without resetting U-Boot.
Also remove the manual calls to set the hwaddr that was included in a
few drivers as a result of the framework not doing it.
Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
Sunxi platforms use ARM Cortex A8, A7 and A15 (unsupported yet) CPU cores,
which all have 64 bytes cache line size.
This is required to e.g. enable USB gadget.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: VBUS detection function fixup in g_dnl_board_usb_cable_connected
sunxi_usbc_vbus_detect was renamed to sunxi_usb_phy_vbus_detect but
g_dnl_board_usb_cable_connected was still using the old name, breaking the build
when USB gadget is enabled.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Thu, 14 May 2015 16:52:54 +0000 (18:52 +0200)]
sunxi: video: Fix lvds panel support for sun6i+
We've never tested the lvds panel support on sun6i+ SoCs until now, and
unsurprisingly the lvds code needed some fixes to work on my ga10h A33
tablet with lvds panel. This makes the panel on that tablet actually work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 13 May 2015 13:00:46 +0000 (15:00 +0200)]
sunxi: Make DRAM_ODT_EN Kconfig setting a bool
Make DRAM_ODT_EN Kconfig setting a bool, add a separate DRAM_ODT_CORRECTION
setting for A23 SoCs and use DRAM_ODT_EN Kconfig everywhere instead of
only in dram_sun4i.c and hardcoding odt_en elsewhere.
Note this commit makes no functional changes for existing boards,
its purpose is to allow changing the odt_en value on future A33 boards.
For sun4i/sun5i/sun7i boards which set DRAM_ODT_EN=y (which no defconfigs
currently do) this patch turns on odt for both the DQ and the DQS lines,
whereas previously it was possibly (but not desirable) to turn odt on only
for one of them by setting the in DRAM_ODT_EN option to 1 or 2 instead of 3.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Laurent Itti [Wed, 6 May 2015 00:02:00 +0000 (17:02 -0700)]
sunxi: add support for UART2 on A23/A33
Add support for UART2 (2-pin version but note that RTS/CTS pins are available
pn that port for possible future use), can be selected in config
by using CONFIG_CONS_INDEX=3
Signed-off-by: Laurent Itti <laurentitti@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Tue, 5 May 2015 11:13:36 +0000 (13:13 +0200)]
console: Fix pre-console flushing via cfb_console being very slow
On my A10 OlinuxIno Lime I noticed a huge (5+ seconds) delay coming from
console_init_r. This turns out to be caused by the preconsole buffer flushing
to the cfb_console. The Lime only has a 16 bit memory bus and that is already
heavy used to scan out the 1920x1080 framebuffer.
The problem is that print_pre_console_buffer() was printing the buffer once
character at a time and the cfb_console code then ends up doing a cache-flush
for touched display lines for each character.
This commit fixes this by first building a 0 terminated buffer and then
printing it in one puts() call, avoiding unnecessary cache flushes.
This changes the time for the flush from 5+ seconds to not noticable.
The downside of this approach is that the pre-console buffer needs to fit
on the stack, this is not that much to ask since we are talking about plain
text here. This commit also adjusts the sunxi CONFIG_PRE_CON_BUF_SZ to
actually fit on the stack. Sunxi currently is the only user of the pre-console
code so no other boards need to be adjusted.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tim Harvey [Thu, 14 May 2015 13:22:07 +0000 (06:22 -0700)]
imx: ventana: use stack relocation
Certain features we desire require a larger stack than is available by using
iRAM (most notably for us, env_mmc). Relocate the stack to DRAM so that
we can use these features.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tim Harvey [Sat, 9 May 2015 01:28:37 +0000 (18:28 -0700)]
imx: ventana: detect pmic using i2c probe instead of board model
Avoid requiring board-model and probe pmic by its i2c address.
This is in preparation for being able to call pmic_setup() from SPL
and not need board type.
Tim Harvey [Sat, 9 May 2015 01:28:35 +0000 (18:28 -0700)]
imx: ventana: split out common functions between SPL and uboot
Move shared functions used by both SPL and U-Boot to common.c:
- setup_iomux_uart() and uart pad config
- gpio pad config
In the process also moved the following to common.c in preparation for
calling it from the SPL:
- split i2c setup into a shared function
- move pmic init to setup_pmic() function to call directly from
power_init_board()
- split gpio setup into early (iomux and default pin config)
and late (output configuration based on env)
Tim Harvey [Sat, 9 May 2015 01:28:34 +0000 (18:28 -0700)]
imx: ventana: default msata/pci mux to pci before PCI enumeration
PCI enumeration occurs early, before we fully configure our GPIO's. Make
sure we steer the MSATA/PCI mux to PCI in board_init to ensure PCI is
selected before enumeration.
Fabio Estevam [Wed, 11 Mar 2015 20:12:12 +0000 (17:12 -0300)]
mx6: Set shared override bit in PL310 AUX_CTRL register
Having bit 22 cleared in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.
Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.
This was inspired by a patch from Catalin Marinas [1] and also from recent
discussions in the linux-arm-kernel list [2] where Russell King and Rob Herring
suggested that bootloaders should initialize the cache.
Soeren Moch [Tue, 5 May 2015 21:09:19 +0000 (23:09 +0200)]
tbs2910: only enable vga output for stdout/stderr when hdmi detected
Only enable graphical output for stdout/stderr (and a usb keyboard for stdin)
when a hdmi device is detected.
Serial console is always enabled for stdin/stdout/stderr.
Stefan Roese [Thu, 12 Mar 2015 12:34:30 +0000 (13:34 +0100)]
arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
By making the tqma6_iomuxc_spi() weak, this patch adds the possibility to
add a different function for this SPI configuration. This can be used
by other baseboards, that might have a different SPI setup.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Fabio Estevam [Mon, 4 May 2015 14:22:56 +0000 (11:22 -0300)]
mx6cuboxi: Pull down PAD_ENET_RXD0/RXD1
Configure PAD_ENET_RXD0/RXD1 pads as pull down because these pads are directly
connected to the Atheros 8035/8030 although they should be functional
only in the RMII mode - 8030.
Fabio Estevam [Mon, 4 May 2015 14:22:55 +0000 (11:22 -0300)]
mx6cuboxi: Fix Ethernet PHY detection problem
mx6cuboxi sometimes fails to recognize the Ethernet PHY:
Net: Phy 0 not found
The explanation for this behavior comes from from Rabeeh Khoury:
"The LED_ACT pin on the carrier-one boards had a pull down that
forces the phy address to 0x0; where on CuBox-i and the production
HummingBoard that pin is connected directly to LED that depending
on the pull down strength of the LED it might be sampled as '0' or '1' thus
the phy address might appear as either address 0x0 or 0x4."
"This is AR8035 implementation; in reset stage the LED pin is configured as
input, and pull up/down does matter. In this case it configures the PHY
address.
After reset is deasserted the same LED pin becomes output and then
according to the previous pull/up it should be active high/low"
One way to properly fix this behavior is to place external pull-up/down
resistors in the LED line, but from a software standpoint we can fix it
by telling phy_find_by_mask() to scan the PHY at addresses
0x0 and 0x4.
It is necessary to modify the configuration file for the target
board. It wasn't well documented that to enable any of the secure
boot modes, it is required to add CONFIG_SECURE_BOOT to the board
configuration file.
Nikolay Dimitrov [Wed, 22 Apr 2015 15:37:31 +0000 (18:37 +0300)]
arm: mx6: Clamp MMDC and DDR3 clocks for timing calculations
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible values for mem_speed (1333, 1600 MT/s) for
calculating the DDR timings, and uses fixed clock (528 or 400 MHz) which
doesn't take into account DDR3 memory limitations.
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
sandbox: dts: add sandbox_pmic.dtsi and include it to sandbox.dts and test.dts
This commit adds dtsi file for Sandbox PMIC.
It fully describes the PMIC by:
- i2c emul node - with a default settings of 16 registers
- 2x buck regulator nodes
- 2x ldo regulator nodes
The default register settings are set with preprocessor macros:
- VAL2REG(min[uV/uA], step[uV/uA], val[uV/uA])
- VAL2OMREG(mode id)
Both defined in file:
- include/dt-bindings/pmic/sandbox_pmic.h
The Voltage ranges of each regulator can be found in:
- include/power/sandbox_pmic.h
The new file is included into:
- sandbox.dts
- test.dts
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
test: dm: test.dts - move to sandbox dts directory
The file test.dts from driver model test directory,
was compiled by call dtc in script: test/dm/test-dm.sh.
This doesn't allow for including of dtsi files and using
of C preprocessor routines in this dts file.
Since the mentioned script builds U-Boot before tests,
then moving the test.dts file into sandbox dts directory
is reasonable.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
This change adds new file to sandbox driver model test environment.
The file is: test/dm/power.c, and it includes tests for PMIC framework,
which includes PMIC uclass and REGULATOR uclass.
All tests are based od Sandbox PMIC emulated device. Some test constants for
this device are defined in the header: include/power/sandbox_pmic.h
PMIC tests includes:
- pmic get - tests, that pmic_get() returns the requested device
- pmic I/O - tests I/O by writing and reading some values to PMIC's registers
and then compares, that the write/read values are equal.
The regulator tests includes:
- Regulator get by devname/platname
- Voltage set/get
- Current set/get
- Enable set/get
- Mode set/get
- Autoset
- List autoset
For the regulator 'get' test, the returned device pointers are compared,
and their names are also compared to the requested one.
Every other test, first sets the given attribute and next try to get it.
The test pass, when the set/get values are equal.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
Each, with adjustable output:
- Enable state
- Voltage
- Current limit (LDO1/BUCK1 only)
- Operation mode (different for BUCK and LDO)
Each attribute has it's own register, beside the enable state, which depends
on operation mode.
The header file: sandbox_pmic.h includes PMIC's default register values,
which are set on i2c pmic emul driver's probe() method.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
sandbox: i2c: search child emul dev and check its uclass id
The function get_emul() in sandbox i2c bus driver, always returns
first child as i2c emul device. This may only work for i2c devices
with a single child, which is an only i2c emul device.
In case when i2c device has more than one child (e.g. PMIC), and
one is i2c emul, then the function should search it by check uclass
id for each child. This patch add this change to the get_emul().
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
This commit cleanups the PMIC framework documentation.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
This commit cleanups the regulator command.
The first change, is adjusting "regulator dev" command to use
"regulator-name" constraint, for setting the operating device.
Thanks to this, the regulator_get() function is removed.
This also updates do_list() function, with loop over uclass_find_*
function calls, to prevent probe of all listed regulators.
This also cleanups the printing in command.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
This commit cleanups the use of function: failed().
The new function name is: failure(), and it is used
for print errno and the errno-related message only.
The second change is choosing PMIC device by it's name,
instead of seq number. Thanks to this change, for set
the current device, call of pmic_get() is enough.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
This cleanup includes:
- remove of the preprocessor macros which pointed to long name functions
- update of the names of some regulator uclass driver functions
- cleanup of the function regulator_autoset()
- reword of some comments of regulator uclass header file
- regulator_get_by_platname: check error for uclass_find_* function calls
- add function: regulator_name_is_unique
- regulator post_bind(): check regulator name uniqueness
- fix mistakes in: regulator/Kconfig
- regulator.h: update comments
- odroid u3: cleanup the regulator calls
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
The cleanup includes:
- pmic.h - fix mistakes in a few comments
- pmic operations: value 'reg_count' - redefine as function call
- fix function name: pmic_bind_childs() -> pmic_bind_children()
- pmic_bind_children: change the 'while' loop with the 'for'
- add implementation of pmic_reg_count() method
- pmic_bind_children() - update function call name
- Kconfig: add new line at the end of file
- Update MAX77686 driver code
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Tested on sandbox: Tested-by: Simon Glass <sjg@chromium.org>
odroid: enable driver model pmic/regulator API and MAX77686 drivers
This change enables the configs required to init and setup max77686
regulator driver, using the new driver model pmic and regulator API.
And also changes the old pmic framework calls to the new ones.
odroid: dts: add 'voltage-regulators' description to max77686 node
Adding regulators subnode to fdt max77686 node, allows properly init
regulators by the max77686 regulator driver. This enables the complete
functionality of the regulator command.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
This driver implements regulator operations for fixed Voltage/Current
value regulators. beside the standard regulator constraints, which are
put into the uclass platform data, a typical fixed regulator node provides
few additional properties like:
- gpio
- gpio-open-drain
- enable-active-high
- startup-delay-us
The only 'gpio' is used by this driver and is kept in structure of type
'fixed_regulator_platdata', as a device platform data (dev->platdata).
This commit adds support to MAX77686 regulator driver,
based on a driver model regulator's API. It implements
almost all regulator operations, beside those for setting
and geting the Current value.
For proper bind and operation it requires the MAX77686 PMIC driver.
New file: drivers/power/regulator/max77686.c
New config: CONFIG_DM_REGULATOR_MAX77686
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
This is the implementation of driver model PMIC driver.
The max77686 PMIC driver implements read/write operations and driver
bind method - to bind its childs.
This driver will try to bind the regulator devices by using it's child
info array with regulator prefixes and driver names. This should succeed
when compatible regulator driver is compiled. If no regulator driver found,
then the pmic can still provide read/write operations, and can be used with
PMIC function calls.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
This command is based on driver model regulator's API.
The user interface provides:
- list UCLASS regulator devices
- show or [set] operating regulator device
- print constraints info
- print operating status
- print/[set] voltage value [uV] (force)
- print/[set] current value [uA]
- print/[set] operating mode id
- enable the regulator output
- disable the regulator output
The 'force' option can be used for setting the value which exceeds
the constraints min/max limits.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
This is new command for the PMIC devices based on driver model PMIC API.
Command features are unchanged:
- list UCLASS pmic devices
- show or [set] operating pmic device (NEW)
- dump registers
- read byte of register at address
- write byte to register at address
The only one change for this command is 'dev' subcommand.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
dm: regulator: add implementation of driver model regulator uclass
This commit introduces the implementation of dm regulator API.
Device tree support allows for auto binding. And by the basic
uclass operations, it allows to driving the devices in a common
way. For detailed informations, please look into the header file.
Core files:
- drivers/power/regulator-uclass.c - provides regulator common functions api
- include/power/regulator.h - define all structures required by the regulator
Changes:
- new uclass-id: UCLASS_REGULATOR
- new config: CONFIG_DM_REGULATOR
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
dm: pmic: add implementation of driver model pmic uclass
This commit introduces the PMIC uclass implementation.
It allows providing the basic I/O interface for PMIC devices.
For the multi-function PMIC devices, this can be used as I/O
parent device, for each IC's interface. Then, each PMIC particular
function can be provided by the child device's operations, and the
child devices will use its parent for read/write by the common API.
Move the configs listed below from exynos5-dt-common.h to exynos5-common.h:
- CONFIG_POWER
- CONFIG_POWER_I2C
fixes build break for Arndale and Smdk5250 boards.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
Peng Fan [Thu, 14 May 2015 23:29:12 +0000 (07:29 +0800)]
i2c: mxc: refactor i2c driver and support dm
1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
used for non-DM and DM.
2. Remove `struct mxc_i2c_regs` structure, but use register offset to access
registers based on `base` entry of `struct mxc_i2c_bus`.
3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform
flags. A new flag is introduced, I2C_QUIRK_FLAG.
4. Most functions use `struct mxc_i2c_bus` as one of the parameters.
Make most functions common to DM and non-DM, try to avoid duplicated code.
5. Support DM, but pinctrl is not included. Pinmux setting is still set
by setup_i2c, but we do not need bus_i2c_init for DM.
6. struct i2c_parms and struct sram_data are removed.
7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist
paramter of bus_i2c_init is modified to i2c index. Add new prototype
i2c_idle_bus and force_bus_idle. Since bus_i2c_init is not good for
DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus.
Board file take the responsibility to implement this function, like this:
"
int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
{
if (i2c_bus->index == 0)
force_bus_idle(i2c_pads_info0);
else if (i2c_bus->index == 1)
force_bus_idle(i2c_pads_info1);
else
xxxxxx
}
"
8. Introduce a weak function, enable_i2c_clk
9. Tested on an i.MX7 platform. Log info:
=> dm tree
Class Probed Name
----------------------------------------
root [ + ] root_driver
simple_bus [ ] |-- soc
simple_bus [ ] | |-- aips-bus@30000000
simple_bus [ ] | | |-- anatop@30360000
simple_bus [ ] | | `-- snvs@30370000
simple_bus [ ] | |-- aips-bus@30400000
simple_bus [ ] | `-- aips-bus@30800000
i2c [ ] | |-- i2c@30a20000
i2c [ ] | `-- i2c@30a40000
simple_bus [ ] `-- regulators
=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses: 08 50
=> i2c md 8 31
0031: 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
Peng Fan [Thu, 14 May 2015 23:29:13 +0000 (07:29 +0800)]
imx: mx27 move GPIO_PORTx to gpio.h
These GPIO_PORTx macros should be in gpio.h, but not in imx-regs.h.
Also, imx-regs.h and iomux-v3.h has same macro defintion for
GPIO_PORTx, and both of them are included in mxc_i2c.c(include
mxc_i2c.h). This will incur build warnings with macro redefinition.
Since iomux-v3.h is not compatible with mx27, we can not simply
include iomux-v3.h for mx27, so move the GPIO_PORTx to gpio.h to
fix the build warning.
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