Bill Cook [Wed, 25 May 2011 19:51:07 +0000 (15:51 -0400)]
MPC83XX: Fix PCI express clock setup
On a 8308 based board it was found that the PEX_GLK_RATIO register
(programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This
was tracked to the fact that the pci express clock frequency was not being
assigned to the pciexp1_clk entry in the global data structure in file
arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in
'do_clocks' command.
Signed-off-by: Bill Cook <cook@isgchips.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Andre Schwarz [Thu, 14 Apr 2011 12:54:05 +0000 (14:54 +0200)]
MPC83xx: add config options for memory setup.
CPO value and driver strength settings are board specifc.
Also allow SPD data fetch from any accessible I2C EEPROM.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ira W. Snyder [Tue, 1 Mar 2011 22:40:55 +0000 (14:40 -0800)]
fsl_dma: fix support for 83xx DMA engine
Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the
Freescale DMA engine on the 83xx parts. This is due to using registers
which do not exist on 83xx. Remove the attribute register accesses from
the 83xx build.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Simon Guinot [Fri, 17 Jun 2011 14:11:33 +0000 (19:41 +0530)]
Add support for Network Space v2 and parents
This patch add support for the Network Space v2 board and parents, based
on the Marvell Kirkwood 6281 SoC. This include Network Space (Max) v2
and Internet Space v2.
Additional information is available at:
http://lacie-nas.org/doku.php?id=network_space_v2
This adds support for the keymile Kirkwood BEC portl2 board. This board
relies on the km_arm (km_kirkwood) BEC.
The egiga driver is configured for a 100M full-duplex, A/N off connnection
to the backplane. This board has always ethernet present, because it is
connected to the marvell switch similar to mgcoge3un. The reset_phy
functionality is also the same to mgcoge3un.
Holger Brunck [Thu, 16 Jun 2011 12:41:15 +0000 (18:11 +0530)]
arm/km: replace suenx targets with km_kirkwood
suen3 and suen8 were in first HW version quite different, but
now they are from a u-boot point of view similar. So these
two boards can use the same header file. Other keymile boards
differ only in the usage of the PCI interface. Therefore
a target km_kirkwood_pci was introduced. All targets use
the same header file.
arm/km: use board KM_ENV_BUS for CONFIG_I2C_ENV_EEPROM_BUS
This is defined for all km_kirkwood boards and was not used up to now.
This value was the same for all boards but it could be changed for some
boards (and thus needs to be defined for every board).
Holger Brunck [Thu, 16 Jun 2011 12:41:15 +0000 (18:11 +0530)]
arm/km: fix u-boot.kwb build breakage
commit 010a958b
(arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h)
breaks building keymile arm targets, when u-boot.kwb tries to
generate the binary with mkimage. A simple make <board> or MAKEALL
succeeded because it don't try to build the kirwood binary at the end.
Due this commit we use the CONFIG_SYS_KWD_CONFIG from the
arch-kirkwood/config.h and it was removed from the board config.
But it was forgotten to include the header. Now the header is included
in km_arm.h. Some other defines were obsolete due to this include,
these are also removed in this commit.
Holger Brunck [Thu, 16 Jun 2011 12:41:15 +0000 (18:11 +0530)]
arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSI
Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on
but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI
on in this case.
John Rigby [Mon, 27 Dec 2010 14:33:10 +0000 (14:33 +0000)]
OMAP[34]: fix broken timer
As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff. This value is not only wrong but
illegal according to the reference manual.
One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command. The sleep will hang
forever.
The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.
Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.
Signed-off-by: John Rigby <john.rigby@linaro.org> Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Aneesh V [Thu, 16 Jun 2011 23:30:50 +0000 (23:30 +0000)]
arm: minor fixes for cache and mmu handling
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
than a range flush on the entire memory(flush_cache())
Provide a default implementation for flush_dcache_all()
for backward compatibility and to avoid build issues.
Aneesh V [Thu, 16 Jun 2011 23:30:49 +0000 (23:30 +0000)]
armv7: integrate cache maintenance support
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
- Make changes according to the new framework
Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
* Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
* Changed all three flags to the final names suggested as above
and accordingly changed the commit message
Aneesh V [Thu, 16 Jun 2011 23:30:47 +0000 (23:30 +0000)]
armv7: cache maintenance operations for armv7
- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU
- Add generic ARMv7 cache maintenance operations that affect all
caches known to ARMv7 CPUs. For instance in Cortex-A8 these
opertions will affect both L1 and L2 caches. In Cortex-A9
these will affect only L1 cache
Alex Waterman [Thu, 19 May 2011 19:08:36 +0000 (15:08 -0400)]
NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:
CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a
16 bit device is attached.
CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus
Controller configuration register.
Also, a new ndfc_read_byte() function was added which does not
first convert the data to little endian.
The NAND SPL was also modified to do 16bit bad block testing
when a 16 bit chip is being used.
Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Ben Gardiner [Tue, 14 Jun 2011 20:35:07 +0000 (16:35 -0400)]
cmd_nand: add nand write.trimffs command
Add another nand write. variant, trimffs. This command will request of
nand_write_skip_bad() that all trailing all-0xff pages will be
dropped from eraseblocks when they are written to flash as-per the
reccommended behaviour of the UBI FAQ [1].
The function that implements this timming is the drop_ffs() function
by Artem Bityutskiy, ported from the mtd-utils tree.
Ben Gardiner [Tue, 14 Jun 2011 20:35:05 +0000 (16:35 -0400)]
nand_util: treat WITH_YAFFS_OOB as a mode
When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an
operation which is mutually exclusive with the 'usual' way of writing.
Add a check that client code does not specify WITH_YAFFS_OOB along with any
other flags and add a comment indicating that the WITH_YAFFS_OOB flag should
not be mixed with other flags.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Ben Gardiner [Tue, 24 May 2011 14:18:35 +0000 (10:18 -0400)]
nand_util: convert nand_write_skip_bad() to flags
In a future commit the behaviour of nand_write_skip_bad()
will be further extended.
Convert the only flag currently passed to the nand_write_
skip_bad() function to a bitfield of only one allocated
member. This should avoid an explosion of int's at the
end of the parameter list or the ambiguous calls like
Mike Frysinger [Mon, 9 May 2011 22:33:36 +0000 (18:33 -0400)]
cfi_flash: reverse geometry for newer STM parts
For newer STM parts where CFI >= 1.1, there is a byte in the extended
structure that declares the flash layout type (just like the AMD parts),
so key off of that to find out when we need to reverse the geometry.
This can be seen with M29W640 parts where U-Boot does:
Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors
AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED
Erase timeout: 8192 ms, write timeout: 1 ms
Buffer write timeout: 1 ms, buffer size: 16 bytes
But Linux does:
physmap platform flash device: 00800000 at 20000000
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank.
Manufacturer ID 0x000020 Chip ID 0x0022ed
physmap-flash.0: Swapping erase regions for top-boot CFI table.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
Cliff Cai [Thu, 21 Apr 2011 16:42:10 +0000 (12:42 -0400)]
musb: process control messages after roothub accepted it
When dealing with non-multipoint devices, if the software root hub code
accepted the message, then we still need to process it normally. So only
return quickly when the root hub skipped the message or is otherwise in
an error state.
Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Thu, 23 Jun 2011 13:37:33 +0000 (15:37 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
run arm_pci_init after relocation
IXP42x PCI rewrite
update/fix PDNB3 board
update/fix IXDP425 / IXDPG425 boards
add dvlhost (dLAN 200 AV Wireless G) board
IXP NPE: add support for fixed-speed MII ports
update/fix AcTux4 board
update/fix AcTux3 board
update/fix AcTux2 board
update/fix AcTux1 board
use -ffunction-sections / --gc-sections on IXP42x
support CONFIG_SYS_LDSCRIPT on ARM
fix "depend" target in npe directory
Fix IXP code to work after relocation was added
trigger hardware watchdog in IXP42x serial driver
add support for IXP42x Rev. B1 and newer
add XScale sub architecture (IXP/PXA) to maintainer list
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead. Move board-specific PCI
setup code (clock/reset) to board directory.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Mike Frysinger [Sun, 19 Jun 2011 08:27:39 +0000 (08:27 +0000)]
tools: make it possible to build tools unconfigured
On Sunday, June 19, 2011 13:55:13 Ilya Yanok wrote:
> On 18.06.2011 23:03, Mike Frysinger wrote:
> >> - tools/Makefile put common/env_embedded.o and envcrc.o to object list
> >>
> >> conditionally. This fixes errors during dependency generation.
> >
> > pretty sure this breaks board builds. if the only thing this fixes is a
>
> I'm sorry but I can't see how this can break the builds. Could you
> please be more specific? I've tried to build some boards, it actually
> works...
i might be thinking of a different env_embedded situation. a different
problem with your patch to tools/Makefile: you copied the same logic multiple
times which means more bitrot.
why dont you do something like:
> > harmless warning when generating dependency files, then i say ignore it.
> > after all, this is how it has always worked in the past and no one really
> > cared.
>
> Yep, they are harmless but they are not warnings but rather scary errors
> actually. ;) I think it's better to fix them.
i guess my threshold for being scared is a bit higher :p
-mike
Ilya Yanok [Mon, 20 Jun 2011 12:45:38 +0000 (12:45 +0000)]
Makefile: move $(VERSION_FILE) rule out of ifeq configured
mkimage relies on autogenerated version so we need to move
$(VERSION_FILE) rule out of ifeq and make tools rule depend on it to be
able to run 'make tools' from the unconfigured tree.
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
Ilya Yanok [Mon, 20 Jun 2011 12:45:37 +0000 (12:45 +0000)]
config.mk: move LDSCRIPT processing to the top-level Makefile
LDSCRIPT is used only from the top-level Makefile and only when the
system is configured so we can move LDSCRIPT and CONFIG_SYS_LDSCRIPT
related logic into the top level Makefile and under configured condition
to avoid errors when building tools from unconfigured tree.
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
---8<---
at91_emac.c: In function 'at91emac_write_hwaddr':
at91_emac.c:487:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
Reinhard Meyer [Mon, 6 Jun 2011 00:05:56 +0000 (00:05 +0000)]
ATMEL spi_dataflash driver - fix to build again
The rework effort for ATMEL (AT91/AVR32) accidentially broke build of
this driver. Fix this to make it build again. However this driver should
be reworked as soon as possible!
Jens Scharsig [Sat, 19 Feb 2011 06:17:02 +0000 (06:17 +0000)]
update arm/at91rm9200 work with rework rework110202
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
* Fix: timer.c compile error io.h not found with arm/at91rm9200
* update arm920t/at91 to ATMEL_xxx name scheme
* update arm920t/at91 soc lib
* update at91_emac driver
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
projects / u-boot.git / log