Jacky Bai [Thu, 8 Aug 2019 09:59:11 +0000 (09:59 +0000)]
ddr: imx8m: Fix the ddr init hang on imx8mq
On, i.MX8MQ, the PLL config must be done when ddrmix
isolation is released. So move the dram pll init after
iso config done. For other i.MX8M SOC, either init pll
before or after isolation is ok.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Bai Ping [Thu, 8 Aug 2019 09:59:05 +0000 (09:59 +0000)]
imx8mq: Update the ddrc QoS setting for B1 chip
Update the ddrc Qos setting for B1 to align with B0's setting.
Correct the initial clock for dram_pll. This setting will be
overwrite before ddr phy training. Although there is no impact
on the dram init, we still need to correct it to eliminate
confusion.
Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Tested-by: Robby Cai <robby.cai@nxp.com>
Ye Li [Wed, 14 Aug 2019 11:31:31 +0000 (11:31 +0000)]
spi: fsl_qspi: Update write data size for page program LUT
The write data size can be overwritten by writing to the IDATSZ
field of IPCR register. Since the driver always updates the IDATSZ
in page program operation. Set the LUT data size to 0 to align
the codes with iMX.
Ye Li [Wed, 14 Aug 2019 11:31:27 +0000 (11:31 +0000)]
spi: fsl_qspi: Fix DDR mode setting for latest iMX platforms
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller
is updated to have TDH field in FLSHCR register. According to reference
manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX
DDR delay logic won't be enabled.
Another issue in DDR mode is the MCR register will be overwritten in
every read/write/erase operation. This causes DDR_EN been cleared while
TDH=1, then no clk2x output for TX data shift and all operations will
fail.
Peng Fan [Mon, 23 Sep 2019 02:18:48 +0000 (10:18 +0800)]
spl: nor: support loading i.MX container format file
i.MX8 only support AHAB secure boot with Container format image,
we could not use FIT to support secure boot, so introduce container
support to let SPL could load container images.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 23 Sep 2019 02:18:47 +0000 (10:18 +0800)]
spl: spi: support loading i.MX container format file
i.MX8 only support AHAB secure boot with Container format image,
we could not use FIT to support secure boot, so introduce container
support to let SPL could load container images.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 23 Sep 2019 02:18:46 +0000 (10:18 +0800)]
spl: nand: support loading i.MX container format file
i.MX8 only support AHAB secure boot with Container format image,
we could not use FIT to support secure boot, so introduce container
support to let SPL could load container images.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 23 Sep 2019 02:18:44 +0000 (10:18 +0800)]
imx8: Add support to get container image set size
To avoid hardcoded offset when adding u-boot.cnt to flash.bin, we use
flexible offset which is calculated based on the size of the container
image generated int the first stage. And pad u-boot.cnt at 1KB
alignment.
So add code to get the offset when SPL loading u-boot.cnt.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 23 Sep 2019 02:18:43 +0000 (10:18 +0800)]
spl: nand: Introduce spl_nand_get_uboot_raw_page
Introduce weak spl_nand_get_uboot_raw_page, then platform could
have their own implementation.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
Peng Fan [Mon, 23 Sep 2019 02:18:42 +0000 (10:18 +0800)]
spl: nor: introduce spl_nor_get_uboot_base
Introduce weak spl_nor_get_uboot_base, then platform have their own
implementation.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
Peng Fan [Mon, 23 Sep 2019 02:18:41 +0000 (10:18 +0800)]
spl: spi: introduce spl_spi_get_uboot_offs
Introduce a weak function spl_spi_get_uboot_offs, then
platform could have their own implementation.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
Peng Fan [Mon, 23 Sep 2019 02:18:40 +0000 (10:18 +0800)]
spl: mmc: introduce spl_mmc_get_uboot_raw_sector
Introduce a weak function spl_mmc_get_uboot_raw_sector, then platform
could have their own implementation.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
Peng Fan [Tue, 27 Aug 2019 06:26:04 +0000 (06:26 +0000)]
arm: dts: add i.MX8MM pin func
Import i.MX8MM pin func from Linux Kernel,
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Peng Fan [Tue, 27 Aug 2019 06:26:01 +0000 (06:26 +0000)]
arm: dts: import i.MX8MM dtsi
Import i.MX8MM dtsi from Linux Kernel,
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Peng Fan [Tue, 27 Aug 2019 06:25:51 +0000 (06:25 +0000)]
imx8m: add clk support for i.MX8MM
Introduce clk implementation for i.MX8MM, including pll configuration,
ccm configuration. Mostly will be done clk dm driver,
but such as DRAM part, we still use non clk dm driver, because we
have limited sram.
Ye Li [Tue, 27 Aug 2019 06:25:34 +0000 (06:25 +0000)]
imx8m: Configure trustzone region 0 for non-secure access
Set trustzone region 0 to allow both non-secure and secure access
when trust zone is enabled. We found USB controller fails to access
DDR if the default region 0 is secure access only.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 27 Aug 2019 06:25:27 +0000 (06:25 +0000)]
imx8m: Fix MMU table issue for OPTEE memory
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
various memory issue in u-boot.
The fail address register and int_status register in trustzone has logged
that speculative access from u-boot.
Peng Fan [Tue, 27 Aug 2019 06:24:47 +0000 (06:24 +0000)]
ddr: imx8m: fix ddr firmware location when enable SPL OF
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 4 bytes to ease copy firmware.
Peng Fan [Tue, 27 Aug 2019 06:24:43 +0000 (06:24 +0000)]
tools: imx8m_image: align spl bin image size
The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses a
4-byte-aligned address to load the firmware. In cases where OF is
enabled in SPL the dtb will be appended to the SPL binary and can result
in a binary that is not aligned correctly. If OF is not enabled in SPL,
`_end` is already aligned correctly, but this patch does not hurt.
To ensure the correct alignment we use dd to create a temporary file
u-boot-spl-pad.bin with the correct padding.
Since recent splash changes common code for splashscreen logo
should be used instead of adding duplicated code under board
directories. mx6ul_9x9_evk and mx6ul_14x14_evk configurations
used old board specific logo code and do not link, fix them.
Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Peng Fan <peng.fan@nxp.com>
The default CSF_SIZE defined in Kconfig is too high and SPL cannot
fit into the OCRAM in certain cases.
The CSF cannot achieve 0x2000 length when using RSA 4K key which is
the largest key size supported by HABv4.
According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices"
it's recommended to pad CSF binary to 0x2000 and append DEK blob to
deploy encrypted boot images.
As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060
which should cover both CSF and DEK blob length.
Update default_image.c and image.c to align with this change and avoid
a U-Boot proper authentication failure in HAB closed devices:
Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x32 length=0x6131 version=0x38
bad length magic=0x32 length=0x6131 version=0x38
bad version magic=0x32 length=0x6131 version=0x38
spl: ERROR: image authentication fail
Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL targets") Reported-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Breno Lima <breno.lima@nxp.com>
Patrick Wildt [Thu, 3 Oct 2019 14:08:35 +0000 (16:08 +0200)]
imx: add support for i.MX7/i.MX8MQ reset controller
Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ. This will be needed to be able to assert the PCIe
reset pins. Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.
Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Patrick Wildt [Thu, 3 Oct 2019 13:51:50 +0000 (15:51 +0200)]
imx: add support for i.MX8MQ power domain controller
Add support for the power domain controller that's used on the
i.MX8MQ. This will be needed to be able to power on the PCIe
controller. Bindings taken from Linux, driver implementation
taken from the i.MX8 power domain controller and adjusted for
the i.MX8M SoC.
mmc: Replace printf with debug call for timeouts in the i.MX28 mxs driver
This change replaces printf() with debug() for the notification about
commands timeouts.
This is done on purpose (also other drivers use such approach - dw_mmc.c,
mvebu_mmc.c), as the mmc core code (mmc.c) uses timeouts to assess if one
is using sd card or eMMC device.
In such situation timeout is a some kind of a "normal" behavior and there
shall not be any output to the console.
There is no impact on boot time for boards using this driver (even in SPL)
when two extra timeouts are returned (no SD card present, only eMMC
available).
Boot time tested with grabserial:
sudo grabserial -b 115200 -d /dev/ttyUSB1 -e 30 -t -m "^U-Boot SPL*"
spi: fix: Call mxs_reset_block() during DM/DTS probe
Without this change the DM/DTS version of mxs_spi driver doesn't reset the
SPI IP block in probe.
As a result this driver (when used solely on U-Boot proper) relies on reset
performed by mxs spi driver in SPL.
In the use case where eMMC is used in SPL as a boot primary device, the
mxs_reset_block() is not called at all and DM/DTS aware SPI driver in
U-Boot proper is malfunctioning.
dts: imx28: Remove #include "imx28.dtsi" from imx28-u-boot.dtsi file
After this change it is possible to use imx28-<board>-u-boot.dtsi with
the imx28-u-boot.dtsi explicitly included without breaking setup from
imx28-<board>.dts file.
The problem is that the imx28.dtsi included in a wrong place overrides the
changes made in imx28-<board>.dts. As a result some devices are "disabled"
in the final DTB.
imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode
This change tries to fix the following problem:
- The board boots (to be more precise - ROM loads SPL) from a slow SPI-NOR
memory.
As a result the spl_boot_device() will return SPI-NOR as a boot device
(which is correct).
- The problem is that in 'falcon boot' the eMMC is used as a boot medium to
load kernel from its partition.
Calling spl_boot_device() will break things as it returns SPI-NOR device.
To fix this issue the new CONFIG_SPL_FORCE_MMC_BOOT Kconfig flag is
introduced to handle this special use case. By default it is not defined,
so there is no change in the legacy code flow.
ARM: Update display5_factory_defconfig after switch to DM/DTS and uuu utility
This commit updates the display5_factory_defconfig file after the switch
to DM/DTS for this board.
Moreover, the VID and PID for SPL running SDP gadget have been updated to
allow seamless work with 'uuu' utility from NXP (the imx_usb doesn't work
properly after embedding the u-boot proper into fitImage - problem with IVT
embedding in FIT).
Otavio Salvador [Wed, 19 Jun 2019 18:03:44 +0000 (15:03 -0300)]
pico-imx6: Fix bootmenu handling
We should use a common script to allow booting the U-Boot console as
fallback so we ended using a 'default_boot' and 'base_boot'
environment scripts to accomplish that.
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Default value is too high and it covers the worst case. SPL for
imx6dl_mamoj becomes too big and cannot fit into the OCRAM, but CSF size
can be reduced.
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Breno Lima <breno.lima@nxp.com>
projects / u-boot.git / log