William Wu [Wed, 9 Aug 2017 03:36:28 +0000 (11:36 +0800)]
ARM: dts: rockchip: add USB nodes for evb-rv1108
This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports.
Signed-off-by: William Wu <william.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
William Wu [Wed, 9 Aug 2017 03:36:27 +0000 (11:36 +0800)]
configs: rockchip: add USB configs for evb-rv1108 board
This patch adds USB configs to support the USB OTG port(consist
of DWC2 controller) and the USB Host port(consist of EHCI and OHCI
controllers) on evb-rv1108 board, and also support fastboot over
USB and USB mass storage.
Signed-off-by: William Wu <william.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Wed, 6 Sep 2017 01:49:46 +0000 (19:49 -0600)]
dm: x86: Allow TSC timer to be used before DM is ready
With bootstage we need access to the timer before driver model is set up.
To handle this, put the required state in global_data and provide a new
function to set up the device, separate from the driver's probe() method.
This will be used by the 'early' timer also.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 6 Sep 2017 01:49:45 +0000 (19:49 -0600)]
board_f: Drop the timer after relocation
Once U-Boot relocates itself the existing driver-model timer (if any) is
no-longer valid until the device is reinitialised. Any use of the device
may cause a crash. To handle this, set the timer to NULL after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Wed, 16 Aug 2017 05:42:02 +0000 (22:42 -0700)]
x86: Support Intel Cherry Hill board
This adds support to Intel Cherry Hill board, a board based on
Intel Braswell SoC. The following devices are validated:
- serial port as the serial console
- on-board Realtek 8169 ethernet controller
- SATA AHCI controller
- EMMC/SDHC controller
- USB 3.0 xHCI controller
- PCIe x1 slot with a graphics card
- ICH SPI controller with an 8MB Macronix SPI flash
- Integrated graphics device as the video console
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 16 Aug 2017 05:41:56 +0000 (22:41 -0700)]
x86: dm: video: Add a framebuffer driver that utilizes VBT
When a VBT is given to an FSP that supports graphics initialization,
the FSP will produce a graphics info HOB that contains all necessary
information for the linear frame buffer of the integrated graphics
device. This adds a DM video driver for it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 16 Aug 2017 05:41:53 +0000 (22:41 -0700)]
x86: Add Video BIOS Table (VBT) related Kconfig options
This adds Kconfig options for Video BIOS Table which is normally
required if you are using an Intel FSP firmware that is complaint
with spec 1.1 or later to initialize the integrated graphics device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 16 Aug 2017 05:41:52 +0000 (22:41 -0700)]
x86: fsp: Add FSP_GRAPHICS_INFO_HOB
This adds a new HOB type for graphics information introduced in FSP
spec 1.1. When graphics capability is included in FSP and enabled,
FSP produces an FSP_GRAPHICS_INFO_HOB as described in the EFI PI
specification which provides information about the graphics mode and
framebuffer.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 16 Aug 2017 05:41:51 +0000 (22:41 -0700)]
x86: fsp: Update struct common_buf for FSP spec 1.1
FSP spec 1.1 adds one more member to the struct common_buf to
determine the memory size that can be reserved by FSP below "top
of low usable memory" for bootloader usage. This new member uses
the reserved space so that it is still compatible with previous
FSP spec 1.0.
A new HOB (FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID) is also
published when common_buf.tolum_size is valid and non zero.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 16 Aug 2017 05:41:50 +0000 (22:41 -0700)]
x86: tsc: Add Airmont reference clock values
Per the Intel 64 and IA-32 Architecture Software Developer's Manual,
add the reference clock for Intel Atom Processors based on the Airmont
Microarchitecture (Braswell).
This keeps in sync with Linux kernel commit: 6fcb41c: x86/tsc_msr: Add Airmont reference clock values
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Fri, 15 Sep 2017 18:19:38 +0000 (12:19 -0600)]
test/py: gpt: make use of infra-structure
Make various changes to the GPT test:
1) Reference the disk image using an absolute path in all cases. This
allows test/py to operate correctly if it's run from a directory other
than the root of the U-Boot source tree.
2) Store the disk image in the teswt/py persistent data directory. This
removes the need to re-generate it every time the tests are run.
3) Execute sgdisk using u_boot_utils.run_and_log() so that its output is
captured in the test log. This allows debugging any problems running it.
4) Make the disk image a test fixture. This removes the requirement to
always run all GPT tests, and run them in order. The current code doesn't
create the disk image if e.g. just test_gpt_uuid() is executed via the
test.py -k command-line option.
5) Use @pytest.mark.buildconfigspec for all feature dependencies, rather
than manually implementing some of them.
6) Make all tests depend on sandbox, since they use the sandbox-specific
host command.
Fixes: a2f422555fc8 ("add pytests for 'gpt guid' command in sandbox") Fixes: c5772188ede9 ("add pytests for 'gpt rename' and 'gpt swap'") Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Tom Rini <trini@konsulko.com>
arm: dts: Add missing u-boot specific dtsi for dra7-evm
commit b63b995 (arm: dts: Add u-boot specific compatibles) separated out
u-boot specific compatibles from dts files.
The u-boot specifics were moved in *-u-boot.dtsi files for all dra7
platforms except dra7-evm.
Without it the SD card is broken on DRA7-evm because the regulator cannot
be enabled.
Fix it by adding the missing dra7-evm-u-boot.dtsi with the needed
properties.
Rob Clark [Tue, 12 Sep 2017 20:40:01 +0000 (16:40 -0400)]
fs/fat: fix fatbuf leak
A new fatbuf was allocated by get_fs_info() (called by fat_itr_root()),
but not freed, resulting in eventually running out of memory. Spotted
by running 'ls -r' in a large FAT filesystem from Shell.efi.
fatbuf is mainly used to cache FAT entry lookups (get_fatent())..
possibly once fat_write.c it can move into the iterator to simplify
this.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Łukasz Majewski <lukma@denx.de>
Rob Clark [Sat, 9 Sep 2017 17:16:00 +0000 (13:16 -0400)]
fs/fat: Clean up open-coded sector <-> cluster conversions
Use the clust_to_sect() helper that was introduced earlier, and add an
inverse sect_to_clust(), plus update the various spots that open-coded
this conversion previously.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Rob Clark [Sat, 9 Sep 2017 17:15:58 +0000 (13:15 -0400)]
fat/fs: move ls to generic implementation
Add a generic implementation of 'ls' using opendir/readdir/closedir, and
replace fat's custom implementation. Other filesystems should move to
the generic implementation after they add opendir/readdir/closedir
support.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Rob Clark [Sat, 9 Sep 2017 17:15:55 +0000 (13:15 -0400)]
fs: add fs_readdir()
Needed to support efi file protocol. The fallback.efi loader wants
to be able to read the contents of the /EFI directory to find an OS
to boot.
Modelled after POSIX opendir()/readdir()/closedir(). Unlike the other
fs APIs, this is stateful (ie. state is held in the FS_DIR "directory
stream"), to avoid re-traversing of the directory structure at each
step. The directory stream must be released with closedir() when it
is no longer needed.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 13 Sep 2017 02:00:23 +0000 (19:00 -0700)]
blk: Remove various places that do flush cache after read
All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.
The underlying drivers should be responsible for the cache operation.
Remove these codes completely.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: York Sun <york.sun@nxp.com>
fdt_getprop_u32 is not exported and it's different than what the
unit test uses. Rename u32 prop access methods to something that's
unit test specific.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
Pull some information regarding overlays from commit messages and
put them directly within the documentation. Also add some information
regarding required dtc version to properly use overlays.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
This patch enables an overlay to refer to a previous overlay's
labels by performing a merge of symbol information at application
time.
In a nutshell it allows an overlay to refer to a symbol that a previous
overlay has defined. It requires both the base and all the overlays
to be compiled with the -@ command line switch so that symbol
information is included.
Introduce fdt_overlay_apply_verbose, a method that applies an
overlay but in the case of an error produces a helpful message.
In addition if a base tree is found to be missing the __symbols__
node the message will point out that the probable reason is that
the base tree was miscompiled without the -@ option.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 29 Aug 2017 20:16:00 +0000 (14:16 -0600)]
dtoc: Rename the auto-generated dt-structs.h file
The filename of the auto-generated file is the same as the file that
includes it. Even though the form is in the generated/ subdirectory, this
could be confused.
Rename the generated file to something that makes it clear it is
auto-generated.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:59 +0000 (14:15 -0600)]
dtoc: Support properties containing multiple phandle values
At present dtoc has a very simplistic view of phandles. It assumes that
a property has only a single phandle with a single argument (i.e. two
cells per property).
This is not true in many cases. Enhance the implementation to scan all
phandles in a property and to use the correct number of arguments (which
can be 0, 1, 2 or more) when generating the C code. For the struct
definitions, use a struct which can hold the maximum number of arguments
used by the property.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:58 +0000 (14:15 -0600)]
dtoc: Put phandle args in an array
We want to support more than one phandle argument. It makes sense to use
an array for this rather than discrete struct members. Adjust the code to
support this. Rename the member to 'arg' instead of 'id'.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:57 +0000 (14:15 -0600)]
dtoc: Put each phandle on a separate line
When writing values from properties which contain phandles, dtoc currently
writes 8 phandles per line. Change this to write one phandle per line.
This helps reduce line length, since phandles are generally longer and may
have arguments.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:56 +0000 (14:15 -0600)]
dtoc: Rename the phandle struct
Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:55 +0000 (14:15 -0600)]
dtoc: Rename is_phandle() and adjust it to return more detail
Update this function to return more detail about a property that contains
phandles. This will allow (in a future commit) more accurate handling of
these properties.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:54 +0000 (14:15 -0600)]
dtoc: Make is_phandle() a member function
This function will need to have access to class members once we enhance it
to support multiple phandle values. In preparation for that, move it into
the class.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:51 +0000 (14:15 -0600)]
dtoc: Handle 'reg' properties with unusual sizes
At present dtoc assumes that all 'reg' properties have both an address and
a size. For I2C devices we do not have this. Adjust dtoc to cope.
Reported-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:50 +0000 (14:15 -0600)]
dtoc: Add support for 32 or 64-bit addresses
When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
does not since it ignores the #address-cells and #size-cells properties.
Update the tool to use fdt64_t as the element type for reg properties when
either the address or size is larger than one cell. Use the correct value
so that C code can obtain the information from the device tree easily.
Alos create a new type, fdt_val_t, which is defined to either fdt32_t or
fdt64_t depending on the word size of the machine. This type corresponds
to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types
since they are defined to phys_addr_t and phys_size_t which use
'unsigned long' in the 32-bit case, rather than 'unsigned int'.
Add tests for the four combinations of address and size values (32/32,
64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368
which now need to use the new fdt_val_t type.
Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:49 +0000 (14:15 -0600)]
dtoc: Avoid very long lines in output
Large arrays can result in lines with hundreds or thousands of characters
which is not very editor-friendly. To avoid this, addjust the tool to
group values 8 per line.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:48 +0000 (14:15 -0600)]
dtoc: Add a 64-bit type and a way to convert cells into 64 bits
When dealing with multi-cell values we need a type that can hold this
value. Add this and a function to process it from a list of cell values.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Tue, 29 Aug 2017 20:15:47 +0000 (14:15 -0600)]
dtoc: Adjust Node to record its parent
We need to be able to search back up the tree for #address-cells and
#size-cells. Record the parent of each node to make this easier.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Thu, 14 Sep 2017 15:29:33 +0000 (11:29 -0400)]
Travis-CI: Switch back to using the top of tree dtc
In a0f3e3df4adc we switched to using the Ubuntu-provided dtc as travis
was having a problem with the number of warnings that were generated by
the newer dtc. This is no longer a concern as we now have the same
logic as Linux to enable/disable additional more stringent warnings. Go
back to building dtc from source.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on travis-ci: Tested-by: Simon Glass <sjg@chromium.org>
Unescaped left brace in regex is deprecated here
(and will be fatal in Perl 5.30), passed through in regex;
marked by <-- HERE in m/^(\+.*(?:do|\))){ <-- HERE /
at scripts/checkpatch.pl line 3348.
The curent checkpatch of the Linux kernel corrects this
bug and many others.
It provides improved colored output.
So replace checkpatch by the current Linux version.
Add an empty file scripts/const_structs.checkpatch.
We can later fill it according to our needs.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rob Clark [Mon, 11 Sep 2017 20:53:08 +0000 (16:53 -0400)]
lib: strto: fix incorrect handling of specified base
The strto functions should honor the specified base (if non-zero) rather
than permitting a hex or octal string when the user wanted (for example)
base 10.
This has been fixed somewhere along the way in the upstream linux kernel
src tree, at some point after these was copied in to u-boot. And also
in a way that duplicates less code. So port _parse_integer_fixup_radix()
to u-boot.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add unit tests for the 'gpt rename' and 'gpt swap' commands that
rely on the block device created by test/py/make_test_disk.py.
Add CONFIG_CMD_GPT_RENAME to the sandbox_defconfig. Remove the
testdisk.raw test device at the end of the tests.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Run unit tests for the 'gpt guid' command, making use of the block
device created by test/py/make_test_disk.py. Remove this device at
the end of the tests.
Signed-off-by: Alison Chaiken <alison@peloton-tech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Suman Anna [Fri, 8 Sep 2017 19:08:25 +0000 (14:08 -0500)]
ARM: DRA7: Cleanup old pinctrl macros
Commit 6ae4c3efbd62 ("ARM: DRA7: Add pinctrl register definitions")
has added new macros for pinmux configuration in line with the kernel
definitions. Cleanup the old pinctrl macros from the common header
file so that they are not used by any new boards.
Suman Anna [Fri, 8 Sep 2017 19:08:24 +0000 (14:08 -0500)]
arm: am57xx: cl-som-am57x: Use new pinctrl macros
Commit 6ae4c3efbd62 ("ARM: DRA7: Add pinctrl register definitions")
has added new macros for pinmux configuration in line with the
kernel definitions. Fixup the current pinctrl data for the CompuLab
CL-SOM-AM57x board to use these new macros to facilitate the removal
of the old macros.
NOTE:
The PEN and PDIS macro values used previously were actually defined
inversely, a value of 1 in bit position 16 actually means that the
internal pullup/pulldown is disabled and not enabled as inferred by
PEN. So, previous pinmux config data such as (PDIS | PTU) is confusing
as it actually was meant for enabling internal pullup. The data is
fixed up only to be equivalent to the previous data.
To remove the assignment of CONFIG_SYS_EXTRA_OPTIONS option,
which is deprecated, use the CONFIG_XXXX_BOOT options to
indicate the boot media, and the SoC is selected by the board.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Wenyou Yang [Thu, 14 Sep 2017 03:07:42 +0000 (11:07 +0800)]
ARM: at91: Remove hardware.h included in configs
As said in READRE.kconfig, include/configs/*.h will be removed
after all options are switched to Kconfig. As the first step,
remove the follow line from include/configs/*.h.
#include <asm/hardware.h>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Wenyou Yang [Thu, 14 Sep 2017 03:07:41 +0000 (11:07 +0800)]
ARM: at91: Add the SoC options to Kconfig
To prepare to remove the SoCs options such as SAMA5D2, SAMA5D3
and SAMA5D4 from the CONFIG_SYS_EXTRA_OPTIONS option which is
deprecated, add the SoC options to Kconfig.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Wenyou Yang [Wed, 13 Sep 2017 06:58:50 +0000 (14:58 +0800)]
board: sama5d2_xplained: Make SPL work on spiflash
Because before switching to a lower clock source, we must switch
the clock source first instead of last. So before configuring the
PMC_MCKR register, invoke at91_mck_init_down() first.
As said in datasheet, the the size of SPL must not exceed the maximum
size allowed(64Kbytes).
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Wed, 13 Sep 2017 06:58:49 +0000 (14:58 +0800)]
ARM: at91: spl: Add mck function to lower rate while switching
Refer to the commit 70f8c8316ad(PMC: add new mck function to lower
rate while switching) from AT91Bootstrap.
While switching to a lower clock source, we must switch the clock
source first instead of last. Otherwise, we could end up with
too high frequency on internal bus and peripherals.
This happens on SAMA5D2 as exitting from the ROM code.
Add a function pmc_mck_init_down() to allow this sequence.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Wed, 13 Sep 2017 06:58:48 +0000 (14:58 +0800)]
ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Wed, 13 Sep 2017 06:58:47 +0000 (14:58 +0800)]
atmel: common: Add function to display via DM_VIDEO's API
Add a function to display the company's logo and board information
via the API from DM_VIDEO. This function can be shared by other
atmel boards, so locate it in board/atmel/common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 5 Sep 2017 10:30:07 +0000 (18:30 +0800)]
clk: at91: utmi: Set the reference clock frequency
By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.
The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.
The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM] Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 13 Sep 2017 02:30:28 +0000 (20:30 -0600)]
patman: Fix error when the email blacklist is missing
This section of the settings file may be missing. Handle that gracefully
rather than emitting an error.
Also update patman to write this section when a new settings file is
created.
Fixes: e11aa602 (patman: add support for omitting bouncing addresses) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chris Packham <judge.pckham@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot.git / log