]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
9 years agocrypto/fsl: Make function names consistent for blob encapsulation/decapsulation.
gaurav rana [Wed, 25 Feb 2015 04:07:09 +0000 (09:37 +0530)]
crypto/fsl: Make function names consistent for blob encapsulation/decapsulation.

This patch does the following:

1. The function names for encapsulation and decapsulation
were inconsitent in freescale's implementation and cmd_blob file.
This patch corrects the issues.
2. The function protopye is also modified to change the length parameter
from u8 to u32 to allow encapsulation and decapsulation of larger images.
3. Modified the description of km paramter in the command usage for better
readability.

Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agommc: fsl_esdhc: Add support for DDR mode
Volodymyr Riazantsev [Tue, 20 Jan 2015 15:16:44 +0000 (10:16 -0500)]
mmc: fsl_esdhc: Add support for DDR mode

Add support of the DDR mode for eSDHC driver.
Enable it for i.MX6 SoC family only.

Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls1021x: Add support for initializing CAAM's stream id
Alison Wang [Fri, 16 Jan 2015 09:21:34 +0000 (17:21 +0800)]
arm: ls1021x: Add support for initializing CAAM's stream id

There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
for using the same SMMU3 on LS1021A.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: workaround for cache coherency problem
chenhui zhao [Fri, 23 Jan 2015 07:53:53 +0000 (15:53 +0800)]
arm: ls102xa: workaround for cache coherency problem

The RCPM FSM may not be reset after power-on, for example,
in the cases of cold boot and wakeup from deep sleep.
It causes cache coherency problem and may block deep sleep.
Therefore, reset them if they are not be reset.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodriver/pci: add Layerscape PCIe driver
Minghuan Lian [Wed, 21 Jan 2015 09:29:20 +0000 (17:29 +0800)]
driver/pci: add Layerscape PCIe driver

The patch adds Freescale Layerscape PCIe driver and provides
up to 4 controllers support.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm/ls1021a: add PCIe settings
Minghuan Lian [Wed, 21 Jan 2015 09:29:19 +0000 (17:29 +0800)]
arm/ls1021a: add PCIe settings

The patch enables and adds PCIe settings for boards LS1021AQDS
and LS1021ATWR.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm/ls102xa: use a array to define pexmscportsr
Minghuan Lian [Wed, 21 Jan 2015 09:29:18 +0000 (17:29 +0800)]
arm/ls102xa: use a array to define pexmscportsr

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm/ls102xa: create TLB to map PCIe region
Minghuan Lian [Wed, 21 Jan 2015 09:29:17 +0000 (17:29 +0800)]
arm/ls102xa: create TLB to map PCIe region

LS1021A's PCIe1 region begins 0x40_00000000; PCIe2 begins
0x48_00000000. In order to access PCIe device, we must create
TLB to map the 40bit physical address to 32bit virtual address.
This patch will enable MMU after DDR is available and creates MMU
table in DRAM to map all 4G space; then, re-use the reserved space
to map PCIe region. The following the mapping layout.

VA mapping:
    -------  <---- 0GB
   |       |
   |       |
   |-------| <---- 0x24000000
   |///////|  ===> 192MB VA map for PCIe1 with offset 0x40_0000_0000
   |-------| <---- 0x300000000
   |       |
   |-------| <---- 0x34000000
   |///////|  ===> 192MB VA map for PCIe2 with offset 0x48_0000_0000
   |-------| <---- 0x40000000
   |       |
   |-------| <---- 0x80000000 DDR0 space start
   |\\\\\\\|
   |\\\\\\\|  ===> 2GB VA map for 2GB DDR0 Memory space
   |\\\\\\\|
   -------  <---- 4GB DDR0 space end

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Define default values for some CCSR macros
Alison Wang [Fri, 16 Jan 2015 09:23:04 +0000 (17:23 +0800)]
arm: ls102xa: Define default values for some CCSR macros

This patch is to define default values for some CCSR macros
to make header files cleaner.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodrivers/mc: Migrated MC Flibs to 0.5.2
J. German Rivera [Tue, 6 Jan 2015 21:19:02 +0000 (13:19 -0800)]
drivers/mc: Migrated MC Flibs to 0.5.2

Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory
fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree
from "fsl,dprcr" to "fsl-mc". Print MC version info when
appropriate.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/ls2085a_emu: Enable sync of refresh
York Sun [Tue, 6 Jan 2015 21:19:01 +0000 (13:19 -0800)]
armv8/ls2085a_emu: Enable sync of refresh

Enable sync of DDR refresh for LS2085a platform. GPP DDR controllers
stay in sync. DP-DDR has only one controller so it does no harm.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/fsl-lsch3: Enable erratum workround for A008514
York Sun [Tue, 6 Jan 2015 21:19:00 +0000 (13:19 -0800)]
armv8/fsl-lsch3: Enable erratum workround for A008514

Erratum A008514 appleis to ls2085a.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/fsl-lsch3: Enable workaround for A008336
York Sun [Tue, 6 Jan 2015 21:18:59 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Enable workaround for A008336

Erratum A008336 applied to LS2085A.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agols2085/configs: Ensure right banners are printed for EMU and SIMU
Bhupesh Sharma [Tue, 6 Jan 2015 21:18:58 +0000 (13:18 -0800)]
ls2085/configs: Ensure right banners are printed for EMU and SIMU

This patch enusres that right banners are printed for LS2085A
emulator and simulator platforms.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoARMv8/ls2085a: Move kernel image load address
Stuart Yoder [Tue, 6 Jan 2015 21:18:57 +0000 (13:18 -0800)]
ARMv8/ls2085a: Move kernel image load address

Move the load address of the kernel image to get it away from the
region of the uncompressed kernel.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoARMv8/ls2085a: Switch to passing earlycon to kernel
Arnab Basu [Tue, 6 Jan 2015 21:18:56 +0000 (13:18 -0800)]
ARMv8/ls2085a: Switch to passing earlycon to kernel

Since Linux v3.16-rc1 earlyprintk has been removed for arm64.
Switch to using earlycon.

Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Add sync of refresh
York Sun [Tue, 6 Jan 2015 21:18:55 +0000 (13:18 -0800)]
driver/ddr/fsl: Add sync of refresh

Add sync of refresh for multiple DDR controllers. DDRC initialization
needs to complete first. Code is re-ordered to keep refresh close.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoARMv8/LS2085A: Adjust system clock and DDR clock
York Sun [Tue, 6 Jan 2015 21:18:54 +0000 (13:18 -0800)]
ARMv8/LS2085A: Adjust system clock and DDR clock

Set system clock to 100MHz and DDR clock to 133MHz.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoARMv8/LS2085A: HugeTLB support is required by default in LS NADK
Kuldip Giroh [Tue, 6 Jan 2015 21:18:53 +0000 (13:18 -0800)]
ARMv8/LS2085A: HugeTLB support is required by default in LS NADK

LS NADK memory manager by default works on HugeTLB. Hence bootargs
must include parameters default_hugepagesz (default hugepagesize,
hugepagesz (hugepage size) and hugepages (number of hugepages to be
reserved in kernel for the given size).

Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Fix a typo in timing_cfg_8 calculation
York Sun [Tue, 6 Jan 2015 21:18:52 +0000 (13:18 -0800)]
driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation

wwt_bg should match rrt_bg. It was a typo in driver.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoARMv8/LS2085A: Enable auto precharge for DP-DDR
York Sun [Tue, 6 Jan 2015 21:18:51 +0000 (13:18 -0800)]
ARMv8/LS2085A: Enable auto precharge for DP-DDR

DP-DDR benefits from auto precharge because of its specific
application.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Add support for multiple DDR clocks
York Sun [Tue, 6 Jan 2015 21:18:50 +0000 (13:18 -0800)]
driver/ddr/fsl: Add support for multiple DDR clocks

Controller number is passed for function calls to support individual
DDR clock, depending on SoC implementation. It is backward compatible
with exising platforms. Multiple clocks have been verifyed on LS2085A
emulator.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/fsl-lsch3: Add support for second DDR clock
York Sun [Tue, 6 Jan 2015 21:18:49 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Add support for second DDR clock

FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs to
change to support multiple clocks.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Add workround for erratumn A008514
York Sun [Tue, 6 Jan 2015 21:18:48 +0000 (13:18 -0800)]
driver/ddr/fsl: Add workround for erratumn A008514

Erratum A008514 workround requires writing register eddrtqcr1 with
value 0x63b20002.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Add workaround for A008336
York Sun [Tue, 6 Jan 2015 21:18:47 +0000 (13:18 -0800)]
driver/ddr/fsl: Add workaround for A008336

Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space
for 64-bit DDR controllers.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Adjust CAS to preamble override for emulator
York Sun [Tue, 6 Jan 2015 21:18:45 +0000 (13:18 -0800)]
driver/ddr/fsl: Adjust CAS to preamble override for emulator

On ZeBu emulator, CAS to preamble overrides need to be set to
satisfy the timing. This only impact platforms with CONFIG_EMU.

These should be set before MEM_EN is set.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/fsl-lsch3: Add fdt-fixup for clock frequency of the DUART nodes
Bhupesh Sharma [Tue, 6 Jan 2015 21:18:44 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Add fdt-fixup for clock frequency of the DUART nodes

This patch adds the fdt-fixup logic for the clock frequency of the
NS16550A related device tree nodes.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/ls2085a: Enable cluster timebase for all clusters
York Sun [Tue, 6 Jan 2015 21:18:43 +0000 (13:18 -0800)]
armv8/ls2085a: Enable cluster timebase for all clusters

LS2085A and its variants can have up to four clusters. It is safe
to enable timebase for all even some may be disabled.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack
York Sun [Tue, 6 Jan 2015 21:18:42 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack

Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using
assembly function to guarantee stack is not used before flushing is
completed. Timeout is needed for simualtor on which CCN-504 is not
implemented. Return value can be checked for timeout situation.

Change bootm.c to disable dcache instead of simply flushing, required
by flushing L3.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores
Arnab Basu [Tue, 6 Jan 2015 21:18:41 +0000 (13:18 -0800)]
ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores

U-Boot should only add "enable-method" and "cpu-release-address"
properties to the "cpu" node of the online cores.

Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
9 years agoarmv8/fsl-lsch3: Change normal memory shareability
York Sun [Tue, 6 Jan 2015 21:11:22 +0000 (13:11 -0800)]
armv8/fsl-lsch3: Change normal memory shareability

According to hardware implementation, a single outer shareable global
coherence group is defined. Inner shareable has not bee enabled.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agofsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses
Bhupesh Sharma [Tue, 6 Jan 2015 21:11:21 +0000 (13:11 -0800)]
fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses

This patch ensures that the TZPC (BP147) and TZASC-400 programming
happens for LS2085A SoC only when the desired config flags are
enabled and ensures that the TZPC programming is done to allow Non-secure
(NS) + secure (S) transactions only for DCGF registers.

The TZASC component is not present on LS2085A-Rev1, so the TZASC-400
config flag is turned OFF for now.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Mon, 23 Feb 2015 21:18:06 +0000 (16:18 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

9 years agommc: sdhci: fix bus width switching on Samsung SoCs
Matt Reimer [Thu, 19 Feb 2015 18:22:53 +0000 (11:22 -0700)]
mmc: sdhci: fix bus width switching on Samsung SoCs

Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on
Samsung SoCs using SDHCI_QUIRK_USE_WIDE8.  These SoCs report controller
version 2.0 yet they support 8-bit bus widths.  If 8-bit mode was
previously enabled and then an operation like "mmc dev" caused a switch
back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures.

This problem was manifested by "mmc dev" timing out.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
9 years agommc: print SD/eMMC type for inited mmc devices
Przemyslaw Marczak [Fri, 20 Feb 2015 11:29:27 +0000 (12:29 +0100)]
mmc: print SD/eMMC type for inited mmc devices

Depending on the boot priority, the eMMC/SD cards,
can be initialized with the same numbers for each boot.

To be sure which mmc device is SD and which is eMMC,
this info is printed by 'mmc list' command, when
the init is done.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
9 years agommc: exynos dwmmc: check boot mode before init dwmmc
Przemyslaw Marczak [Fri, 20 Feb 2015 11:29:26 +0000 (12:29 +0100)]
mmc: exynos dwmmc: check boot mode before init dwmmc

Before this commit, the mmc devices were always registered
in the same order. So dwmmc channel 0 was registered as mmc 0,
channel 1 as mmc 1, etc.
In case of possibility to boot from more then one device,
the CONFIG_SYS_MMC_ENV_DEV should always point to right mmc device.

This can be achieved by init boot device as first, so it will be
always registered as mmc 0. Thanks to this, the 'saveenv' command
will work fine for all mmc boot devices.

Exynos based boards usually uses mmc host channels configuration:
- 0, or 0+1 for 8 bit  - as a default boot device (usually eMMC)
- 2 for 4bit - as an optional boot device (usually SD card slot)

And usually the boot order is defined by OM pin configuration,
which can be changed in a few ways, eg.
- Odroid U3     - eMMC card insertion -> first boot from eMMC
- Odroid X2/XU3 - boot priority jumper

By this commit, Exynos dwmmc driver will check the OM pin configuration,
and then try to init the boot device and register it as mmc 0.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
9 years agosunxi: mmc: Always declare High Capacity capability
Hans de Goede [Thu, 19 Feb 2015 20:03:21 +0000 (21:03 +0100)]
sunxi: mmc: Always declare High Capacity capability

High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this
capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13
tablet, so always set it thereby fixing this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agommc: exynos_dw_mmc: use the exynos specific data structure
Jaehoon Chung [Wed, 4 Feb 2015 06:48:40 +0000 (15:48 +0900)]
mmc: exynos_dw_mmc: use the exynos specific data structure

Clksel value is exynos specific value.
It removed "clksel_val" into dwmci_host and created the
"dwmci_exynos_priv_data" structure for exynos specific data.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
9 years agommc: exynos_dw_mmc: set to clksel_val into board-init function
Jaehoon Chung [Wed, 4 Feb 2015 06:48:39 +0000 (15:48 +0900)]
mmc: exynos_dw_mmc: set to clksel_val into board-init function

"clksel_val" is assigned to property of mmc or defined value.
But it doesn't write at initial sequence.
There is a reason that get the wrong source-clock value.
This patch fixed it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
9 years agommc: dw_mmc: fixed the wrong bit control
Jaehoon Chung [Wed, 14 Jan 2015 08:37:53 +0000 (17:37 +0900)]
mmc: dw_mmc: fixed the wrong bit control

If mode is not DDR-mode, then it needs to clear it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
9 years agommc: Implement SD/MMC versioning properly
Pantelis Antoniou [Fri, 23 Jan 2015 10:12:01 +0000 (12:12 +0200)]
mmc: Implement SD/MMC versioning properly

The SD/MMC version scheme was buggy when dealing with standard
major.minor.change cases. Fix it by using something similar to
the linux's kernel versioning method.

Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reported-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
9 years agoMerge git://git.denx.de/u-boot-sunxi
Tom Rini [Sun, 22 Feb 2015 03:01:09 +0000 (22:01 -0500)]
Merge git://git.denx.de/u-boot-sunxi

9 years agosunxi: Machine id hack to prevent loading buggy sunxi-3.4 kernels
Siarhei Siamashka [Sat, 21 Feb 2015 05:34:09 +0000 (07:34 +0200)]
sunxi: Machine id hack to prevent loading buggy sunxi-3.4 kernels

Right now U-Boot supports the CONFIG_OLD_SUNXI_KERNEL_COMPAT option,
which makes it go out of its way in limiting the selection of PLL clock
frequencies and PMIC voltages in order not to upset outdated buggy
sunxi-3.4 kernel releases. And if the CONFIG_OLD_SUNXI_KERNEL_COMPAT
option is not set, then booting such old kernels exhibits various
failures at runtime. This is very user unfriendly, and there were
already several incidents when people wasted their time being hit
by these runtime failures and trying to debug them.

The right solution is not to add hacks and workarounds to the mainline
U-Boot, but to fix these bugs in the sunxi-3.4 kernel. And in fact,
the updated sunxi-3.4 kernels already exist. Still we need to follow
the 'Principle of Least Surprise' and U-Boot needs to ensure that
the old buggy kernels are not getting happily booted when the
CONFIG_OLD_SUNXI_KERNEL_COMPAT option is not set. And this patch
addresses this particular issue.

This patch makes U-Boot store the 'compatibility revision' number in
the top 4 bits of the machine id and pass it to the kernel. The old
buggy kernels will fail to load with a very much googlable error
message on the serial console (the "r1 = 0x100010bb" part of it):

  "Error: unrecognized/unsupported machine ID (r1 = 0x100010bb)"

This error message can be documented in the linux-sunxi wiki with
proper explanations about how to resolve this situation and where
to get the necessary bugfixes for the sunxi-3.4 kernel.

The fixed sunxi-3.4 kernels implement a revision compatibility check
and clear the top 4 bits of the machine id if everything is alright.
By accepting the machine id with the bits 31:28 set to 1, the sunxi-3.4
kernel effectively certifies that it has the PLL5 clock speed and
AXP209 DCDC3 voltage fixes applied.

It is still possible to set the CONFIG_OLD_SUNXI_KERNEL_COMPAT option
in U-Boot if the user desires to use an outdated unpatched sunxi-3.4
kernel.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: Set the /chosen/stdout-path fdt property for sunxi boards
Hans de Goede [Fri, 20 Feb 2015 15:55:12 +0000 (16:55 +0100)]
sunxi: Set the /chosen/stdout-path fdt property for sunxi boards

While discussing with some people how to get the Linux kernel to do the
right thing wrt sending output to both the serial console and the
hdmi out / lcd screen when booting on ARM devices, Grant Likely pointed out
that there already is a solution for this.

All we need to do is set the /chosen/stdout-path fdt property, and if no
console= arguments were specified on the kernel commandline the kernel
will honor this and add this device as a console (next to the primary
video output on hdmi).

And u-boot already has support for setting this, all we need to do is
define OF_STDOUT_PATH and then everything will just work ootb, without
people needing to meddle with adding console= arguments in extlinux.conf .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Tom Rini <trini@ti.com>
9 years agosunxi: Fix sun5i mbus speed when booting old kernels
Hans de Goede [Thu, 19 Feb 2015 13:46:44 +0000 (14:46 +0100)]
sunxi: Fix sun5i mbus speed when booting old kernels

Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz,
halving the mbus frequency, so set it to 300 MHz ourselves and base the
mbus divider on that.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: musb: Check Vbus-det before enabling otg port power
Hans de Goede [Mon, 16 Feb 2015 21:13:43 +0000 (22:13 +0100)]
sunxi: musb: Check Vbus-det before enabling otg port power

Sending out 5V when there is a charger connected to the otg port is not a
good idea, so check for this and error out.

Note this commit currently breaks otg support on the q8h tablets, as we need
to do some magic with the pmic there to get vbus info, this is deliberate
(better safe then sorry), fixing this is on my TODO list.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add support for the UTOO P66 tablet
Hans de Goede [Mon, 16 Feb 2015 18:47:43 +0000 (19:47 +0100)]
sunxi: Add support for the UTOO P66 tablet

The UTOO P66 is a 6" A13 tablet / lcd ereader. It features a 6" 480x800 ips
lcd screen, 512MB RAM & 4GB emmc.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: mmc: Always declare High Capacity capability
Hans de Goede [Thu, 19 Feb 2015 19:34:32 +0000 (20:34 +0100)]
sunxi: mmc: Always declare High Capacity capability

High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this
capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13
tablet, so always set it thereby fixing this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agorpi: add support for Raspberry Pi 2 model B
Stephen Warren [Mon, 16 Feb 2015 19:16:15 +0000 (12:16 -0700)]
rpi: add support for Raspberry Pi 2 model B

USB doesn't seem to work yet; the controller detects the on-board Hub/
Ethernet device but can't read the descriptors from it. I haven't
investigated yet.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agobcm2836 SoC support (used in Raspberry Pi 2 model B)
Stephen Warren [Mon, 16 Feb 2015 19:16:14 +0000 (12:16 -0700)]
bcm2836 SoC support (used in Raspberry Pi 2 model B)

The bcm2835 and bcm2836 are essentially identical, except:
- The CPU is an ARM1176 v.s. a quad-core Cortex-A7.
- The physical address of many IO controllers has moved.

Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH),
update the existing bcm2835 code to handle the minor differences, and
plumb it into the ARMv7 CPU architecture.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agobcm2835/rpi: add SPDX license tags for some files
Stephen Warren [Mon, 16 Feb 2015 19:16:13 +0000 (12:16 -0700)]
bcm2835/rpi: add SPDX license tags for some files

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agoARM: prepare for including <mach/*.h>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:19 +0000 (17:04 +0900)]
ARM: prepare for including <mach/*.h>

This commit adds $(srctree)/arch/arm/$(machdirs)/include/mach to
the headers search path.

It allows us to replace "#include <asm/arch/foo.h>" with
"#include <mach/foo.h>".  As "#include <asm/arch/foo.h>" is still
supported, we can modify each file one by one.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: keystone: move SoC headers to mach-keystone/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:18 +0000 (17:04 +0900)]
ARM: keystone: move SoC headers to mach-keystone/include/mach

Move arch/arm/include/asm/arch-keystone/*
  -> arch/arm/mach-keystone/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
9 years agoARM: orion5x: move SoC headers to mach-orion5x/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:17 +0000 (17:04 +0900)]
ARM: orion5x: move SoC headers to mach-orion5x/include/mach

Move arch/arm/include/asm/arch-orion5x/*
  -> arch/arm/mach-orion5x/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
9 years agoARM: nomadik: move SoC headers to mach-nomadik/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:16 +0000 (17:04 +0900)]
ARM: nomadik: move SoC headers to mach-nomadik/include/mach

Move arch/arm/include/asm/arch-nomadik/*
  -> arch/arm/mach-nomadik/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
Cc: Alessandro Rubini <rubini@unipv.it>
9 years agoARM: kirkwood: move SoC headers to mach-kirkwood/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:15 +0000 (17:04 +0900)]
ARM: kirkwood: move SoC headers to mach-kirkwood/include/mach

Move arch/arm/include/asm/arch-kirkwood/*
  -> arch/arm/mach-kirkwood/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
9 years agoARM: davinci: move SoC headers to mach-davinci/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:14 +0000 (17:04 +0900)]
ARM: davinci: move SoC headers to mach-davinci/include/mach

Move arch/arm/include/asm/arch-davinci/*
  -> arch/arm/mach-davinci/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
9 years agoARM: at91: move SoC headers to mach-at91/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:13 +0000 (17:04 +0900)]
ARM: at91: move SoC headers to mach-at91/include/mach

Move arch/arm/include/asm/arch-at91/*
  -> arch/arm/mach-at91/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agokbuild: prepare for moving headers into mach-*/include/mach
Masahiro Yamada [Fri, 20 Feb 2015 08:04:12 +0000 (17:04 +0900)]
kbuild: prepare for moving headers into mach-*/include/mach

In U-Boot, SoC-specific headers are placed in
arch/$(ARCH)/include/asm/arch-$(SOC) and a symbolic link to that
directory is created at the early stage of the build process.

Creating and removing a symbolic link during the build is not
preferred.  In fact, Linux Kernel did away with include/asm-$(ARCH)
directories a long time time ago.

As for ARM, now it is possible to collect SoC sources into
arch/arm/mach-$(SOC).  It is also reasonable to move SoC headers
into arch/arm/mach-$(SOC)/include/mach.

This commit prepares for that.
If the directory arch/$(ARCH)/mach-$(SOC)/include/mach exists,
a symbolic to that directory is created.  Otherwise, a symbolic link
to arch/$(ARCH)/include/asm/arch-$(SOC) or arch-$(CPU) is created.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: keystone: move SoC sources to mach-keystone
Masahiro Yamada [Fri, 20 Feb 2015 08:04:11 +0000 (17:04 +0900)]
ARM: keystone: move SoC sources to mach-keystone

Move
arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
9 years agoARM: versatile: move SoC sources to mach-versatile
Masahiro Yamada [Fri, 20 Feb 2015 08:04:10 +0000 (17:04 +0900)]
ARM: versatile: move SoC sources to mach-versatile

Move
arch/arm/cpu/arm926ejs/versatile/* -> arch/arm/mach-versatile/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: orion5x: move SoC sources to mach-orion5x
Masahiro Yamada [Fri, 20 Feb 2015 08:04:09 +0000 (17:04 +0900)]
ARM: orion5x: move SoC sources to mach-orion5x

Move
arch/arm/cpu/arm926ejs/orion5x/* -> arch/arm/mach-orion5x/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
9 years agoARM: highbank: move SoC sources to mach-highbank
Masahiro Yamada [Fri, 20 Feb 2015 08:04:08 +0000 (17:04 +0900)]
ARM: highbank: move SoC sources to mach-highbank

Move
arch/arm/cpu/armv7/highbank/* -> arch/arm/mach-highbank/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Rob Herring <robh@kernel.org>
9 years agoARM: nomadik: move SoC sources to mach-nomadik
Masahiro Yamada [Fri, 20 Feb 2015 08:04:07 +0000 (17:04 +0900)]
ARM: nomadik: move SoC sources to mach-nomadik

Move
arch/arm/cpu/arm926ejs/nomadik/* -> arch/arm/mach-nomadik/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
Cc: Alessandro Rubini <rubini@unipv.it>
9 years agoARM: kirkwood: move SOC sources to mach-kirkwood
Masahiro Yamada [Fri, 20 Feb 2015 08:04:06 +0000 (17:04 +0900)]
ARM: kirkwood: move SOC sources to mach-kirkwood

Move
arch/arm/cpu/arm926ejs/kirkwood/* -> arch/arm/mach-kirkwood/*

Note:
 Perhaps, can we merge arch/arm/mach-kirkwood and
 arch/arm/mvebu-common into arch/arm/mach-mvebu, like Linux?

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
9 years agoARM: davinci: move SoC sources to mach-davinci
Masahiro Yamada [Fri, 20 Feb 2015 08:04:05 +0000 (17:04 +0900)]
ARM: davinci: move SoC sources to mach-davinci

Move
arch/arm/cpu/arm926ejs/davinci/* -> arch/arm/mach-davinci/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
9 years agoARM: tegra: collect SoC sources into mach-tegra
Masahiro Yamada [Fri, 20 Feb 2015 08:04:04 +0000 (17:04 +0900)]
ARM: tegra: collect SoC sources into mach-tegra

This commit moves files as follows:

 arch/arm/cpu/arm720t/tegra20/*      -> arch/arm/mach-tegra/tegra20/*
 arch/arm/cpu/arm720t/tegra30/*      -> arch/arm/mach-tegra/tegra30/*
 arch/arm/cpu/arm720t/tegra114/*     -> arch/arm/mach-tegra/tegra114/*
 arch/arm/cpu/arm720t/tegra124*      -> arch/arm/mach-tegra/tegra124/*
 arch/arm/cpu/arm720t/tegra-common/* -> arch/arm/mach-tegra/*
 arch/arm/cpu/armv7/tegra20/*        -> arch/arm/mach-tegra/tegra20/*
 arch/arm/cpu/armv7/tegra30/*        -> arch/arm/mach-tegra/tegra30/*
 arch/arm/cpu/armv7/tegra114/*       -> arch/arm/mach-tegra/tegra114/*
 arch/arm/cpu/armv7/tegra124/*       -> arch/arm/mach-tegra/tegra124/*
 arch/arm/cpu/armv7/tegra-common/*   -> arch/arm/mach-tegra/*
 arch/arm/cpu/tegra20-common/*       -> arch/arm/mach-tegra/tegra20/*
 arch/arm/cpu/tegra30-common/*       -> arch/arm/mach-tegra/tegra30/*
 arch/arm/cpu/tegra114-common/*      -> arch/arm/mach-tegra/tegra114/*
 arch/arm/cpu/tegra124-common/*      -> arch/arm/mach-tegra/tegra124/*
 arch/arm/cpu/tegra-common/*         -> arch/arm/mach-tegra/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org> [ on nyan-big ]
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
9 years agoARM: at91: collect SoC sources into mach-at91
Masahiro Yamada [Fri, 20 Feb 2015 08:04:03 +0000 (17:04 +0900)]
ARM: at91: collect SoC sources into mach-at91

This commit moves source files as follows:

  arch/arm/cpu/arm920t/at91/*   -> arch/arm/mach-at91/arm920t/*
  arch/arm/cpu/arm926ejs/at91/* -> arch/arm/mach-at91/arm926ejs/*
  arch/arm/cpu/armv7/at91/*     -> arch/arm/mach-at91/armv7/*
  arch/arm/cpu/at91-common/*    -> arch/arm/mach-at91/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
9 years agoARM: prepare for moving SoC sources into mach-*
Masahiro Yamada [Fri, 20 Feb 2015 08:04:02 +0000 (17:04 +0900)]
ARM: prepare for moving SoC sources into mach-*

In U-boot, the directory structure, arch/$(ARCH)/cpu/$(CPU)/$(SOC)/
has been adopted except that $(CPU) is missing from some
architectures and $(SOC) is missing from some CPUs.

This structure did not fit very well in some cases.

[1] AT91

AT91 SoC family have been developed across some ARM processor
generations.  Generally speaking, some IPs are often re-used in the
same SoC family (same SoC vendor) even when the main processor is
updated.  As a result, a SoC-common directory is needed in the upper
level.  Currently, AT91 source files are placed as follows:

  arch/arm/cpu/arm920t/at91/*
  arch/arm/cpu/arm926ejs/at91/*
  arch/arm/cpu/armv7/at91/*
  arch/arm/cpu/at91-common/*

Once directories are split, the motivation for refactorings across
CPU directories is lost.  Some files in arm920t/at91/ and
arm926ejs/at91/ are so similar that they could be merged.

[2] Tegra

Tegra is a little bit special case where different CPUs are used for
SPL and the main U-boot.  To obey the arch/$(ARCH)/cpu/$(CPU)/$(SOC)
structure, the source files must be placed across the CPUs,
again SoC-common directory is necessary in the upper level.

Moreover, there are several families in Tegra: Tegra20, Tegra30,
Tegra114, Tegra124.  Here again, the tegra-common directory is needed
to contain commonly-used files.

Tegra directories have been sprinkled in the directory structure.

  arch/arm/cpu/arm720t/tegra20
  arch/arm/cpu/arm720t/tegra30
  arch/arm/cpu/arm720t/tegra114
  arch/arm/cpu/arm720t/tegra124
  arch/arm/cpu/arm720t/tegra-common
  arch/arm/cpu/armv7/tegra20
  arch/arm/cpu/armv7/tegra30
  arch/arm/cpu/armv7/tegra114
  arch/arm/cpu/armv7/tegra124
  arch/arm/cpu/armv7/tegra-common
  arch/arm/cpu/tegra20-common
  arch/arm/cpu/tegra30-common
  arch/arm/cpu/tegra114-common
  arch/arm/cpu/tegra124-common
  arch/arm/cpu/tegra-common

As you see, splitting SoC code by the CPU is not going well,
especially for ARM.
Why don't we collect SoC-specific files into a single place?

A good example we can follow is Linux's arch/arm/mach-* structure.

This item was discussed in the following thread:
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/188548/

Looks like I got some positive responses and we are almost ready to
start this movement.

This commit prepares arch/arm/Makefile for describing machdirs in it.

After this commit, we can move SoC directory to arch/arm/mach-$(SOC)
in simple steps although some cases such as AT91 and Tegra need more
fixes.

What we generally have to do is:

[1] Move files arch/arm/cpu/$(CPU)/$(SOC)/* to arch/arm/mach-$(SOC)/*
[2] Add machine entry into arch/arm/Makefile
[3] Remove "obj-y += $(SOC)" from arch/arm/cpu/$(CPU)/Makefile
[4] Fix the Kconfig file path in arch/arm/Kconfig
[5] Modify MAINTAINERS if necessary

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: at91: move board select menu and common settings
Masahiro Yamada [Fri, 20 Feb 2015 08:04:01 +0000 (17:04 +0900)]
ARM: at91: move board select menu and common settings

The board select menu in arch/arm/Kconfig is still big.
To slim down it, this commit moves AT91 boards to
arch/arm/mach-at91/Kconfig.
Also, consolidate "config SYS_SOC" in each board Kconfig.

The Kconfig files under board/ directory were modified with the
following command:

    find board -name Kconfig | xargs sed -i -e '
    /config SYS_SOC/ {
        N
        /default "at91"/ {
            N
            d
        }
    }
    '

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
9 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Sat, 21 Feb 2015 13:22:23 +0000 (08:22 -0500)]
Merge git://git.denx.de/u-boot-dm

9 years agosunxi: video: Add support for tl059wv5c0 lcd panels
Hans de Goede [Mon, 16 Feb 2015 16:49:47 +0000 (17:49 +0100)]
sunxi: video: Add support for tl059wv5c0 lcd panels

Add support for the 6" 480x800 tl059wv5c0 panel used on e.g. Utoo P66 and
Aigo M60/M608/M606 tablets.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: video: Add support for LCD panels which need to be configured via i2c
Hans de Goede [Mon, 16 Feb 2015 16:23:25 +0000 (17:23 +0100)]
sunxi: video: Add support for LCD panels which need to be configured via i2c

This commits adds support for configuring a a bitbang i2c controller, which
is used on some boards to configure the LCD panel (via i2c).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: video: Add support for LCD reset pin
Hans de Goede [Mon, 16 Feb 2015 16:26:41 +0000 (17:26 +0100)]
sunxi: video: Add support for LCD reset pin

On some boards there is a gpio to reset the LCD panel, add support for this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agodm: Protect device_unbind() with CONFIG_DM_DEVICE_REMOVE
Marek Vasut [Wed, 18 Feb 2015 21:36:18 +0000 (22:36 +0100)]
dm: Protect device_unbind() with CONFIG_DM_DEVICE_REMOVE

Since device_unbind() is also defined in device-remove.c,
which is compiled in only in case CONFIG_DM_DEVICE_REMOVE
is defined, protect the device_unbind() prototype with the
same CONFIG_DM_DEVICE_REMOVE check.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: ns16550: Support debug UART
Simon Glass [Tue, 27 Jan 2015 01:27:09 +0000 (18:27 -0700)]
serial: ns16550: Support debug UART

Add debug UART functions to permit ns16550 to provide an early debug UART.
Try to avoid using the stack so that this can be called from assembler before
a stack is set up (at least on ARM and PowerPC).

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoserial: ns16550: Add access functions that don't need platdata
Simon Glass [Tue, 27 Jan 2015 01:27:08 +0000 (18:27 -0700)]
serial: ns16550: Add access functions that don't need platdata

For the debug UART we need to be able to provide any parameters before
driver model is set up. Add parameters to the low-level access functions
to make this possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoserial: Support an early UART for debugging
Simon Glass [Tue, 27 Jan 2015 01:27:07 +0000 (18:27 -0700)]
serial: Support an early UART for debugging

This came up in a discussion on the mailing list here:

https://patchwork.ozlabs.org/patch/384613/

My concerns at the time were:
- it doesn't need to be written in assembler
- it doesn't need to be ARM-specific

This patch provides a possible alternative. It works by allowing any serial
driver to export one init function and provide a putc() function. These
can be used to output debug data before the real serial driver is available.

This implementation does not depend on driver model, and it is possible for
it to operate without a stack on some architectures (e.g. PowerPC, ARM). It
provides the same features as the ARM-specific debug.S but with more UART
and architecture support.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoDocumentation: gpio: fix bindings document
Masahiro Yamada [Thu, 12 Feb 2015 09:49:33 +0000 (18:49 +0900)]
Documentation: gpio: fix bindings document

[ imported from Linux Kernel, commit 74981fb81d83 ]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agodm: mx6: Adjust mx6sxsabresd to use Kconfig for DM_THERMAL
Simon Glass [Fri, 13 Feb 2015 19:20:49 +0000 (12:20 -0700)]
dm: mx6: Adjust mx6sxsabresd to use Kconfig for DM_THERMAL

Use Kconfig instead of board config for DM and DM_THERMAL.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: Move CONFIG_I2C_COMPAT to Kconfig
Simon Glass [Fri, 13 Feb 2015 19:20:48 +0000 (12:20 -0700)]
dm: Move CONFIG_I2C_COMPAT to Kconfig

Make this option available in Kconfig and clean up the board that uses it.
Note there is also an entry in exynos5-common.h but this affects multiple
boards and should be dropped as part of the Samsung I2C migration to
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: cros_ec: Convert to Kconfig
Simon Glass [Fri, 13 Feb 2015 19:20:47 +0000 (12:20 -0700)]
dm: cros_ec: Convert to Kconfig

Since both I2C and SPI are converted to Kconfig, we can convert cros_ec
to Kconfig for these buses.

LPC will need to wait until driver mode PCI is available.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agocmd_i2c: Provide option for bulk 'i2c write' in one transaction
Lubomir Popov [Fri, 30 Jan 2015 17:56:04 +0000 (19:56 +0200)]
cmd_i2c: Provide option for bulk 'i2c write' in one transaction

I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does not come into effect at all, or normal operation of internal circuitry
cannot be guaranteed. The current implementation of the 'i2c write' command
(transfer of multiple bytes from a memory buffer) in fact performs a separate
transaction for each byte to be written and thus cannot support such types of
I2C slave devices.

This patch provides an alternative by allowing 'i2c write' to execute the
write transfer of the given number of bytes in a single bus transaction if
the '-s' option is specified as a final command argument. Else the current
re-addressing method is used.

Signed-off-by: Lubomir Popov <l-popov@ti.com>
hs: adapt to CONFIG_DM_I2C

9 years agocmd_i2c: quit I2C commands immediately on error
Masahiro Yamada [Thu, 5 Feb 2015 04:50:26 +0000 (13:50 +0900)]
cmd_i2c: quit I2C commands immediately on error

If the i2c driver returns an error status, error out immediately.
Continuing the loop just results in printing error messages
again and again.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-fdt
Tom Rini [Wed, 18 Feb 2015 13:46:50 +0000 (08:46 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt

9 years agocmd_fdt: Print the control fdt in terms of virtual memory
Joe Hershberger [Thu, 5 Feb 2015 03:56:54 +0000 (21:56 -0600)]
cmd_fdt: Print the control fdt in terms of virtual memory

If you want to inspect the control device tree using the fdt command,
the "fdt address -c" command previously unhelpfully printed the phys
memory address of the device tree. That address could not then be used
to set the fdt address for inspection. Changed the resulting print to
one that can be copied directly to the 'fdt address <addr>' command.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agocmd_fdt: Actually fix fdt command in sandbox
Joe Hershberger [Thu, 5 Feb 2015 03:56:53 +0000 (21:56 -0600)]
cmd_fdt: Actually fix fdt command in sandbox

Commit 90bac29a76bc8d649b41a55f2786c0abef9bb2c1 claims to fix this bug
that was introduced in commit a92fd6577ea17751ead9b50243e3c562125cf581
but doesn't actually make the change that the commit message describes.

Actually fix the bug this time.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-avr32
Tom Rini [Wed, 18 Feb 2015 03:11:36 +0000 (22:11 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-avr32

9 years agoatstk1002: enable generic board
Andreas Bießmann [Fri, 6 Feb 2015 22:06:50 +0000 (23:06 +0100)]
atstk1002: enable generic board

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agograsshopper: enable generic board
Andreas Bießmann [Fri, 6 Feb 2015 22:06:49 +0000 (23:06 +0100)]
grasshopper: enable generic board

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoavr32: add generic board support
Andreas Bießmann [Fri, 6 Feb 2015 22:06:48 +0000 (23:06 +0100)]
avr32: add generic board support

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agocommon/board_r: allocate bootparams
Andreas Bießmann [Fri, 6 Feb 2015 22:06:47 +0000 (23:06 +0100)]
common/board_r: allocate bootparams

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agocommon/board_f: factor out reserve_stacks
Andreas Bießmann [Fri, 6 Feb 2015 22:06:45 +0000 (23:06 +0100)]
common/board_f: factor out reserve_stacks

Introduce arch_reserve_stacks() to tailor gd->start_addr_sp and gd->irq_sp to
the architecture needs.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agoavr32: use generic gd->start_addr_sp
Andreas Bießmann [Fri, 6 Feb 2015 22:06:44 +0000 (23:06 +0100)]
avr32: use generic gd->start_addr_sp

Before avr32 had an extra storage for stack end to have a nice stack printout
on exception. Remove this extra storage and use generic gd->start_addr_sp
instead.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoavr32: convert to dram_init()
Andreas Bießmann [Fri, 6 Feb 2015 22:06:43 +0000 (23:06 +0100)]
avr32: convert to dram_init()

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agoavr32: rename mmu.h definitions
Andreas Bießmann [Fri, 6 Feb 2015 22:06:42 +0000 (23:06 +0100)]
avr32: rename mmu.h definitions

Prefix mmu.h PAGE_xxx definitions with MMU_ in order to prevent a naming
conflict with other definitions.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoavr32: factor out cpu_mmc_init()
Andreas Bießmann [Fri, 6 Feb 2015 22:06:41 +0000 (23:06 +0100)]
avr32: factor out cpu_mmc_init()

cpu_mmc_init() is required by the init sequence to have a working MMC interface
on avr32. This will not be included in the binary if we omit the avr32 board.c
when building the generic board.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoavr32: rename cpu_init() -> arch_cpu_init()
Andreas Bießmann [Fri, 6 Feb 2015 22:06:40 +0000 (23:06 +0100)]
avr32: rename cpu_init() -> arch_cpu_init()

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agoavr32: use dlmalloc for DMA buffers
Andreas Bießmann [Fri, 6 Feb 2015 22:06:39 +0000 (23:06 +0100)]
avr32: use dlmalloc for DMA buffers

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoPrepare v2015.04-rc2
Tom Rini [Tue, 17 Feb 2015 16:07:19 +0000 (11:07 -0500)]
Prepare v2015.04-rc2

Signed-off-by: Tom Rini <trini@ti.com>