]>
git.dujemihanovic.xyz Git - u-boot.git/log
Roger Quadros [Fri, 29 Sep 2023 13:46:45 +0000 (16:46 +0300)]
arm: dts: k3-am625-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:44 +0000 (16:46 +0300)]
arm: dts: k3-am642-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.
Fixes below dts warnings:
<stdout>: Warning (reg_format): /bus@f4000/ethernet@
8000000 /mdio@f00/ethernet-phy@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f4000/ethernet@
8000000 /mdio@f00: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@
8000000 /mdio@f00/ethernet-phy@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@
8000000 /mdio@f00/ethernet-phy@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@
48000000 /dma-controller@
485c0100 :msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@
48000000 /dma-controller@
485c0000 :msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (phys_property): /bus@f4000/ethernet@
8000000 /ethernet-ports/port@2:phys: Could not get phandle node for (cell 0)
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:43 +0000 (16:46 +0300)]
arm: dts: k3-am642-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
Move cbass_mcu node to -r5-sk.dts as it is only required
for R5 SPL.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:42 +0000 (16:46 +0300)]
arm: dts: k3-am64-evm: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
USB and MMC nodes need pinmux.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.
Fixes below dts warning:
<stdout>: Warning (dmas_property): /bus@f4000/ethernet@
8000000 :dmas: Could not get phandle node for (cell 0)
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Roger Quadros [Fri, 29 Sep 2023 13:46:41 +0000 (16:46 +0300)]
arm: dts: k3-am64-evm: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
Move vtt_supply and cbass_mcu node to -r5-evm.dts as
it is only required for R5 SPL.
[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tom Rini [Wed, 4 Oct 2023 14:49:30 +0000 (10:49 -0400)]
Merge tag 'u-boot-stm32-
20231004 ' of https://source.denx.de/u-boot/custodians/u-boot-stm
STM32 MCU:
_ alignment with kernel DT v6.5 for stm32f429 and stm32f746
_ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco
STM32 MPU:
_ alignment with kernel DT v6.6-rc1
_ add RNG support for stm32mp13
_ add USB, USB boot and stm32prog command support for stm32mp13
_ add support of USART1 clock for stm32mp1
_ only print RAM and board code with SPL_DISPLAY_PRINT flag for
stm32mp1
_ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
for stm32mp15xx DHCOR
[ Fix merge conflict at board/st/common/stm32mp_dfu.c ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Tue, 26 Sep 2023 15:09:23 +0000 (17:09 +0200)]
board: st: common: cleanup dfu support
split the file stm32mp_dfu.c in two files to simplify the Makefile
- stm32mp_dfu.c: required by CONFIG_SET_DFU_ALT_INFO
- stm32mp_dfu_virt.c: required by CONFIG_DFU_VIRT for stm32prog
command or VIRT device for PMIC for CONFIG_SET_DFU_ALT_INFO.
This patch also remove some remaining #ifdef CONFIG
and avoid compilation error when CONFIG_SET_DFU_ALT_INFO is not
activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Tue, 26 Sep 2023 15:09:22 +0000 (17:09 +0200)]
configs: stm32mp13: add support of usb boot
Add support of USB key boot in distro boot command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Tue, 26 Sep 2023 15:09:21 +0000 (17:09 +0200)]
configs: stm32mp13: activate command stm32prog
Activate the command stm32prog with CONFIG_CMD_STM32MPROG.
The CONFIG_SET_DFU_ALT_INFO is also activated to support
the required weak functions for the DFU virtual backen defined in
board/st/common/stm32mp_dfu.c.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 26 Sep 2023 15:09:20 +0000 (17:09 +0200)]
configs: stm32mp13: Enable USB related flags
Enable USB related flags.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fabrice Gasnier [Tue, 26 Sep 2023 15:09:19 +0000 (17:09 +0200)]
ARM: dts: stm32: force b-session-valid for otg on stm32mp135f-dk board
stm32mp135f-dk board has a type-c connector to retrieve the connection
state. For now, simply force an active peripheral mode in u-boot for
flashing.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 26 Sep 2023 15:09:18 +0000 (17:09 +0200)]
ARM: dts: stm32mp: alignment with v6.6-rc1
Device tree alignment with Linux kernel v6.6.rc1.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Mon, 2 Oct 2023 15:52:34 +0000 (17:52 +0200)]
ARM: stm32: Add dh_update_sd_to_emmc to STM32MP15xx DHCOR
Add script which installs U-Boot binaries from SD card to eMMC
and makes the eMMC bootable.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Mon, 2 Oct 2023 15:52:33 +0000 (17:52 +0200)]
ARM: stm32: Rename update_sf to dh_update_sd_to_sf on STM32MP15xx DHCOR
Align the script name with DH i.MX8MP DHCOM script name. Add
backward compatibility script to avoid breaking user scripts.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Anatolij Gustschin [Fri, 29 Sep 2023 11:34:37 +0000 (13:34 +0200)]
clk: stm32mp1: Add support for USART1 clock
Add USART1 clock parents and mux configuration. This allows
support for configuring the USART1 as the serial console in
SPL and U-Boot via device tree. Without this patch the SPL
with usart1 serial console enabled crashes because it can
not find the clock specified in the device tree for usart1.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Harald Seiler [Wed, 27 Sep 2023 12:46:25 +0000 (14:46 +0200)]
board: dh_stm32mp1: Only print board code with CONFIG_SPL_DISPLAY_PRINT
Ensure that the SoM and board code information is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Harald Seiler [Wed, 27 Sep 2023 12:44:40 +0000 (14:44 +0200)]
ram: stm32mp1: Only print RAM config with CONFIG_SPL_DISPLAY_PRINT
Ensure that the RAM configuration line is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:59 +0000 (17:27 +0200)]
ARM: dts: stm32: add RNG node for STM32MP13x platforms
Add RNG node for STM32MP13x platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:58 +0000 (17:27 +0200)]
rng: stm32: Implement custom RNG configuration support
STM32 RNG configuration should best fit the requirements of the
platform. Therefore, put a platform-specific RNG configuration
field in the platform data. Default RNG configuration for STM32MP13
is the NIST certified configuration [1].
While there, fix and the RNG init sequence to support all RNG
versions.
[1] https://csrc.nist.gov/projects/cryptographic-module-validation-program/entropy-validations/certificate/53
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:57 +0000 (17:27 +0200)]
rng: stm32: add error concealment sequence
Seed errors can occur when using the hardware RNG. Implement the
sequences to handle them. This avoids irrecoverable RNG state.
Try to conceal seed errors when possible. If, despite the error
concealing tries, a seed error is still present, then return an error.
A clock error does not compromise the hardware block and data can
still be read from RNG_DR. Just warn that the RNG clock is too slow
and clear RNG_SR.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:56 +0000 (17:27 +0200)]
rng: stm32: add RNG clock frequency restraint
In order to ensure a good RNG quality and compatibility with
certified RNG configuration, add RNG clock frequency restraint.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:55 +0000 (17:27 +0200)]
rng: stm32: Implement configurable RNG clock error detection
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:54 +0000 (17:27 +0200)]
configs: default activate CONFIG_RNG_STM32 for STM32MP13x platforms
Default embed this configuration. If OP-TEE PTA RNG is exposed, it means
that the RNG is managed by the secure world. Therefore, the RNG node
should be disabled in the device tree as an access would be denied
by the hardware firewall.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Gatien Chevallier [Tue, 19 Sep 2023 15:27:53 +0000 (17:27 +0200)]
rng: stm32: rename STM32 RNG driver
Rename the RNG driver as it is usable by other STM32 platforms
than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
CONFIG_RNG_STM32
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:33:52 +0000 (22:33 +0200)]
ARM: dts: stm32f429: put can2 in secondary mode
commit
6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.
This is a preparation patch for the upcoming support to manage CAN
peripherals in single configuration.
The addition ensures backwards compatibility.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:33:51 +0000 (22:33 +0200)]
ARM: dts: stm32: add pin map for CAN controller on stm32f4
commit
559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.
Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:33:50 +0000 (22:33 +0200)]
ARM: dts: stm32: add CAN support on stm32f429
commit
7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Fri, 25 Aug 2023 16:24:39 +0000 (18:24 +0200)]
configs: stm32f769-disco: Enable VIDEO_LOGO flag
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit
284b08fb51b6 ("board: stm32mp1: add
splash screen with stmicroelectronics logo").
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Dario Binacchi [Sun, 20 Aug 2023 16:24:46 +0000 (18:24 +0200)]
Remove the hardcoded ST logo no longer in use
The patch removes the hardcoded ST logo from the code, as it is no
longer used.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 20 Aug 2023 16:24:45 +0000 (18:24 +0200)]
board: stm32f746-disco: refactor the display of the ST logo
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit
284b08fb51b6 ("board: stm32mp1: add
splash screen with stmicroelectronics logo"). It was necessary to use a
specific logo for the stm32f746-disco board.
Furthermore, the previous version didn't properly center the logo, hiding
its upper part.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 20 Aug 2023 16:24:44 +0000 (18:24 +0200)]
configs: stm32f746-disco: limit resolution to 480x272
The patch fixes the y-resolution, which was causing the creation of a
framebuffer larger than actually needed, resulting in memory waste.
Fixes: cc1b0e7b8e55b ("board: Add display to STM32F746 SoC discovery board")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:49 +0000 (22:48 +0200)]
ARM: dts: stm32: support display on stm32f746-disco board
The patch applies the changes from Linux commit
10a970bc3ebfa ("ARM: dts:
stm32: support display on stm32f746-disco board") and removes the same
settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:48 +0000 (22:48 +0200)]
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
commit
e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.
In the schematics of document UM1907, the power supply for the micro SD
card is the same 3v3 voltage that is used to power other devices on the
board. By generalizing the name of the voltage regulator, it can be
referenced by other nodes in the device tree without creating
misunderstandings.
This patch is preparatory for future developments.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:47 +0000 (22:48 +0200)]
ARM: dts: stm32: add pin map for LTDC on stm32f7
commit
ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.
Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Raphaƫl Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:46 +0000 (22:48 +0200)]
ARM: dts: stm32: add ltdc support on stm32f746 MCU
The patch applies the changes from Linux commit
008ef8b3a1a00 ("Add LTDC
(Lcd-tft Display Controller) support") and removes the same settings
from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:45 +0000 (22:48 +0200)]
ARM: dts: stm32: add touchscreen on stm32f746-disco board
commit
f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.
The patch adds support for touchscreen on the stm32f746-disco board.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:44 +0000 (22:48 +0200)]
ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
commit
0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.
Add pin configurations for using i2c3 controller on stm32f7.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:43 +0000 (22:48 +0200)]
ARM: dts: stm32: use RCC macro for CRC node on stm32f746
commit
7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.
The patch replaces the number 12 with the appropriate numerical constant
already defined in the file stm32f7-rcc.h.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:42 +0000 (22:48 +0200)]
ARM: dts: stm32: add CAN support on stm32f746
commit
0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
* CAN1: Primary bxCAN for managing the communication between a secondary
bxCAN and the 512-byte SRAM memory.
* CAN2: Secondary bxCAN with no direct access to the SRAM memory.
This means that the two bxCAN cells share the 512-byte SRAM memory and
CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
* CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
512-byte SRAM memory.
-------------------------------------------------------------------------
| features | CAN1 | CAN2 | CAN 3 |
-------------------------------------------------------------------------
| SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte |
-------------------------------------------------------------------------
| Filters | 26 filters shared between CAN1 & CAN2 | 14 filters |
-------------------------------------------------------------------------
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:41 +0000 (22:48 +0200)]
ARM: dts: stm32: add pin map for CAN controller on stm32f7
commit
011644249686f2675e142519cd59e81e04cfc231 Linux upstream.
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Dario Binacchi [Sun, 3 Sep 2023 20:48:40 +0000 (22:48 +0200)]
dt-bindings: mfd: stm32f7: Add binding definition for CAN3
commit
8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Lee Jones <lee@kernel.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Mon, 2 Oct 2023 19:19:02 +0000 (15:19 -0400)]
Merge branch 'next_pinctrl_sync' of https://source.denx.de/u-boot/custodians/u-boot-sh
- pinctrl re-sync for Renesas chips
Tom Rini [Mon, 2 Oct 2023 17:58:20 +0000 (13:58 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Oct 2023 14:55:44 +0000 (10:55 -0400)]
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Oct 2023 14:39:59 +0000 (10:39 -0400)]
Prepare v2023.10
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Oct 2023 14:35:27 +0000 (10:35 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 1 Oct 2023 15:54:31 +0000 (11:54 -0400)]
Merge branch '2023-09-30-Kconfig-updates' into next
- Migrate one symbol from CFG to CONFIG and move where another is.
Tom Rini [Sun, 1 Oct 2023 15:54:16 +0000 (11:54 -0400)]
Merge branch '2023-09-30-assorted-build-related-changes' into next
- Assorted build cleanups / changes
Marek Vasut [Sun, 17 Sep 2023 14:13:19 +0000 (16:13 +0200)]
ARM: renesas: Align env eMMC device number with Linux 6.5.3 DT changes on R-Car Gen3 Salvator-X
Set U-Boot environment storage eMMC device number to 0, to match
the new additions to DT /aliases node pulled in alongside Linux
6.5.3 DT synchronization.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:18 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3
Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:17 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3
Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:16 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3
Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:15 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3
Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
Marek Vasut [Sun, 17 Sep 2023 14:13:14 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3
Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:13 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:12 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:11 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3
Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:10 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3
Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:09 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3
Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:08 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3
Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:07 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3
Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:06 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:05 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:04 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3
Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:03 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3
Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:02 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:01 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3
Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:41 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.5.3
Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:40 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3
Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:39 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3
Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:38 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.5.3
Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:37 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779G0 V4H clock tables with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
The PLL2_VAR is not implemented yet and PLL2 is still configured
as regular PLL2 only.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:36 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779F0 S4 clock tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:35 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.5.3
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:34 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:33 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:32 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.5.3
Synchronize R-Car R8A77980 V3H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:31 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77970 V3M clock tables with Linux 6.5.3
Synchronize R-Car R8A77970 V3M clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:30 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:29 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:28 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77951 H3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77951 H3 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:27 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7794 E2 clock tables with Linux 6.5.3
Synchronize R-Car R8A7794 E2 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:26 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7792 V2H clock tables with Linux 6.5.3
Synchronize R-Car R8A7792 V2H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:25 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7791 M2-W and R8A7793 M2-N clock tables with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:24 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7790 H2 clock tables with Linux 6.5.3
Synchronize R-Car R8A7790 H2 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:23 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779F0 S4 DT headers with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 DT headers with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:22 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77951 H3 DT headers with Linux 6.5.3
Synchronize R-Car R8A77951 H3 DT headers with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:09:39 +0000 (16:09 +0200)]
linux/compat.h: Define empty __initconst and __initdata
Introduce two new empty macros used in various static tables in Linux.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Sun, 17 Sep 2023 14:08:49 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A779G0 V4H PFC tables with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:48 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A779F0 S4 PFC tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:47 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A779A0 V3U PFC tables with Linux 6.5.3
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:46 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77995 D3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:45 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:44 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77980 V3H PFC tables with Linux 6.5.3
Synchronize R-Car R8A77980 V3H PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:43 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77970 V3M PFC tables with Linux 6.5.3
Synchronize R-Car R8A77970 V3M PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:42 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77965 M3-N PFC tables with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:41 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:40 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77951 H3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77951 H3 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:39 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A7794 E2 PFC tables with Linux 6.5.3
Synchronize R-Car R8A7794 E2 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:38 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A7792 V2H PFC tables with Linux 6.5.3
Synchronize R-Car R8A7792 V2H PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>