]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
10 years agoARM: tegra: fix "bootp" issue for Tegra124 too
Jim Lin [Fri, 24 Jan 2014 19:46:19 +0000 (12:46 -0700)]
ARM: tegra: fix "bootp" issue for Tegra124 too

Fix the timeout issue after running "bootp" command in U-Boot console.

TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a
controller reset and before RUN bit is set (per technical reference
manual).

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: add Venice2 (Tegra124) board
Tom Warren [Fri, 24 Jan 2014 19:46:18 +0000 (12:46 -0700)]
ARM: tegra: add Venice2 (Tegra124) board

These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.

This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: add DT files for Tegra124 and Venice2
Tom Warren [Fri, 24 Jan 2014 19:46:17 +0000 (12:46 -0700)]
ARM: tegra: add DT files for Tegra124 and Venice2

These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: add common (shared) CPU files
Tom Warren [Fri, 24 Jan 2014 19:46:16 +0000 (12:46 -0700)]
ARM: tegra: add common (shared) CPU files

These files are used by both SPL and main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: Add CPU (armv7) files for Tegra124
Tom Warren [Fri, 24 Jan 2014 19:46:15 +0000 (12:46 -0700)]
ARM: tegra: Add CPU (armv7) files for Tegra124

These files are for code that runs on the CPU (A15) on Tegra124 boards.
At this time, there is no A15-specific code here. The warmboot/LP0 files
aren't included as that code hasn't been ported yet.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: add SPL/AVP (arm720t) CPU files for Tegra124
Tom Warren [Fri, 24 Jan 2014 19:46:14 +0000 (12:46 -0700)]
ARM: tegra: add SPL/AVP (arm720t) CPU files for Tegra124

This provides SPL support for Tegra124 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: add/edit headers for Tegra124
Tom Warren [Fri, 24 Jan 2014 19:46:13 +0000 (12:46 -0700)]
ARM: tegra: add/edit headers for Tegra124

These headers define the Tegra124 hardware. Add them to the usual
place.

Add Tegra124 chip ID/SKU ID definitions to common headers.

There's no real HW change on Tegra124 for 90% of the toys, so it might
make sense for a future patch to unify some of the content of these
files in a common location.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: fix a typo in the tegra114.dtsi
Stephen Warren [Fri, 24 Jan 2014 19:46:12 +0000 (12:46 -0700)]
ARM: tegra: fix a typo in the tegra114.dtsi

The reg property for node spi@7000d800 was wrong. Fix it to match the
HW. This change was verified against the Linux kernel.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: only build __pinmux_nand() when it's needed
Tom Warren [Fri, 24 Jan 2014 19:46:11 +0000 (12:46 -0700)]
ARM: tegra: only build __pinmux_nand() when it's needed

__pinmux_nand() won't compile if PERIPH_ID_NDFLASH isn't defined.
Prevent this from causing build problems on newer SoCs without NAND
support (or without SW support for NAND yet), but preventing
compilation unless the function will actually be used, i.e. when
CONFIG_TEGRA_NAND is defined.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, rewrote commit description, moved ifdef around whole function
rather than just body]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: remove a conditional for CSITE rate
Stephen Warren [Fri, 24 Jan 2014 19:46:10 +0000 (12:46 -0700)]
ARM: tegra: remove a conditional for CSITE rate

There's already an SoC-specific conditional in cpu.h to determine the
PLLP rate. Define the CSITE clock rate inside the same conditional, so
that we can remove a conditional from clock_enable_coresight(). This
means one less place to update the code for new SoCs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: enable PLLX only once it's been fully configured
Stephen Warren [Fri, 24 Jan 2014 19:46:09 +0000 (12:46 -0700)]
ARM: tegra: enable PLLX only once it's been fully configured

This programming sequence is correct per Jimmy Zhang, and makes sense
too!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: pass just partition ID to power_partition()
Stephen Warren [Fri, 24 Jan 2014 19:46:08 +0000 (12:46 -0700)]
ARM: tegra: pass just partition ID to power_partition()

Pass just the partition ID to power_partition(), rather than also passing
the partition's status register mask too. This makes it simpler to get
call-sites correct, since they don't need to pass two different values
that define the same thing and must match.

Consequently, we can remove the mask definitions from pmc.h.

Suggested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: misc cleanups triggered by Tegra124 review
Stephen Warren [Fri, 24 Jan 2014 19:46:07 +0000 (12:46 -0700)]
ARM: tegra: misc cleanups triggered by Tegra124 review

Use a named constant for the PLL lock bit in enable_cpu_clocks().

Construct the complete value of pmc_pwrgate_toggle, rather than doing a
read-modify-write; the register is simple enough and doesn't need to
maintain state between operations.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agommc: tegra: support Tegra124
Stephen Warren [Fri, 24 Jan 2014 19:46:06 +0000 (12:46 -0700)]
mmc: tegra: support Tegra124

Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.

However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver to support that new compatible value.

That said, the HW differences are only relevant when enabling certain
high-performance transfer modes. Since the driver is currently very
simple and doesn't enable those modes, we don't actually need to address
any of these HW differences in the code yet, hence the simple nature of
this patch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: don't exceed AVP limits when configuring PLLP
Jimmy Zhang [Fri, 24 Jan 2014 17:37:36 +0000 (10:37 -0700)]
ARM: tegra: don't exceed AVP limits when configuring PLLP

Based on the Tegra TRM, the system clock (which is the AVP clock) can
run up to 275MHz. On power on, the default sytem clock source is set to
PLLP_OUT0. In function clock_early_init(), PLLP_OUT0 will be set to
408MHz which is beyond system clock's upper limit.

The fix is to set the system clock to CLK_M before initializing PLLP,
and then switch back to PLLP_OUT4, which has an appropriate divider
configured, after PLLP has been configured

Implement this logic in new function tegra30_set_up_pllp(),
which sets up PLLP and all PLLP_OUT* dividers, and handles the AVP
clock switching. Remove the duplicate PLLP setup from pllx_set_rate()
and adjust_pllp_out_freqs().

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
[swarren, significantly refactored the change]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: amend pmc.h for Tegra114+
Stephen Warren [Fri, 24 Jan 2014 17:23:02 +0000 (10:23 -0700)]
ARM: tegra: amend pmc.h for Tegra114+

Tegra114 and later's PMC module removes the pwrgate_timer_on register
and replaces it with a clamp_status register. Adjust pmc.h to reflect
this, and update any code affected by the change.

The cpu.c change in this patch was extracted from a much larger patch
by Jimmy Zhang. The pmc.h change was written from scratch, but inspired
by related changes made by Tom Warren.

There could well be other differences in the PMC register set for chips
after Tegra20/30. However, they don't affect the code in U-Boot at
present, so I haven't attempted an exhaustive update of pmc.h.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: implement MASK_BITS_31_29
Tom Warren [Fri, 24 Jan 2014 17:16:22 +0000 (10:16 -0700)]
ARM: tegra: implement MASK_BITS_31_29

Some clock sources have 3-bit muxes in bits 31:29. Implement core
support for this mux field.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: MASK_BITS_ no longer needs specific values
Stephen Warren [Fri, 24 Jan 2014 17:16:21 +0000 (10:16 -0700)]
ARM: tegra: MASK_BITS_ no longer needs specific values

Since all code that sets or interprets MASK_BITS_* now uses the enums
to define/compare the values, there is no need for MASK_BITS_* to have
a specific integer value. In fact, having a specific integer value may
encourage people to hard-code those values, or interpret the values in
incorrect ways.

As such, remove the logic that assigns a specific value to the enum
values in order to make it completely clear that it's just an enum, not
something that directly represents some integer value.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: use MASK_BITS_* macros everywhere
Stephen Warren [Fri, 24 Jan 2014 17:16:20 +0000 (10:16 -0700)]
ARM: tegra: use MASK_BITS_* macros everywhere

Not all code that set or interpreted "mux_bits" was using the named
macros, but rather some was simply using hard-coded integer constants.
This makes it hard to determine which pieces of code are affected by
changes to those constants.

Replace the integer constants with the equivalent macro definitions so
that everything is nicely tied together.

Note that I'm not convinced all the code was using the correct integer
constants, and hence I'm not convinced that all the code is now using
the desired macros. However, this change is a purely mechanical
replacement and should have no functional change. Fixing any bugs will
come later, separately.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: rename OUT_CLK_SOURCE_*
Stephen Warren [Fri, 24 Jan 2014 17:16:19 +0000 (10:16 -0700)]
ARM: tegra: rename OUT_CLK_SOURCE_*

OUT_CLK_SOURCE_ are currently named after the number of bits the mask
they represent includes. However, bit count is not the only possible
variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to
OUT_CLK_SOURCE_31_30_ and OUT_CLK_SOURCE4_ to OUT_CLK_SOURCE_31_28 to
more completely describe exactly what they represent, without having to
go look up the definitions.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28
Stephen Warren [Fri, 24 Jan 2014 17:16:18 +0000 (10:16 -0700)]
ARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28

The only place where the MASK_BITS_* values are used is in
adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK,
i.e. bits 31:28. Rename the MASK_BITS_ macro to reflect how it's actually
implemented.

Note that no Tegra clock register actually uses all of bits 31:28 as
the mux field. Rather, bits 30:28, 29:28, or 28 are used. However, in
those cases, nothing is stored in the bits above the mux field, so it's
safe to pretend that the mux field extends all the way to the end of the
register. As such, the U-Boot clock driver is currently a bit lazy, and
doesn't distinguish between 31:28, 30:28, 29:28 and 28; it just lumps
them all together and pretends they're all 31:28. This patch doesn't
cause this issue; it was pre-existing. Hopefully, future patches will
clean this up.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: deduplicate MASK_BITS_xxx clock mux enum
Tom Warren [Fri, 24 Jan 2014 17:16:17 +0000 (10:16 -0700)]
ARM: tegra: deduplicate MASK_BITS_xxx clock mux enum

The enum used to define the set of register bits used to represent a
clock's input mux, MUX_BITS_*, is defined separately for each SoC at
present. Move this definition to a common location to ease fixing up
some issues with the definition, and the code that uses it.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: clear $usb_need_init each boot
Stephen Warren [Thu, 23 Jan 2014 20:17:05 +0000 (13:17 -0700)]
ARM: tegra: clear $usb_need_init each boot

$usb_need_init prevents "usb start" from being run multiple times for
each boot attempt, i.e. once for USB storage, another for PXE, and
another for DHCP. However, the flag that's used to determine when to run
"usb start" is never cleared, so a subsequent "boot" command will never
probe for a freshly plugged in USB device. Fix this so that new USB
devices will be probed once per boot attempt.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: set env vars to indicate Cardhu A04 support
Stephen Warren [Thu, 23 Jan 2014 20:17:01 +0000 (13:17 -0700)]
ARM: tegra: set env vars to indicate Cardhu A04 support

The U-Boot "cardhu" build supports only revision 4 of the Cardhu board
and later compatible revisions. Hence, set $board_name in the default
environment to "cardhu-a04" rather than just "cardhu".

The Linux kernel has separate DTs for Cardhu A02 and A04, although the
former isn't really supported any more. Consequently, the kernel DT file
that matches the U-Boot cardhu build is "tegra30-cardhu-a04.dtb" rather
than "tegra30-cardhu.dtb". Set the $fdtfile default environment variable
to reflect this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoARM: tegra: accept any SKU ID for most chips
Stephen Warren [Wed, 22 Jan 2014 00:19:19 +0000 (17:19 -0700)]
ARM: tegra: accept any SKU ID for most chips

For Tegra20, the SKU ID actually impacts how U-Boot programs the chip,
and hence we need to explicitly know about each and every SKU ID in order
to operate correctly.

However, for Tegra30/114, this isn't the case. Rather than forcing each
new user with a different SKU to manually add their SKU ID into the code,
simply accept any SKU ID.

If U-Boot ever starts e.g. programming maximal CPU clocks etc., we'll
need to undo this, or make the default case map to conservative defaults,
but for now it's likely the path to least support cost.

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
10 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 29 Jan 2014 13:07:50 +0000 (14:07 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

10 years agoMerge branch 'u-boot-arm/next' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 28 Jan 2014 10:25:28 +0000 (11:25 +0100)]
Merge branch 'u-boot-arm/next' into 'u-boot-arm/master'

10 years agoboards.cfg: Keep the entries sorted
Fabio Estevam [Sat, 25 Jan 2014 20:42:39 +0000 (18:42 -0200)]
boards.cfg: Keep the entries sorted

Run "tools/reformat.py -i -d '-' -s 8 <boards.cfg >boards0.cfg && mv boards0.cfg boards.cfg"
in order to keep the entries sorted.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
10 years agoboard_r - fixup functions table after relocation
Alexey Brodkin [Mon, 20 Jan 2014 10:30:39 +0000 (14:30 +0400)]
board_r - fixup functions table after relocation

This is only required for "PIC" relocation and doesn't apply to modern
"PIE" relocation which does data relocation as well as code.

"init_sequence_r" is just an array that consists of compile-time
adresses of init functions. Since this is basically an array of integers
(pointers to "void" to be more precise) it won't be modified during
relocation - it will be just copied to new location as it is.

As a consequence on execution after relocation "initcall_run_list" will
be jumping to pre-relocation addresses. As long as we don't overwrite
pre-relocation memory area init calls are executed correctly. But still
it is dangerous because after relocation we don't expect initially used
memory to stay untouched.

Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Thomas Langer <thomas.langer@lantiq.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
10 years agoarm: am43xx: Add USB spl boot support
Dan Murphy [Thu, 16 Jan 2014 17:23:31 +0000 (11:23 -0600)]
arm: am43xx: Add USB spl boot support

Add the USB host boot support for the am43xx evm
Add the macros to boot from a usb drive in uBoot

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years agospl: common: Support for USB MSD FAT image loading
Dan Murphy [Thu, 16 Jan 2014 17:23:30 +0000 (11:23 -0600)]
spl: common: Support for USB MSD FAT image loading

Add SPL support to be able to detect a USB Mass Storage device
connected to a USB host.  Once a USB Mass storage device is detected
the SPL will load the u-boot.img from a FAT partition to target address.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years agospl: common: Move FAT funcs to a common file
Dan Murphy [Thu, 16 Jan 2014 17:23:29 +0000 (11:23 -0600)]
spl: common: Move FAT funcs to a common file

Move the FAT functions to a common location for reuse.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years agopowerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition
Masahiro Yamada [Thu, 16 Jan 2014 02:03:07 +0000 (11:03 +0900)]
powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition

We do not have to define CONFIG_MPC5xxx in board config headers
(and start.S) because it is defined in arch/powerpc/cpu/mpc5xxx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoboard: delete meaningless serial.h
Masahiro Yamada [Wed, 15 Jan 2014 09:00:25 +0000 (18:00 +0900)]
board: delete meaningless serial.h

Delete some serial.h files, whole code in which is surrounded by
  #if 0 ... #endif

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
10 years agosandbox: fix the return type of os_free() function
Masahiro Yamada [Wed, 15 Jan 2014 04:06:41 +0000 (13:06 +0900)]
sandbox: fix the return type of os_free() function

The function os_free() returns nothing.
Its return type should be "void" rather than "void *".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoARM: merge commonly-defined PLATFORM_RELFLAGS
Masahiro Yamada [Wed, 15 Jan 2014 02:00:45 +0000 (11:00 +0900)]
ARM: merge commonly-defined PLATFORM_RELFLAGS

Before this commit, all arch/arm/cpu/${CPU}/config.mk except ARMv8
had the same option:
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))

This commit moves it into arch/arm/config.mk.

If the compiler does not support the option,
it is ignored by $(call cc-option,...).
So this commit gives no harm to ARMv8.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mk
Masahiro Yamada [Wed, 15 Jan 2014 01:14:21 +0000 (10:14 +0900)]
powerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mk

Define CONFIG_MPC86xx in arch/powerpc/cpu/mpc86xx/config.mk
because all target boards with mpc86xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk
Masahiro Yamada [Wed, 15 Jan 2014 01:14:07 +0000 (10:14 +0900)]
powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk

Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk
because all target boards with mpc85xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc824x: remove redundant CONFIG_MPC824X definition
Masahiro Yamada [Wed, 15 Jan 2014 01:13:49 +0000 (10:13 +0900)]
powerpc: mpc824x: remove redundant CONFIG_MPC824X definition

We do not have to define CONFIG_MPC824X in board config headers
because it is defined in arch/powerpc/cpu/mpc824x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc5xx: remove redundant CONFIG_5xx definition
Masahiro Yamada [Wed, 15 Jan 2014 01:13:00 +0000 (10:13 +0900)]
powerpc: mpc5xx: remove redundant CONFIG_5xx definition

We do not have to define CONFIG_5xx in a source file
because it is defined in arch/powerpc/cpu/mpc5xx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc512x: remove redundant CONFIG_MPC512X definition
Masahiro Yamada [Wed, 15 Jan 2014 01:11:28 +0000 (10:11 +0900)]
powerpc: mpc512x: remove redundant CONFIG_MPC512X definition

We do not have to define CONFIG_MPC512X in board config headers
because it is defined in arch/powerpc/cpu/mpc512x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc8xx: remove redundant CONFIG_8xx definition
Masahiro Yamada [Tue, 14 Jan 2014 08:26:43 +0000 (17:26 +0900)]
powerpc: mpc8xx: remove redundant CONFIG_8xx definition

We do not have to define CONFIG_8xx in source files
because it is defined in arch/powerpc/cpu/mpc8xx/config.mk

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc83xx: remove redundant CONFIG_MPC83xx definition
Masahiro Yamada [Tue, 14 Jan 2014 08:26:17 +0000 (17:26 +0900)]
powerpc: mpc83xx: remove redundant CONFIG_MPC83xx definition

We do not have to define CONFIG_MPC83xx in board config headers
because it is defined in arch/powerpc/cpu/mpc83xx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: ppc4xx: remove redundant CONFIG_4xx definition
Masahiro Yamada [Tue, 14 Jan 2014 08:24:35 +0000 (17:24 +0900)]
powerpc: ppc4xx: remove redundant CONFIG_4xx definition

We do not have to define CONFIG_4xx in board config headers
because it is defined in arch/powerpc/cpu/ppc4xx/config.mk.

include/configs/JSE.h defines "CONFIG_4x", not "CONFIG_4xx".
I believe it is a typo because "CONFIG_4x" is not used at all
in other files.
So, I also deleted "CONFIG_4x" in include/configs/JSE.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoboard: tec-ng: Do not make directories in a board Makefile
Masahiro Yamada [Tue, 14 Jan 2014 01:55:02 +0000 (10:55 +0900)]
board: tec-ng: Do not make directories in a board Makefile

Commit e5c5301f refactored the build system not to make
directories in board makefiles.
But commit 8f380381 create directories again in
board/avionic-design/tec-ng/Makefile.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
10 years agodrivers: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:11:48 +0000 (20:11 +0900)]
drivers: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoinclude: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:11:27 +0000 (20:11 +0900)]
include: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoboard: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:11:02 +0000 (20:11 +0900)]
board: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
10 years agox86: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:10:46 +0000 (20:10 +0900)]
x86: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agopowerpc: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:10:33 +0000 (20:10 +0900)]
powerpc: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoblackfin: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:10:15 +0000 (20:10 +0900)]
blackfin: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoavr32: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:09:13 +0000 (20:09 +0900)]
avr32: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoavr32: move CONFIG_AVR32 definition to arch/avr32/config.mk
Masahiro Yamada [Mon, 6 Jan 2014 06:45:09 +0000 (15:45 +0900)]
avr32: move CONFIG_AVR32 definition to arch/avr32/config.mk

Like other architectures, CONFIG_AVR32 can be defined
in arch/avr32/config.mk rather than board header files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
10 years agoRemove obsolete _LINUX_CONFIG_H macro
Masahiro Yamada [Mon, 6 Jan 2014 06:39:48 +0000 (15:39 +0900)]
Remove obsolete _LINUX_CONFIG_H macro

Commit 643aae1406c93ddc64fcf8c136b47cdffd9c8ccd
deleted include/linux/config.h but missed to
delete _LINUX_CONFIG_H macro.
It is no longer used at all.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agotools: move kermit files to tools/kermit directory
Masahiro Yamada [Tue, 24 Dec 2013 06:30:39 +0000 (15:30 +0900)]
tools: move kermit files to tools/kermit directory

The script files, define2mk.sed and make-asm-offsets
are used to create autoconf.mk and asm-offsets.h
while build.

Whereas README, dot.kermrc, flash_param, send_cmd, send_image
are files useful for kermit.

We should not put files which have the totally different purpose
into the same directory.

This commit creates a new directory, tools/kermit,
and move kermit files into it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
10 years agocosmetic: tools/scripts/README: insert only one space between words
Masahiro Yamada [Tue, 24 Dec 2013 05:59:19 +0000 (14:59 +0900)]
cosmetic: tools/scripts/README: insert only one space between words

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agolib: fix return codes when CONFIG_SYS_VSNPRINTF is enabled
Darwin Rambo [Thu, 19 Dec 2013 23:14:19 +0000 (15:14 -0800)]
lib: fix return codes when CONFIG_SYS_VSNPRINTF is enabled

When CONFIG_SYS_VSNPRINTF is enabled, it protects print operations
such as sprintf, snprintf, vsnprintf, etc., from buffer overflows.
But vsnprintf_internal includes the terminating NULL character in
the calculation of number of characters written. This affects sprintf
and snprintf return values. Fix this issue by setting pointer 'str'
back to the location of the '\0'.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
10 years agolib: time: add weak timer_init() function
Darwin Rambo [Thu, 19 Dec 2013 23:06:12 +0000 (15:06 -0800)]
lib: time: add weak timer_init() function

If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
10 years agoam43xx_evm.h: Correct SPL max size
Tom Rini [Mon, 20 Jan 2014 13:40:07 +0000 (08:40 -0500)]
am43xx_evm.h: Correct SPL max size

Upon further inspection of relevant parts of the architecture, the
maximum SPL binary size is 220KiB.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
10 years agoDRA7: add ABB setup for MPU voltage domain
Nishanth Menon [Tue, 14 Jan 2014 18:27:29 +0000 (12:27 -0600)]
DRA7: add ABB setup for MPU voltage domain

Patch adds modification to shared omap5 abb_setup() function, and
proper registers definitions needed for ABB setup sequence. ABB is
initialized for MPU voltage domain at OPP_NOM.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
10 years agoDRA7: Add support for ES1.1 silicon ID code
Nishanth Menon [Tue, 14 Jan 2014 16:54:42 +0000 (10:54 -0600)]
DRA7: Add support for ES1.1 silicon ID code

ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support
for ES1.1 IDCODE change.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
10 years agoARM: AM335x: Enable DDR dynamic IO power down
Satyanarayana, Sandhya [Thu, 19 Dec 2013 04:30:29 +0000 (10:00 +0530)]
ARM: AM335x: Enable DDR dynamic IO power down

This patch enables dynamically powering down the
IO receiver when not performing a read on boards using DDR3.
This optimizes both active and standby power consumption.
This bit is not set on EVM SK and EVM 1.5 and later boards.
Setting the same.

This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
10 years agoARM: AM43xx: Enable DDR dynamic IO power down for DDR3
Lokesh Vutla [Thu, 19 Dec 2013 04:30:28 +0000 (10:00 +0530)]
ARM: AM43xx: Enable DDR dynamic IO power down for DDR3

This patch enables dynamically powering down the
IO receiver when not performing a read on DDR3 board.
This optimizes both active and standby power consumption.
This is derived from a patch that is done on AM335x[1]

[1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
10 years agoOMAP3: igep00x0: Convert to ti_omap3_common.h.
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:24 +0000 (21:30 +0100)]
OMAP3: igep00x0: Convert to ti_omap3_common.h.

To reduce code duplication update omap3_igep00x0.h to use ti_omap3_common.h.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
10 years agoTI: OMAP3: Create common config files for TI OMAP3 platforms.
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:23 +0000 (21:30 +0100)]
TI: OMAP3: Create common config files for TI OMAP3 platforms.

Create a new file, include/configs/ti_omap3_common.h, for everything
common to the OMAP3 SoC leaving just the board specific part to board
configuration file.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
10 years agoARM: OMAP3: Rename OMAP3_PUBLIC_SRAM_* to NON_SECURE_SRAM_*
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:22 +0000 (21:30 +0100)]
ARM: OMAP3: Rename OMAP3_PUBLIC_SRAM_* to NON_SECURE_SRAM_*

Other TI processors like am33xx, omap4 and omap5 have called these variables
as NON_SECURE_SRAM_*, shouldn't be a big problem rename these variables to
be coherent.

One reason more to rename these variables is to have the possibility of any
OMAP3 board to use the ti_armv7_common.h include as the NON_SECURE_SRAM_END
is used to define the CONFIG_SYS_INIT_SP_ADDR variable.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
10 years agoTI: armv7: Do not define the number DRAM banks if is already defined.
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:21 +0000 (21:30 +0100)]
TI: armv7: Do not define the number DRAM banks if is already defined.

If CONFIG_NR_DRAM_BANKS is not defined, we say (for simplicity) that we have
1 bank, but for some boards should be interesting that we can define
CONFIG_NR_DRAM_BANKS. To handle this possibility just define the number of
DRAM banks if is not already defined. This is useful for some OMAP3 boards
where the DRAM initialitzation is only at u-boot level.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
10 years agoTI: armv7: Move ELM support to SoC configuration file.
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:20 +0000 (21:30 +0100)]
TI: armv7: Move ELM support to SoC configuration file.

The ELM hardware engine wihich is used for ECC error detections is not present
on OMAP3 SoC, so move the CONFIG_SPL_NAND_AM33XX_BCH from ti_armv7_common.h to
SoC configuration file.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
10 years agoARM: OMAP5: Rename to ti_omap5_common.h
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:19 +0000 (21:30 +0100)]
ARM: OMAP5: Rename to ti_omap5_common.h

Follow the pattern ti_<processor family>_common.h used by other TI processors
to be coherent. So just rename omap5_common.h to ti_omap5_common.h.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
10 years agoARM: OMAP4: Rename to ti_omap4_common.h
Enric Balletbò i Serra [Fri, 6 Dec 2013 20:30:18 +0000 (21:30 +0100)]
ARM: OMAP4: Rename to ti_omap4_common.h

Follow the pattern ti_<processor family>_common.h used by other TI processors
to be coherent. So just rename omap4_common.h to ti_omap4_common.h.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
10 years agofeature-removal-schedule.txt: Drop CONFIG_SYS_ENABLE_PADS_ALL/CLOCKS_ENABLE_ALL
Tom Rini [Fri, 24 Jan 2014 16:01:56 +0000 (11:01 -0500)]
feature-removal-schedule.txt: Drop  CONFIG_SYS_ENABLE_PADS_ALL/CLOCKS_ENABLE_ALL

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoARM: OMAP4/5: Remove dead code against CONFIG_SYS_ENABLE_PADS_ALL
Jassi Brar [Tue, 7 Aug 2012 09:29:52 +0000 (14:59 +0530)]
ARM: OMAP4/5: Remove dead code against CONFIG_SYS_ENABLE_PADS_ALL

The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
10 years agoARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL
Jassi Brar [Tue, 7 Aug 2012 09:29:18 +0000 (14:59 +0530)]
ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL

The commit
 f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
10 years agoeSDHC: Calculate envaddr accroding to the address format
Haijun.Zhang [Fri, 10 Jan 2014 05:52:19 +0000 (13:52 +0800)]
eSDHC: Calculate envaddr accroding to the address format

On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.

If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoesdhc: Detecting 8 bit width before mmc initialization
Haijun.Zhang [Fri, 10 Jan 2014 05:52:18 +0000 (13:52 +0800)]
esdhc: Detecting 8 bit width before mmc initialization

The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoesdhc: Workaround for card can't be detected on T4240QDS
Haijun.Zhang [Fri, 10 Jan 2014 05:52:17 +0000 (13:52 +0800)]
esdhc: Workaround for card can't be detected on T4240QDS

Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
   For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.

This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx:Increase binary size for P, B & T series boards.
Prabhakar Kushwaha [Tue, 14 Jan 2014 06:04:26 +0000 (11:34 +0530)]
powerpc/mpc85xx:Increase binary size for P, B & T series boards.

u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.

So, Increase the u-boot binary size to 768KB.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
10 years agonet/fm: revert commit 732dfe090d50af53bb682d0c8971784f8de1f90f
Shengzhou Liu [Mon, 13 Jan 2014 07:32:24 +0000 (15:32 +0800)]
net/fm: revert commit 732dfe090d50af53bb682d0c8971784f8de1f90f

This patch reverts patch 'add ft_fixup_xgec to support 3rd and 4th 10GEC'.
When dual-role MAC acts as 10G,it still uses fsl,fman-port-1g-rx/tx as before.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
10 years agopowerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI
Prabhakar Kushwaha [Mon, 13 Jan 2014 05:58:04 +0000 (11:28 +0530)]
powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI

Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.

Also add their details in README.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agot2080qds/ddr: update ddr parameters
Shengzhou Liu [Mon, 13 Jan 2014 05:01:06 +0000 (13:01 +0800)]
t2080qds/ddr: update ddr parameters

- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
  unrelated to DDR3/3L.

Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Po Liu [Fri, 10 Jan 2014 02:10:59 +0000 (10:10 +0800)]
powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL

Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc:mpc85xx: Add ifc nand boot support for TPL/SPL
Po Liu [Fri, 10 Jan 2014 02:10:58 +0000 (10:10 +0800)]
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL

Using the TPL method for nand boot by sram was already
supported. Here add some code for mpc85xx ifc nand boot.

- For ifc, elbc, esdhc, espi, all need the SPL without
section .resetvec.
- Use a clear function name for nand spl boot.
- Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c
in spl/Makefile;

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx: Revise workaround for DDR-A003
York Sun [Wed, 8 Jan 2014 21:00:42 +0000 (13:00 -0800)]
powerpc/mpc85xx: Revise workaround for DDR-A003

Existing workaround only handles one RDIMM on reference design. In case
of two RDIMMs being used, the workaround requires two separate writes to
DDR_SDRAM_MD_CNTL register.

This patch also restores two debug registers changed by the workaround.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Ben Collins <ben.c@servergy.com>
CC: James Yang <James.Yang@freescale.com>
10 years agopowerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474
York Sun [Mon, 6 Jan 2014 20:12:33 +0000 (12:12 -0800)]
powerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474

Unfortunately a typo presents "DDR-A003473" instead of "DDR-A003474".

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/85xx: update erratum a006379
Shengzhou Liu [Mon, 6 Jan 2014 05:23:21 +0000 (13:23 +0800)]
powerpc/85xx: update erratum a006379

Enable Erratum A006379 for T2080, T2081, T4160, B4420.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t2080qds: some update for t2080qds
Shengzhou Liu [Fri, 3 Jan 2014 06:48:44 +0000 (14:48 +0800)]
powerpc/t2080qds: some update for t2080qds

- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/83xx: Add support for get_svr() for 83xx devices
Ramneek Mehresh [Fri, 3 Jan 2014 06:41:55 +0000 (12:11 +0530)]
powerpc/83xx: Add support for get_svr() for 83xx devices

Defines get_svr() for 83xx devices

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t1040qds: Update DDR initialization related settings
Priyanka Jain [Fri, 3 Jan 2014 05:54:55 +0000 (11:24 +0530)]
powerpc/t1040qds: Update DDR initialization related settings

Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
 two Chip selects.
-Update board_specific_parameters udimm structure with settings
 derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
 read at 400KHz.

Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoPrepare v2014.01
Tom Rini [Mon, 20 Jan 2014 22:52:59 +0000 (17:52 -0500)]
Prepare v2014.01

Signed-off-by: Tom Rini <trini@ti.com>
10 years agofdt_support.c: Correct linux,initrd-start/end setting
Tom Rini [Mon, 20 Jan 2014 22:45:33 +0000 (17:45 -0500)]
fdt_support.c: Correct linux,initrd-start/end setting

The change to add 64bit initrd support broke 32bit initrd support as it
always set 64bits worth of data into the properties, even on 32bit
systems.  The fix is to use addr_cell_len (which already says how much
data is in 'tmp') to set the property, rather than always setting 8.
Thanks to Stephen Warren for pointing out the fix here.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
10 years agoARM: bcm2835: fix mailbox timeout
Stephen Warren [Tue, 14 Jan 2014 02:50:12 +0000 (19:50 -0700)]
ARM: bcm2835: fix mailbox timeout

My original intention was to have a 100ms timeout. However, the timer
operations used return values in ms not us, so we ended up with a 100s
timeout instead. Fixing this exposes that some operations need longer
to operate than 100ms, so bump the timeout up to a whole second.

Reported-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
10 years agoARM: rpi_b: power on SDHCI and USB HW modules
Stephen Warren [Tue, 14 Jan 2014 02:50:11 +0000 (19:50 -0700)]
ARM: rpi_b: power on SDHCI and USB HW modules

Send RPC commands to the VideoCore to turn on the SDHCI and USB modules.
For SDHCI this isn't needed in practice, since the firmware already
turned on the power in order to load U-Boot. However, it's best to be
explicit. For USB, this is necessary, since the module isn't powered
otherwise. This will allow the kernel USB driver to work.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
10 years agospl: common: Properly ignore spl/Makefile in .gitignore
Dan Murphy [Thu, 16 Jan 2014 17:23:28 +0000 (11:23 -0600)]
spl: common: Properly ignore spl/Makefile in .gitignore

The spl directory is ignored by git as these objects are created
during spl creation.  The only file not created is the Makefile.

This file can be modified and checked in via git.

Due to the order of rule precedence having the whole directory
ignored first then indicating not to ignore the Makefile is not correct
the message to force adding the Makefile is still shown.

So reorder the .gitignore for the Makefile and indicate that the Makefile
does not need to be ignored first and then indicate everything else in spl
should be ignored after wards.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years ago.gitignore: ignore u-boot.elf and tools/relocate-rela
Masahiro Yamada [Tue, 14 Jan 2014 01:39:34 +0000 (10:39 +0900)]
.gitignore: ignore u-boot.elf and tools/relocate-rela

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoyaffs2: Remove block number check from summary verification
Charles Manning [Mon, 20 Jan 2014 02:51:59 +0000 (15:51 +1300)]
yaffs2: Remove block number check from summary verification

The summary already has other verification. This one is not needed.

The check caused summaries to be ignored if they were not on the
numbered block. This caused problems when a summary was embedded in an
image and the image is written to a flash with bad blocks.

Signed-off-by: Charles Manning <cdhmanning@gmail.com>
10 years agoext4fs: fix "invalid extent block" error
Ionut Nicu [Mon, 13 Jan 2014 11:00:08 +0000 (12:00 +0100)]
ext4fs: fix "invalid extent block" error

For files where we actually have extent indexes following
an extent header (ext_block->eh_depth != 0), the do/while
loop from ext4fs_get_extent_block() does not select the
proper extent index structure.

For example, if we have:

ext_block->eh_depth = 1
ext_block->eh_entries = 1
fileblock = 0
index[0].ei_block = 0

the do/while loop will exit with i set to 0 and the
ext4fs_get_extent_block() function will return 0, even if
there was a valid extent index structure following the
header.

Signed-off-by: Ionut Nicu <ioan.nicu.ext@nsn.com>
Signed-off-by: Mathias Rulf <mathias.rulf@nsn.com>
10 years agoext4fs: use EXT2_BLOCK_SIZE instead of fs->blksz
Ionut Nicu [Mon, 13 Jan 2014 10:59:24 +0000 (11:59 +0100)]
ext4fs: use EXT2_BLOCK_SIZE instead of fs->blksz

Using fs->blksz in ext4fs_get_extent_block() is not
correct since fs->blksz is not initialized on the
read path. Use EXT2_BLOCK_SIZE() instead which will
produce the desired output.

Signed-off-by: Ionut Nicu <ioan.nicu.ext@nsn.com>
Signed-off-by: Mathias Rulf <mathias.rulf@nsn.com>
10 years agoboard:universal: fix i2c adapter
Piotr Wilczek [Tue, 14 Jan 2014 07:15:07 +0000 (08:15 +0100)]
board:universal: fix i2c adapter

Universal uses only one adapter I2C_0.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
10 years agofs/ext4: fix calling put_ext4 with truncated offset
Ma Haijun [Wed, 8 Jan 2014 00:15:33 +0000 (08:15 +0800)]
fs/ext4: fix calling put_ext4 with truncated offset

Curently, we are using 32 bit multiplication to calculate the offset,
so the result will always be 32 bit.
This can silently cause file system corruption when performing a write
operation on partition larger than 4 GiB.

This patch address the issue by simply promoting the terms to 64 bit,
and let compilers decide how to do the multiplication efficiently.

Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
10 years agofs/ext4: fix partition size get truncated in calculation
Ma Haijun [Tue, 7 Jan 2014 22:49:43 +0000 (06:49 +0800)]
fs/ext4: fix partition size get truncated in calculation

It may cause file system corruption when do a write operation.
This issue only affects boards that use 32 bit lbaint_t.

Signed-off-by: Ma Haijun <mahaijuns@gmail.com>