Tom Rini [Fri, 15 Apr 2022 12:04:16 +0000 (08:04 -0400)]
Merge branch '2022-04-14-assorted-updates'
- Apple M1 Ultra support, TI power domain fix, atsha204a big endian
support, LED cleanups and support for default-state, increase malloc
pool on sandbox, ubifs bugfix, further serial cleanup / semihost
support, fix a few cases around enabling/disabling FS support in SPL,
clean up duplication of table_compute_checksum()
fs: Allow to compile CMD_UBIFS when SPL is enabled
Currently there is no UBIFS support in SPL. But macro CONFIG_CMD_UBIFS is
defined also when building SPL. when both CMD_UBIFS and SPL are enabled
then build process throw compile error.
Fix check for ubifs code in fstypes[] to allow compiling CMD_UBIFS only in
proper U-Boot.
Tom Rini [Mon, 4 Apr 2022 18:43:51 +0000 (14:43 -0400)]
Remove duplication of table_compute_checksum function
It seems like there was some merge error when first cleaning up and
sharing this function. We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).
Fixes: 1befb38b8682 ("x86: Move table csum into separate file") Fixes: 2b445e4d3194 ("x86: Move table csum into separate header") Cc: Alexander Graf <agraf@csgraf.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Sean Anderson [Mon, 4 Apr 2022 18:18:00 +0000 (14:18 -0400)]
serial: smh: Implement puts for DM
This adds an implementation of puts for DM. The implementation is not as
clean as for the non-DM puts because we have to handle non-nul-terminated
string. We also handle short writes (though these are probably very
unusual).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Mon, 4 Apr 2022 18:17:59 +0000 (14:17 -0400)]
test: serial: Add test for putc/puts
This adds a test to ensure that puts is equivalent to putc called in a
loop. We don't verify the contents of the message to avoid having to
record console output a second time (though that could be added in the
future). The globals are initialized to non-zero values to avoid a
warning; in particular, the character count is off-by-one (but we always
make relative measurements).
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 4 Apr 2022 18:17:58 +0000 (14:17 -0400)]
serial: sandbox: Implement puts
This implements puts for sandbox. It is fairly straightforward, except
that we break out the shared color printing functionality into its own
function.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 4 Apr 2022 18:17:57 +0000 (14:17 -0400)]
serial: Fix _serial_puts using \n\r instead of \r\n
A string like "test\n" would be broken up into the following sequence of
prints by _serial_puts:
puts("test\n")
putc('\r')
Although functionally this is the same as \r\n, it is not the standard
sequence and caused tests to fail. Fix this by excluding the '\n' from
the initial print. The above string will now be broken up like
puts("test")
puts("\r\n")
Since we may now need to call ops->puts twice (with the associated retry
logic), break that part of the function off into a helper.
Fixes: 7a76347189 ("serial: dm: Add support for puts") Signed-off-by: Sean Anderson <sean.anderson@seco.com>
cmd: ubi.c: skip part command if right partition is already attached
Attaching a UBI partition may take a while, since scanning the memory is
required.
It thus makes sense to avoid a detach/scan/attach cycle when the right
partition is already attached, and let the calling process call 'detach'
beforehand if it needs it.
This commit checks for the currently attached UBI partition, and skips
reattaching if not needed, showing an information.
Marek Vasut [Sun, 3 Apr 2022 23:23:27 +0000 (01:23 +0200)]
led: Configure LED default-state on boot
In case the DT LED subnode contains "default-state" property set to
either "on" or "off", probe the LED driver and configure the LED state
automatically.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
[trini: Update the relevant test now that we have support] Signed-off-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Sun, 3 Apr 2022 23:18:07 +0000 (01:18 +0200)]
led: gpio: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
Marek Vasut [Sun, 3 Apr 2022 23:18:06 +0000 (01:18 +0200)]
led: cortina: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
Marek Vasut [Sun, 3 Apr 2022 23:18:05 +0000 (01:18 +0200)]
led: bcm6858: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
Marek Vasut [Sun, 3 Apr 2022 23:18:04 +0000 (01:18 +0200)]
led: bcm6358: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
Marek Vasut [Sun, 3 Apr 2022 23:18:03 +0000 (01:18 +0200)]
led: bcm6328: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
Marek Vasut [Sun, 3 Apr 2022 23:18:02 +0000 (01:18 +0200)]
led: Move OF "label" property parsing to core
Every driver in drivers/led/ currently does some form of "label" OF
property parsing in its bind() callback. Move this label parsing to
LED core, since this "label" OF property is a generic property. This
permits code deduplication in subseuqent patches.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com>
Dave Gerlach [Sat, 2 Apr 2022 01:02:48 +0000 (20:02 -0500)]
power: domain: ti: Extend use of PTCMD and PTSTAT registers for high PDs
It is possible for power domain IDs to be great than 31. If this
happens, the PTCMD and PTSTAT registers must overflow into adjacent
corresponding PTCMD_H and PTSTAT_H registers for each. Update the driver
to account for this.
Tom Rini [Thu, 14 Apr 2022 15:34:47 +0000 (11:34 -0400)]
sandbox: Increase default SYS_MALLOC_LEN
Increase the malloc pool on sandbox in order to avoid spurious errors
such as:
___________________ test_ut[ut_dm_dm_test_video_comp_bmp32] ____________________
test/py/tests/test_ut.py:43: in test_ut
assert output.endswith('Failures: 0')
E AssertionError: assert False
E + where False = <built-in method endswith of str object at 0x7f5de85efb20>('Failures: 0')
E + where <built-in method endswith of str object at 0x7f5de85efb20> = 'Test: dm_test_video_comp_bmp32: video.c\r\r\nSDL renderer does not exist\r\r\ntest/dm/video.c:86, compress_frame_buff..._test_video_comp_bmp32(): 2024 == compress_frame_buffer(uts, dev): Expected 0x7e8 (2024), got 0x1 (1)\r\r\nFailures: 2'.endswith
Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tim Harvey [Fri, 18 Feb 2022 23:19:33 +0000 (15:19 -0800)]
board: gateworks: venice: add imx8mm-gw7903 support
The GW7903 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD socket with voltage select support
- Gateworks System Controller
- M.2 A-E Socket with USB2.0 and PCIe
- MiniPCIe Socket with PCIe, USB2.0, and SIM
- IMX8M FEC
- RS232/RS485/RS422 serial transceiver
- LIS2DE12 3-axis accelerometer
- front panel LED's
- off-board isolated digital I/O
- Wide range DC power input
- 802.3at PoE
- PMIC
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Tue, 12 Apr 2022 22:41:10 +0000 (00:41 +0200)]
clk: imx8mp: Fix 24M and 32k clock
Fix registration of 24M and 32k clock, those got applied or rebased
incorrectly, so fill in the correct code.
Fixes: 7a2c3be95a5 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com>
Marek Vasut [Tue, 12 Apr 2022 22:40:26 +0000 (00:40 +0200)]
ARM: imx: Get rid of only i.MX8M SMCCC arch call
This is the only place where i.MX8M code does SMCCC call, remove it.
The output has little value as it prints some part of commit ID, and
worse, if there is no SMC handler installed, the code outright hangs
or crashes the system.
By removing this one instance of SMCCC call, U-Boot no longer depends
on SMC handlers and can boot without hanging in any case. If there is
a need to dump this commit ID, use CMD_SMC instead and do 'smc' call
from U-Boot shell or scripts instead of hard-coding SMCCC dependency
into architecture code. This particular code can be replaced by:
=> smc 0xc2000003 0 0 0 0 0 0
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Marek Vasut [Fri, 8 Apr 2022 00:15:01 +0000 (02:15 +0200)]
ARM: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo board
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo.
The board is a compatible replacement for i.MX53 M53Menlo and features
USB, multiple UARTs, ethernet, LEDs, SD and eMMC.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Jesse Taube [Thu, 17 Mar 2022 18:33:18 +0000 (14:33 -0400)]
clk: imxrt: Use dts for anatop base address
In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.
Marek Vasut [Wed, 9 Mar 2022 16:09:45 +0000 (17:09 +0100)]
ARM: imx: romapi: Repair FlexSPI NOR boot offset
The FlexSPI NOR boot offset does not require any special handling,
the image_offset is correct in either case (0x1000 for FlexSPI NOR
and 0x8000 for SD/eMMC) and the offset of u-boot.itb from the start
of flash.bin is always 0x58000 on MX8MN/MX8MP, which matches the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000 in case
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300, which is always the
case on MX8MN/MX8MP.
The CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is really overloaded in
case of the MX8MN/MX8MP, but fixing that needs additional plumbing.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Wed, 9 Mar 2022 03:18:57 +0000 (04:18 +0100)]
spi: nxp_fspi: Add i.MX8MP compatible string
The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one
another, however the linux kernel DT uses separate compatible string
for each SoC. Add the missing i.MX8MP compatible into this driver.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Tue, 12 Apr 2022 15:26:01 +0000 (17:26 +0200)]
ARM: dts: imx: Add support for Data Modul i.MX8M Mini eDM SBC
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.
Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
iopoll: Extend read_poll_timeout macro to support variable parameters
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.
phy: nxp-c45-tja11xx: Rename functions to be c45 tja11xx specific
This driver supports NXP C45 TJA11XX PHYs, but there're also other NXP
TJA11XX PHYs. Let's rename functions in this driver to be c45 variant
specific, so further drivers can be introduced adding support for NXP
TJA11XX PHYs.
Peng Fan [Sun, 10 Apr 2022 04:18:27 +0000 (12:18 +0800)]
imx8mq: soc: Set the BYPASS ID SWAP bit (GPR10 bit 1)
Set the BYPASS ID SWAP bit (GPR10 bit 1).
The ID SWAP function randomly make TZASC grant non-secure access to
secure memory. TZASC ID SWAP should be bypassed by setting the bit
TZASC_ID_SWAP_BYPASS(bit 1) in IOMUX_GPR10 register.
Turns out on certain carrier boards (e.g. Iris V2) and under certain
circumstances (e.g. after a software reset) the SD card may have been
left in a strange state which later failed as follows:
Colibri iMX6ULL # mmc dev 0
Card did not respond to voltage select! : -110
Fix this as follows:
- Re-name the signaling voltage rail regulator from vmmc to vqmmc.
- Fix the name of the GPIO property to gpios.
- Specify 4-bit bus width, no write-protect capability and no 1.8
volt signaling voltage capability.
- Fix the clock vs. command pull-up vs. push-pull configuration.
Now that it is possible to use regulator-fixed-clock make use
of it. This makes U-Boot detect the PHY on first cold-boot.
This commit also adjusts the code in setup_fec and follows
how it is done in mx6ullevk.c
This commit also slows down the boot-process by about 150ms
as it now waits for the regulator-fixed-clock voltage that
drives the PHY to go up.
If you rely on very fast boot-speeds and don't need ethernet
for your boot-process you can safely revert the changes on
imx6ull-colibri.dtsi
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
board: colibri-imx6ull: Do not leave variant variable unset
Toradex uses the variable variant to distinguish between modules with
eMMC, NAND with wifi and NAND without wifi.
This variable is set on every boot. Set this variable also if we have a
NAND module without wifi to prevent issues.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Rename board_early_init_f() to board_early_init(), since this function
has nothing to do with actual board_early_init_f() as used throughout
U-Boot. The board_early_init() is function local to this board used to
configure UART and WDT pinmux. Wrap init_uart_clk() into this function
so that early UART init would be all in one place. Turn the function
into __weak one, so it could be overridden in case custom carrier board
uses different UART or needs custom IOMUX settings.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Ye Li [Thu, 7 Apr 2022 07:55:56 +0000 (15:55 +0800)]
imx8m: soc: Relocate u-boot to the top DDR in 4GB space
The EFI memory init uses gd->ram_top for conventional memory. In
current implementation, the ram_top is below optee address. This cause
grub failed to allocation memory for initrd.
The change updates DDR bank setup functions to place the u-boot at top
DDR in 4GB space.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 7 Apr 2022 07:55:54 +0000 (15:55 +0800)]
imx: imx8m: soc: runtime drop extcon property from usbotg node
The extcon is an decrepted property and not used by upstream Linux and
NXP 5.10 kernel, so we remove it before kicking linux in case it is in
dts. Otherwise distro kernel will not able to have usb function.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 7 Apr 2022 07:55:53 +0000 (15:55 +0800)]
imx: imx8mp: disable fused IP for UltraLite
Beside the fused modules on iMX8MP Lite, this part has also fused
GPU3D/2D, LVDS and MIPI DSI.
So we have to disable them for kernel and also disable MIPI DSI
in u-boot DTS for splash screen at runtime.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Wait 1ms before issuing the first MRS command to write DDR3 Mode
registers.
There is a requirement to wait a minimum time before issuing command to
the DDR3 device, according to the JEDEC standard this time is 500us
(after RESET_n is de-asserted until CKE becomes active) + tXPR (Reset
CKE Exit time, maximum value 360ns).
It seems that for some reason this is not enforced by the MMDC
controller.
Without this change we experienced random memory initialization failures
with about 2% boot failure rate on specific problematic boards, after
this change we were able to do more than 10.000 power-cycle without a
single failure.
Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
mx6: ddr: Restore ralat/walat in write level calibration
The current DDR write level calibration routine always overwrite
the ralat/walat fields to their maximum value, just save
the existing values at the beginning of the calibration routine
and restore it at the end.
In case the delay is estimated by the user to be more than one cycle the
walat should be configured according to that, this is not
automatically done. From the i.MX6 RM:
The user should read the results of the associated delay-line at
MPWLDECTRL#[WL_DL_ABS_OFFSET#] and in case the user estimates that the
reasonable delay may be above 1 cycle then the user should indicate it at
MPWLDECTRL#[WL_CYC_DEL#]. Moreover the user should indicate it in
MDMISC[WALAT] field. For example, if the result of the write leveling calibration
is 100/256 parts of a cycle, but the user estimates that the delay is above 2 cycles
then MPWLDECTRL#[WL_CYC_DEL#] should be configured to 2, so the total
delay will be 2 and 100/256 parts of a cycle
Probably it would just possible to not overwrite the mdmisc register in
the first place, since this is not present in the write_level_calib() example
in NXP AN4467 nor in the i.MX6 RM (44.11.6.1 Hardware Write Leveling
Calibration).
Fixes: d339f16911c7 ("arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
Peng Fan [Wed, 6 Apr 2022 06:30:31 +0000 (14:30 +0800)]
misc: imx8ulp: Update fuse driver
- According to S400 API, the fuse bank 25 (Testconfig2) is able to
access. Add it into driver's mapping table.
- According to FSB words list, the reserved 48 words are ahead of
the bank 5 and bank 6. Fix the wrong position.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 6 Apr 2022 06:30:27 +0000 (14:30 +0800)]
imx: imx8ulp: enable wdog_ad interrupt in CMC1
Enable wdog_ad interrupt being triggered by CMC1 to CM33 to let CM33
know A35 reset and reinitialize rpmsg.
Clear wdog_ad and AD_PERIPH reset interrupt after A35 up, otherwise
M33 will always receive interrupt.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 6 Apr 2022 06:30:23 +0000 (14:30 +0800)]
imx: imx8ulp_evk: call the handshake with M33
If M33 handshake is successful, TPM and DSI panel MUX setting is
done by M33, no need to set them.
If handshake is failed or M33 is not booted, continue the TPM
and DSI panel MUX setting
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 6 Apr 2022 06:30:17 +0000 (14:30 +0800)]
imx: imx8ulp: Change LPAV assignment for dual boot
Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
to APD. So except the masters and peripherals, other resources
(like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.
No needs to initialize DDR again after reboot.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
projects / u-boot.git / log