]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
4 years agoRevert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
Tom Rini [Fri, 24 Jul 2020 12:42:06 +0000 (08:42 -0400)]
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"

This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing
changes made to 56d37f1c564107e27d873181d838571b7d7860e7.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm
Tom Rini [Thu, 23 Jul 2020 19:56:06 +0000 (15:56 -0400)]
Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements

4 years agoMerge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 23 Jul 2020 12:57:35 +0000 (08:57 -0400)]
Merge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (5)

The series provides bug fixes for:

* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation

The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)

Logging is enabled in the bootefi command.

4 years agoMerge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Wed, 22 Jul 2020 15:30:52 +0000 (11:30 -0400)]
Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;

4 years agorockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG
Jagan Teki [Tue, 21 Jul 2020 15:28:09 +0000 (20:58 +0530)]
rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG

Disable ram rockchip debug driver for ROCKPi N8/N10 boards
since we have verified ram in many instances with respective
U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10
Jagan Teki [Tue, 21 Jul 2020 15:28:08 +0000 (20:58 +0530)]
arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10

Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able
to boot from eMMC and SDMMC in order.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-n10: Enable PCI/NVME
Jagan Teki [Tue, 21 Jul 2020 15:28:07 +0000 (20:58 +0530)]
rockchip: rock-pi-n10: Enable PCI/NVME

Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-n8: Enable on board devices
Suniel Mahesh [Tue, 21 Jul 2020 15:24:43 +0000 (20:54 +0530)]
rockchip: rock-pi-n8: Enable on board devices

Enable common on board devices for ROCKPi N8.

- USB 2.0 Host
- USB 2.0 OTG/Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: evb_rk3288: Add console settings
Suniel Mahesh [Tue, 21 Jul 2020 15:24:42 +0000 (20:54 +0530)]
rockchip: evb_rk3288: Add console settings

Add console settings like stdin, stdout and stderr as
usbkbd and vidconsole respectively for evb-rk3288 targets.

This would certainly help to detect the attached video
devices (like HDMI) and print the console messages on display.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-n10: Enable on board devices
Suniel Mahesh [Tue, 21 Jul 2020 15:24:41 +0000 (20:54 +0530)]
rockchip: rock-pi-n10: Enable on board devices

Enable common on board devices for ROCKPi N10.

- USB 2.0 Host
- USB 3.0 Host
- USB 3.0 Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add PCIe for RockPI N10
Jagan Teki [Tue, 21 Jul 2020 15:24:40 +0000 (20:54 +0530)]
arm64: dts: rockchip: Add PCIe for RockPI N10

This patch adds support to enable PCIe for RockPI N10.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rockchip: Add HDMI out for RockPI N8/N10
Jagan Teki [Tue, 21 Jul 2020 15:24:39 +0000 (20:54 +0530)]
arm: dts: rockchip: Add HDMI out for RockPI N8/N10

This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Add USB for RockPI N8/N10
Jagan Teki [Tue, 21 Jul 2020 15:24:38 +0000 (20:54 +0530)]
ARM: dts: rockchip: Add USB for RockPI N8/N10

Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.

This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.

Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Add usb host0 ohci node for rk3288
Jagan Teki [Tue, 21 Jul 2020 15:24:37 +0000 (20:54 +0530)]
ARM: dts: rockchip: Add usb host0 ohci node for rk3288

rk3288 and rk3288w have a usb host0 ohci controller.

Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.

So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rockchip: Sync rk3288 dtsi from linux
Suniel Mahesh [Tue, 21 Jul 2020 15:24:36 +0000 (20:54 +0530)]
arm: dts: rockchip: Sync rk3288 dtsi from linux

This sync has changes required to use HDMI CEC pin in U-Boot.

Sync dts from linux v5.8-rc5 commit:
"ARM: dts: rockchip: define the two possible rk3288 CEC pins"
(sha1: 838980dd04e994bf81cf104fa01ae60802146b39)

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux
Jagan Teki [Tue, 21 Jul 2020 15:24:35 +0000 (20:54 +0530)]
ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux

Sync ROCKPi N8/N10 dts(i) changes from Linux.

commit <afd9eb880414> ("ARM: dts: rockchip: Add Radxa Rock Pi N8 initial
support")

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y
Jagan Teki [Tue, 21 Jul 2020 15:06:04 +0000 (20:36 +0530)]
rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y

ROC-RK3399-PC has specific set of configurations for
on-board led setup.

Due to easiness for user to know the state of the board
roc-rk339-pc board code will setup the low power led
on/off, and waiting for user to press power key and then
glow full power led.

All this needs to happen only during power-on-reset not
for soft reset or WDT.

Also, it is not a proper usage to ask the user to press
the Power key if the board connected remotely, so add
the environment variable 'pwr_key' to check as well.

So, user need to press Power key only
- during POR
- pwr_key=y

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Separate the reset cause from display cpuinfo
Jagan Teki [Tue, 21 Jul 2020 15:06:03 +0000 (20:36 +0530)]
rockchip: Separate the reset cause from display cpuinfo

reset cause is a generic functionality based on the soc
cru registers in rockchip. This can be used for printing
the cause of reset in cpuinfo or some other place where
reset cause is needed. 

Other than cpuinfo, reset cause can also be using during
bootcount for checking the specific reset cause and glow
the led based on the reset cause.

So, let's separate the reset cause code from cpuinfo, and
add a check to build it for rk3399, rk3288 since these two
soc are supporting reset cause as of now.

Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Don't clear the reset status reg
Jagan Teki [Tue, 21 Jul 2020 15:06:02 +0000 (20:36 +0530)]
rockchip: Don't clear the reset status reg

reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.

Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.

However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: tpl: Remove board_early_init_f()
Kever Yang [Wed, 22 Jul 2020 12:26:30 +0000 (20:26 +0800)]
rockchip: tpl: Remove board_early_init_f()

There is no need for board_early_init_f() in TPL, anything like this
should goes to SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Add custom led_setup()
Jagan Teki [Tue, 21 Jul 2020 15:06:01 +0000 (20:36 +0530)]
rockchip: roc-rk3399-pc: Add custom led_setup()

roc-rk3399-pc has some specific requirements to support LEDS,
environment. board detection and etc prior to U-Boot proper.

So as of now SPL would be a better stage for these custom board
requirements to support unlike TPL. Adding few of these custom
requirements like LEDS in TPL would require extra code pulling
and also the size of TPL can grow.

So, this patch moves the leds code from TPL into SPL Board init
led_setup code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(split tpl.c change as separate patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: Add weak led_setup()
Jagan Teki [Tue, 21 Jul 2020 15:06:00 +0000 (20:36 +0530)]
rockchip: rk3399: Add weak led_setup()

Add weak led_setup() so that board which has an uncommon
led setup code that can make use of custom implementation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3288: Add OF board setup
Jagan Teki [Tue, 21 Jul 2020 06:46:38 +0000 (12:16 +0530)]
rockchip: rk3288: Add OF board setup

The new rk3288 revision rk3288w has some changes with respect
to legacy rk3288 like hclk_vio in cru and usb host0 ohci.

Linux clock driver already handle this via rockchip,rk3288w-cru
compatible.

USB ohci host can enable via dts for rk3288w based boards.

So, add fdt board setup code to update cru compatible with
rk3288w-cru compatible if the SOC revision is RK3288W.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Add rk3288 SoC detection helper
Jagan Teki [Tue, 21 Jul 2020 06:46:37 +0000 (12:16 +0530)]
rockchip: Add rk3288 SoC detection helper

Rockchip SoC's has a new revision chip for rk3288 SoCs.

RK3288 has a new revision chip called RK3288W which is similar
but different hclk_vio clock and fixed OHCI host.

Add common Rockchip SoC detection helper to support this rk3288w
detection.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Jagan Teki [Mon, 20 Jul 2020 18:55:49 +0000 (00:25 +0530)]
arm64: dts: rockchip: Add Radxa ROCK Pi 4C support

Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.

So, add or enable difference nodes/properties in 4C dts
by including common dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add ROCKPi 4A/4B support
Jagan Teki [Mon, 20 Jul 2020 18:55:48 +0000 (00:25 +0530)]
arm64: dts: rockchip: Add ROCKPi 4A/4B support

Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.

- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
  GPIO pin change compared to 4B, 4C

So move common nodes, properties into dtsi file and include
on respective variant dts files.

Use 4B dts into default rock-pi-4 defconfig until we find any
solution for dynamic detection of these variants.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: firefly-rk3399: enable CONFIG_USB_DWC3
Kever Yang [Wed, 22 Jul 2020 11:46:19 +0000 (19:46 +0800)]
rockchip: firefly-rk3399: enable CONFIG_USB_DWC3

To fix below build error:
drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy'
drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: Add default env to support compressed kernel Image
Kever Yang [Sat, 18 Jul 2020 14:45:19 +0000 (22:45 +0800)]
rockchip: rk3399: Add default env to support compressed kernel Image

Add default kernel_comp_addr_r and kernel_comp_size to support boot
from compressed kernel Image, this space is temporarily used during
decompress according to README.distro.

Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: sdram: fix dram_init_banksize
Alex Bee [Tue, 14 Jul 2020 23:03:31 +0000 (01:03 +0200)]
rockchip: sdram: fix dram_init_banksize

Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board
if CONFIG_SPL_OPTEE is set. This is troublesome when booting a
linux kernel since this size will be injected in FDT of the kernel.

gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE)
must not be taken into consideration for calculation of second bank
size, since this offset is already included in calculation of "top".

After applying this patch 992 MB (1024 MB - 32 MB reserved for
optee-os) is correctly calculated and has also been verified on
2 GB boards.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agopci: rockchip: Drop legacy PHY driver
Jagan Teki [Thu, 9 Jul 2020 18:11:03 +0000 (23:41 +0530)]
pci: rockchip: Drop legacy PHY driver

Drop the legacy PHY driver and it's associated code since
the PHY handling driver now part of Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agopci: rockchip: Switch to generic-phy
Jagan Teki [Thu, 9 Jul 2020 18:11:02 +0000 (23:41 +0530)]
pci: rockchip: Switch to generic-phy

Now, we have a PCIe PHY driver as part of the Generic
PHY framework. Let's use it instead of legacy PHY driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agophy: Add Rockchip PCIe PHY driver
Jagan Teki [Thu, 9 Jul 2020 18:11:01 +0000 (23:41 +0530)]
phy: Add Rockchip PCIe PHY driver

Add the Rockchip PCIe PHY driver as part of
Generic PHY framework.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUG
Jagan Teki [Mon, 13 Jul 2020 20:06:35 +0000 (01:36 +0530)]
rockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUG

Disable ram rockchip debug driver for roc-rk3399-pc
boards since we have verified ram in many instances
with respective U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set
Kever Yang [Mon, 20 Jul 2020 10:34:12 +0000 (18:34 +0800)]
rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set

The empty function define should not be in the header file, or else the
build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG
is disabled.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: Mark existing prints via RAM_ROCKCHIP_DEBUG
Jagan Teki [Mon, 13 Jul 2020 20:06:34 +0000 (01:36 +0530)]
ram: rk3399: Mark existing prints via RAM_ROCKCHIP_DEBUG

Right now all these debug statements are printing on the
console to make sure proper dram initialization happens.  

Mark them into RAM_ROCKCHIP_DEBUG would be more meaningful
and work like before since the RAM_ROCKCHIP_DEBUG is by
default yet.

No functionality changes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: Drop debug stride in driver
Jagan Teki [Mon, 13 Jul 2020 20:06:33 +0000 (01:36 +0530)]
ram: rk3399: Drop debug stride in driver

stride debug is already present in sdram_common.c via
RAM_ROCKCHIP_DEBUG.

So, drop the redundant debug stride code in rk3399 driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock64-rk3328_defconfig: Add SPI Flash support
Johannes Krottmayer [Wed, 8 Jul 2020 22:50:34 +0000 (00:50 +0200)]
rockchip: rock64-rk3328_defconfig: Add SPI Flash support

Add U-Boot SPI Flash support for the PINE64 Rock64 board

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rk3328-rock64: Add SPI Flash support
Johannes Krottmayer [Wed, 8 Jul 2020 22:50:33 +0000 (00:50 +0200)]
ARM: dts: rk3328-rock64: Add SPI Flash support

Add U-Boot SPI Flash support for the PINE64 Rock64 board

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rk3328: Add SPI support
Johannes Krottmayer [Wed, 8 Jul 2020 21:57:40 +0000 (23:57 +0200)]
ARM: dts: rk3328: Add SPI support

Add U-Boot SPI support for the RK3328

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(fix checkpatch error for code ident)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agodrivers: spi: rk_spi: Add support for RK3328
Johannes Krottmayer [Wed, 8 Jul 2020 21:57:39 +0000 (23:57 +0200)]
drivers: spi: rk_spi: Add support for RK3328

Add support for the RK3328 SPI controller

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agodrivers: clk: rockchip: clk_rk3328: Add SPI support
Johannes Krottmayer [Wed, 8 Jul 2020 21:57:38 +0000 (23:57 +0200)]
drivers: clk: rockchip: clk_rk3328: Add SPI support

Add SPI support for the RK3328 clock driver

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Update ENV offset, size
Jagan Teki [Tue, 7 Jul 2020 13:50:49 +0000 (19:20 +0530)]
rockchip: roc-rk3399-pc: Update ENV offset, size

Adjust the ENV offset, size to fit into all images
on 16MB flash.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: roc-rk3399-pc: Enable USB Gadget
Jagan Teki [Tue, 7 Jul 2020 13:50:48 +0000 (19:20 +0530)]
rockchip: roc-rk3399-pc: Enable USB Gadget

Enable DWC3 core, gadget for roc-rk3399-pc board.

This would help to use fastboot by default.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-4: Enable HDMI output
Jagan Teki [Tue, 7 Jul 2020 13:50:47 +0000 (19:20 +0530)]
rockchip: rock-pi-4: Enable HDMI output

Enable config options to get HDMI output on RockPI-4 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-4: Enable USB Gadget
Jagan Teki [Tue, 7 Jul 2020 13:50:46 +0000 (19:20 +0530)]
rockchip: rock-pi-4: Enable USB Gadget

Enable USB gadget for rock-pi-4 boards.

This would help to use fastboot by default.

Note: Connect the Host USB cable (Port A or C) to rock-pi-4
Upper USB 3.0 port.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-4: Enable PCI/NVME
Jagan Teki [Tue, 7 Jul 2020 13:50:45 +0000 (19:20 +0530)]
rockchip: rock-pi-4: Enable PCI/NVME

Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 2B2QEXM7 Prod: S4EUNG0MC10012Y
            Type: Hard Disk
            Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)

Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rock-pi-4: Enable USB3 Host
Jagan Teki [Tue, 7 Jul 2020 13:50:44 +0000 (19:20 +0530)]
rockchip: rock-pi-4: Enable USB3 Host

Enable USB3.0 Host support for RockPI-4 boards.

Note that the Upper USB3.0 port is marked as otg and
lower USB3.0 port marked as host, so this below log
capture when USB3.0 mass storage plug in at lower
USB 3.0 port.

Log:
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... cannot reset port 1!?
2 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
     u-boot EHCI Host Controller

  1  Hub (480 Mb/s, 0mA)
     u-boot EHCI Host Controller

  1  Hub (5 Gb/s, 0mA)
     U-Boot XHCI Host Controller

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rockpro64: Enable USB3.0 Host
Jagan Teki [Mon, 20 Jul 2020 09:23:09 +0000 (14:53 +0530)]
rockchip: rockpro64: Enable USB3.0 Host

Enable USB3.0 Host support for RockPro64 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: board: add Hardkernel Odroid Go2 board
Heiko Stuebner [Wed, 1 Jul 2020 09:28:42 +0000 (11:28 +0200)]
rockchip: board: add Hardkernel Odroid Go2 board

Also known as Odroid Go Advance but named Go2 internally by the
vendor it seems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: px30: sync Odroid Go Advance devicetree from Linux
Heiko Stuebner [Wed, 1 Jul 2020 09:28:41 +0000 (11:28 +0200)]
rockchip: px30: sync Odroid Go Advance devicetree from Linux

Get the devicetree from mainline Linux and include it for U-Boot uses.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: px30: sync the main rk3326 dtsi from mainline
Heiko Stuebner [Wed, 1 Jul 2020 09:28:40 +0000 (11:28 +0200)]
rockchip: px30: sync the main rk3326 dtsi from mainline

The rk3326 is just a trimmed down px30 from a software perspective,
so the mainline rk3326 dtsi also ist just a tiny addition.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agolib: crypto: export and enhance pkcs7_verify_one()
AKASHI Takahiro [Tue, 21 Jul 2020 10:35:21 +0000 (19:35 +0900)]
lib: crypto: export and enhance pkcs7_verify_one()

The function, pkcs7_verify_one(), will be utilized to rework signature
verification logic aiming to support intermediate certificates in
"chain of trust."

To do that, its function interface is expanded, adding an extra argument
which is expected to return the last certificate in trusted chain.
Then, this last one must further be verified with signature database, db
and/or dbx.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
4 years agolib: crypto: add pkcs7_digest()
AKASHI Takahiro [Tue, 21 Jul 2020 10:35:20 +0000 (19:35 +0900)]
lib: crypto: add pkcs7_digest()

This function was nullified when the file, pkcs7_verify.c, was imported
because it calls further linux-specific interfaces inside, hence that
could lead to more files being imported from linux.

We need this function in pkcs7_verify_one() and so simply re-implement it
here instead of re-using the code.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
4 years agolib: crypto: import pkcs7_verify.c from linux
AKASHI Takahiro [Tue, 21 Jul 2020 10:35:19 +0000 (19:35 +0900)]
lib: crypto: import pkcs7_verify.c from linux

The file, pkcs7_verify.c, will now be imported from linux code
(crypto/asymmetric_keys/pkcs7_verify.c in 5.7) and modified to fit
into U-Boot environment.

In particular, pkcs7_verify_one() function will be used in a later patch
to rework signature verification logic aiming to support intermediate
certificates in "chain of trust."

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
4 years agolib: crypto: enable x509_check_for_self_signed()
AKASHI Takahiro [Tue, 21 Jul 2020 10:35:18 +0000 (19:35 +0900)]
lib: crypto: enable x509_check_for_self_signed()

When the file, x509_public_key.c, was imported from linux code in
    commit b4adf627d5b7 ("lib: crypto: add x509 parser"),
x509_check_for_self_signed() was commented out for simplicity.

Now it need be enabled in order to make pkcs7_verify_one(), which will be
imported in a later patch, functional.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
4 years agolib: crypto: add public_key_verify_signature()
AKASHI Takahiro [Tue, 21 Jul 2020 10:35:17 +0000 (19:35 +0900)]
lib: crypto: add public_key_verify_signature()

This function will be called from x509_check_for_self_signed() and
pkcs7_verify_one(), which will be imported from linux in a later patch.

While it does exist in linux code and has a similar functionality of
rsa_verify(), it calls further linux-specific interfaces inside.
That could lead to more files being imported from linux.

So simply re-implement it here instead of re-using the code.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
4 years agotest/py: efi_secboot: fix additional pylint errors
AKASHI Takahiro [Mon, 20 Jul 2020 06:33:39 +0000 (15:33 +0900)]
test/py: efi_secboot: fix additional pylint errors

This is a fixup by autopep8 after the commit ("test/py: efi_secboot:
apply autopep8").

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agotest/py: efi_secboot: remove unused function
AKASHI Takahiro [Mon, 20 Jul 2020 06:34:09 +0000 (15:34 +0900)]
test/py: efi_secboot: remove unused function

'tool_is_in_path' function is no longer used anywhere after Heinrich
has removed 'sudo' version of fixture setup.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: use logging for block device messages
Heinrich Schuchardt [Fri, 17 Jul 2020 18:33:05 +0000 (20:33 +0200)]
efi_loader: use logging for block device messages

Use logging instead of printf() for messages occurring when scanning block
devices during the initialization of the UEFI sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: use logging for bootefi command
Heinrich Schuchardt [Fri, 17 Jul 2020 18:21:00 +0000 (20:21 +0200)]
efi_loader: use logging for bootefi command

Log messages of the bootefi command instead of simply printing them to the
console.

Do not show "## Application terminated" message when the UEFI binary
completed successfully.

Adjust the python tests testing for '## Application terminated'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: returning from UEFI FIT images
Heinrich Schuchardt [Sat, 18 Jul 2020 08:54:26 +0000 (10:54 +0200)]
efi_loader: returning from UEFI FIT images

Do not reset the board when returning from an UEFI FIT image.

For failed UEFI binary we already print the return status in efi_run_image.
Remove duplicate output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: document efi_save_gd(), efi_restore_gd()
Heinrich Schuchardt [Sat, 18 Jul 2020 07:53:01 +0000 (09:53 +0200)]
efi_loader: document efi_save_gd(), efi_restore_gd()

Provide function descriptions for efi_save_gd() and efi_restore_gd().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: loosen buffer parameter check in efi_file_read
Stefan Sørensen [Wed, 22 Jul 2020 07:43:31 +0000 (09:43 +0200)]
efi_loader: loosen buffer parameter check in efi_file_read

When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when
the supplied buffer is too small, so a use-case is to call
efi_file_read with *buffer_size=0 and buffer=NULL to obtain the needed
size before doing the actual read.

So move the buffer!=NULL check to after the buffer size has been checked.

This fix allows the Redhat shim fallback to run and e.g. Fedora 32 now
boots out of the box.

Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: Check for the native OP-TEE result on mm_communicate calls
Ilias Apalodimas [Wed, 22 Jul 2020 07:32:22 +0000 (10:32 +0300)]
efi_loader: Check for the native OP-TEE result on mm_communicate calls

Currently we only check for the return value of tee_invoke_func().
Although OP-TEE and StMM will correctly set param[1].u.value.a and we'll
eventually return an error, the correct thing to do is check for the
OP_TEE return code as well.
So let's check for that and move tee_shm_free() and tee_close_session()
before exiting with an error to make sure we always clear the registered
memory.

Fixes: f042e47e8fb43 ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use EFI_DEVICE_ERROR for TEE communication problems.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: Rename and correct values for ARM_SMC_MM_*
Ilias Apalodimas [Fri, 17 Jul 2020 04:55:03 +0000 (07:55 +0300)]
efi_loader: Rename and correct values for ARM_SMC_MM_*

Instead of adding the definition for the specific MM SVC used in
StandAloneMM we added the one used in the standard SMC calls.
So change the value from -4 to -5 to match the correct one defined in
EDK2 and rename them to avoid future confusion

Fixes 23a397d2e2fb: ("efi_loader: Add headers for EDK2 StandAloneMM communication")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: don't use memmove() in efi_var_mem_del()
Heinrich Schuchardt [Wed, 22 Jul 2020 05:56:14 +0000 (07:56 +0200)]
efi_loader: don't use memmove() in efi_var_mem_del()

efi_var_mem_del() is in __efi_runtime because it would be needed for a
runtime implementation of SetVariable(). memmove() is not in __efi_runtime.
So we should not use it in efi_var_mem_del().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: efi_current_var after SetVirtualAddressMap
Heinrich Schuchardt [Wed, 22 Jul 2020 04:29:38 +0000 (06:29 +0200)]
efi_loader: efi_current_var after SetVirtualAddressMap

Variable efi_current_var is a pointer to a physical memory address that
becomes invalid after SetVirtualAddressMap(). Instead of converting it via
ConvertPointer() simply set it to NULL.

Fixes: b02a707152dc ("efi_loader: enable UEFI variables at runtime")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Tue, 21 Jul 2020 20:13:43 +0000 (16:13 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- add new series Micron SPI NAND devices (Shivamurthy)

4 years agotreewide: convert devfdt_get_addr() to dev_read_addr()
Masahiro Yamada [Fri, 17 Jul 2020 05:36:48 +0000 (14:36 +0900)]
treewide: convert devfdt_get_addr() to dev_read_addr()

When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
4 years agotreewide: remove (phys_addr_t) casts from devfdt_get_addr()
Masahiro Yamada [Fri, 17 Jul 2020 05:36:47 +0000 (14:36 +0900)]
treewide: remove (phys_addr_t) casts from devfdt_get_addr()

This cast is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
4 years agotreewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
Masahiro Yamada [Fri, 17 Jul 2020 05:36:46 +0000 (14:36 +0900)]
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()

Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.

One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:

    priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
    if (!priv->regs)
            return -EINVAL;

devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.

dev_read_addr_ptr() returns NULL on error, so this error check
will work.

I generated this commit by the following command:

 $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
   xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'

I manually fixed drivers/usb/host/ehci-mx6.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
4 years agofdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()
Masahiro Yamada [Fri, 17 Jul 2020 01:46:19 +0000 (10:46 +0900)]
fdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()

Currently, fdt_fixup_mtdparts() only checks the compatible property.
It is pointless to fix up the disabled node.

Skip the node if it has the property:

  status = "disabled"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofdt_support: call mtdparts_init() after finding MTD node to fix up
Masahiro Yamada [Fri, 17 Jul 2020 01:46:18 +0000 (10:46 +0900)]
fdt_support: call mtdparts_init() after finding MTD node to fix up

Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
MTD partitions over to the Linux device tree.

Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
If no target MTD device is found, an error message like follows is
displayed:

    Device nand0 not found!

This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
is shared among several boards, but not all of them support an MTD device.

Parse the DT first, then call mtdparts_init() only when the target MTD
node is found.

Yet, you still need to call mtdparts_init() before device_find().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest/dm: check if devices exist
Heinrich Schuchardt [Thu, 16 Jul 2020 22:20:14 +0000 (00:20 +0200)]
test/dm: check if devices exist

Running 'ut dm' on the sandbox without -D or -d results in segmentation
faults due to NULL pointer dereferences.

Check that device pointers are non-NULL before using them.

Use ut_assertnonnull() for pointers instead of ut_assert().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Philippe Reynes <philippe.reynes@softathome.com>
4 years agoarm: mach-k3: Use SOC driver for device identification
Dave Gerlach [Thu, 16 Jul 2020 04:40:04 +0000 (23:40 -0500)]
arm: mach-k3: Use SOC driver for device identification

Make use of UCLASS_SOC to find device family and revision for
print_cpuinfo.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoconfigs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Dave Gerlach [Thu, 16 Jul 2020 04:40:03 +0000 (23:40 -0500)]
configs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3

Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoconfigs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Dave Gerlach [Thu, 16 Jul 2020 04:40:02 +0000 (23:40 -0500)]
configs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3

Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoarm: dts: k3-j721e-mcu-wakeup: Introduce chipid node
Dave Gerlach [Thu, 16 Jul 2020 04:40:01 +0000 (23:40 -0500)]
arm: dts: k3-j721e-mcu-wakeup: Introduce chipid node

Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoarm: dts: k3-am65-wakeup: Introduce chipid node
Dave Gerlach [Thu, 16 Jul 2020 04:40:00 +0000 (23:40 -0500)]
arm: dts: k3-am65-wakeup: Introduce chipid node

Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs
Dave Gerlach [Thu, 16 Jul 2020 04:39:59 +0000 (23:39 -0500)]
dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs

Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.

[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agotest: Add tests for SOC uclass
Dave Gerlach [Thu, 16 Jul 2020 04:39:58 +0000 (23:39 -0500)]
test: Add tests for SOC uclass

Add a sandbox SOC driver, and some tests for the SOC uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching
Dave Gerlach [Thu, 16 Jul 2020 04:39:57 +0000 (23:39 -0500)]
dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching

Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.

This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodoc: Add new doc for soc ID driver model
Dave Gerlach [Thu, 16 Jul 2020 04:39:56 +0000 (23:39 -0500)]
doc: Add new doc for soc ID driver model

Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofdt_support: add static to fdt_node_set_part_info()
Masahiro Yamada [Wed, 15 Jul 2020 10:35:47 +0000 (19:35 +0900)]
fdt_support: add static to fdt_node_set_part_info()

This function is only called from fdt_fixup_mtdpart() in the same file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: When no tracking branch is provided, tell the user
Nicolas Boichat [Mon, 13 Jul 2020 02:50:01 +0000 (10:50 +0800)]
patman: When no tracking branch is provided, tell the user

The user can either count the number of patches, or provide a
tracking branch.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Make sure sendemail.suppresscc is (un)set correctly
Nicolas Boichat [Mon, 13 Jul 2020 02:50:00 +0000 (10:50 +0800)]
patman: Make sure sendemail.suppresscc is (un)set correctly

Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoRevert "lib: fdt: Split fdtdec_setup_mem_size_base()"
Michal Simek [Fri, 10 Jul 2020 11:16:50 +0000 (13:16 +0200)]
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()"

This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoRevert "lib: fdt: Split fdtdec_setup_memory_banksize()"
Michal Simek [Fri, 10 Jul 2020 11:16:49 +0000 (13:16 +0200)]
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()"

This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()
Michal Simek [Fri, 10 Jul 2020 11:16:48 +0000 (13:16 +0200)]
ARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()

The commit 361377dbdbc9 ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f5027345c ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoAdd information for skipped commit options
Patrick Delaunay [Thu, 2 Jul 2020 17:52:54 +0000 (19:52 +0200)]
Add information for skipped commit options

The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
  Commit-notes:
  Commit-changes:

For example: the final 's' is missing (Commit-note:)

NB: no issue for Series-xxx option as only the supported
    options are accepted (see valid_series in series.py)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: libfdt: fdt_region: avoid NULL pointer access
Philippe Reynes [Thu, 2 Jul 2020 17:31:29 +0000 (19:31 +0200)]
lib: libfdt: fdt_region: avoid NULL pointer access

The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.

To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Detect unexpected END
Patrick Delaunay [Thu, 2 Jul 2020 17:08:24 +0000 (19:08 +0200)]
patman: Detect unexpected END

Detect unexpected 'END' line when a section is not detected.

This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'

  Commit-note:
  ....
  END

Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocpu: Convert the methods to use a const udevice *
Simon Glass [Mon, 27 Jan 2020 05:06:27 +0000 (22:06 -0700)]
cpu: Convert the methods to use a const udevice *

These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add support for generating a FIT
Simon Glass [Fri, 10 Jul 2020 00:39:45 +0000 (18:39 -0600)]
binman: Add support for generating a FIT

FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:

- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python

To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodtoc: Allow adding variable-sized data to a dtb
Simon Glass [Fri, 10 Jul 2020 00:39:44 +0000 (18:39 -0600)]
dtoc: Allow adding variable-sized data to a dtb

Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agomkimage: Allow updating the FIT timestamp
Simon Glass [Fri, 10 Jul 2020 00:39:43 +0000 (18:39 -0600)]
mkimage: Allow updating the FIT timestamp

Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.

Add a -t flag to allow setting the timestamp in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow zero-length entries to overlap
Simon Glass [Fri, 10 Jul 2020 00:39:42 +0000 (18:39 -0600)]
binman: Allow zero-length entries to overlap

Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.

Allow zero-length overlaps so that this does not cause any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow missing Intel blobs
Simon Glass [Fri, 10 Jul 2020 00:39:41 +0000 (18:39 -0600)]
binman: Allow missing Intel blobs

Update the Intel blob entries to support missing binaries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Detect when valid images are not produced
Simon Glass [Fri, 10 Jul 2020 00:39:40 +0000 (18:39 -0600)]
binman: Detect when valid images are not produced

When external blobs are missing, show a message indicating that the images
are not functional.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Update errors and warnings to use stderr
Simon Glass [Fri, 10 Jul 2020 00:39:39 +0000 (18:39 -0600)]
patman: Update errors and warnings to use stderr

When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>