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3 years agoarm: imx: imx8mm: correct unrecognized fracpll frequency
Andrey Zhizhikin [Mon, 3 May 2021 07:59:17 +0000 (09:59 +0200)]
arm: imx: imx8mm: correct unrecognized fracpll frequency

Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ()
macro, which expands the value provided to the Hz range without taking into
account the precise Hz setting. This causes the frequency of 266 MHz not ot
be found in the imx8mm_fracpll_tbl, since it is entered there with a
precise Hz value. This in turn causes the boot hang in SPL, as proper DDR
fracpll frequency cannot be determined.

Correct the value in imx8mm_fracpll_tbl to match the one expanded by
MHZ(266) macro, rounding it down to MHz range only.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
3 years agopico-imx6: README: Fix the boot mode settings URL
Fabio Estevam [Thu, 27 May 2021 21:43:06 +0000 (18:43 -0300)]
pico-imx6: README: Fix the boot mode settings URL

The original URL that explains the boot mode setting is no longer
valid.

Update to the new one.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
3 years agoimx: ventana: enable dm support for PCI and FEC ethernet
Tim Harvey [Mon, 3 May 2021 18:21:27 +0000 (11:21 -0700)]
imx: ventana: enable dm support for PCI and FEC ethernet

Enable driver model support for FEC ethernet which allows us to remove
the iomux and board_eth_init function. Replace the toggling of the ethernet
phy reset with dt configuration.

Enable driver model support for PCI which allows us to remove the
eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for
PCI devices on init such as the e1000 that is present on the GW552x.

Convert board_pci_fixup to use dm callback and remove pcidisable env
variable which is not supported for DM_PCI and thus leave PCI always
enabled during init.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
3 years agoarm: imx: imx8mm: clock: make debug output more descriptive
Andrey Zhizhikin [Mon, 3 May 2021 08:02:10 +0000 (10:02 +0200)]
arm: imx: imx8mm: clock: make debug output more descriptive

Clock initialization functionality has ambitious debug messages, which are
printed out when failures are triggered during execution:
- Separate frequency table lookup functions have the the same output that
  makes it impossible to understand which function failed and produced the
  output
- PLL decoding routine has a generic debug statement printed, which does
  not state the actual value failed to be found

Extend the output for both cases with prefixing table lookup functions
output with function name, and report the failed value in PLL decoding
routine.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
3 years agoAdd EV-iMX280-NANO-X-MB board
Oleh Kravchenko [Fri, 14 May 2021 21:18:33 +0000 (00:18 +0300)]
Add EV-iMX280-NANO-X-MB board

A simple prototyping board with one microSD port, one Ethernet port,
2 USB ports, I2C, SPI, GPIO, and UART interfaces.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
3 years agoAdd out4.ru O4-iMX-NANO board
Oleh Kravchenko [Fri, 14 May 2021 21:18:31 +0000 (00:18 +0300)]
Add out4.ru O4-iMX-NANO board

Board designed for quick prototyping and has one microSD port,
2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO,
UART interfaces, and 2 RGB LEDs.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
3 years agoARM: imx8m: verdin-imx8mm: Increase bootm size to 64 MiB
Marek Vasut [Mon, 17 May 2021 22:40:30 +0000 (00:40 +0200)]
ARM: imx8m: verdin-imx8mm: Increase bootm size to 64 MiB

Uncompressed aarch64 kernel Image are rather large, increase the bootm
size limit to 64 MiB to cater for that.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agoconfigs: imxrt1050-evk: enable host usb support and its command
Giulio Benetti [Thu, 20 May 2021 14:10:18 +0000 (16:10 +0200)]
configs: imxrt1050-evk: enable host usb support and its command

Now that usb host is supported let's enable it on this board.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk: enable usbotg1 node as host
Giulio Benetti [Thu, 20 May 2021 14:10:17 +0000 (16:10 +0200)]
ARM: dts: imxrt1050-evk: enable usbotg1 node as host

Enable usbotg1 port node as host usb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodes
Giulio Benetti [Thu, 20 May 2021 14:10:16 +0000 (16:10 +0200)]
ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodes

Usb is now supported so add all required nodes for it in imxrt1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agousb: ehci-mx6: add support for i.MXRT
Giulio Benetti [Thu, 20 May 2021 14:10:15 +0000 (16:10 +0200)]
usb: ehci-mx6: add support for i.MXRT

Add support for usb1 and usb2 present on i.IMXRT.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoclk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3
Giulio Benetti [Thu, 20 May 2021 14:10:14 +0000 (16:10 +0200)]
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3

Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to
clock driver.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()
Giulio Benetti [Thu, 20 May 2021 14:10:13 +0000 (16:10 +0200)]
ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()

We need those macros to instruct drivers on how to behave for SoC specific
quirks, so let's add it as done for other i.MX SoCs.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020: add gpio5 node to this SoC
Giulio Benetti [Sun, 16 May 2021 21:57:02 +0000 (23:57 +0200)]
ARM: dts: imxrt1020: add gpio5 node to this SoC

i.MXRT1020 supports gpio5, so let's add a node for it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020-evk: move all u-boot, dm-spl to imxrt1020-evk-u-boot.dtsi file
Giulio Benetti [Sun, 16 May 2021 21:57:01 +0000 (23:57 +0200)]
ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to imxrt1020-evk-u-boot.dtsi file

At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1020-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk: move all u-boot, dm-spl to imxrt1050-evk-u-boot.dtsi file
Giulio Benetti [Sun, 16 May 2021 21:57:00 +0000 (23:57 +0200)]
ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to imxrt1050-evk-u-boot.dtsi file

At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1050-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk: remove u-boot,dm-spl
Giulio Benetti [Thu, 13 May 2021 10:19:36 +0000 (12:19 +0200)]
ARM: dts: imxrt1050-evk: remove u-boot,dm-spl

We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050: set lcdif clocks according to mxsfb driver
Giulio Benetti [Thu, 13 May 2021 10:19:35 +0000 (12:19 +0200)]
ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driver

Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to
lcdif node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050: move lcdif assigned clock to dtsi
Giulio Benetti [Thu, 13 May 2021 10:19:34 +0000 (12:19 +0200)]
ARM: dts: imxrt1050: move lcdif assigned clock to dtsi

Since we assume pll5 is the default lcdif clock source let's move
assigned-clocks(-parents) properties to .dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoclk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB
Giulio Benetti [Thu, 13 May 2021 10:19:33 +0000 (12:19 +0200)]
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB

Lcd peripheral needs 2 different gates to be enable to work, so let's
introduce the missing one(LCDIF_PIX) and rename the existing one
(LCDIF_APB).

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agovideo: mxsfb: add enabling of "disp_axi" clock
Giulio Benetti [Thu, 13 May 2021 10:18:47 +0000 (12:18 +0200)]
video: mxsfb: add enabling of "disp_axi" clock

Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it
and enabling. If it fails it gives only a debug(), but this clock as well
as "axi" clock is not mandatory.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agovideo: mxsfb: add enabling of "axi" clock other than "per" clock
Giulio Benetti [Thu, 13 May 2021 10:18:46 +0000 (12:18 +0200)]
video: mxsfb: add enabling of "axi" clock other than "per" clock

On some SoC mxsfb needs more than one clock gate(actual "per" clock). So
let's introduce "axi" clock that can be provided but it's not mandatory.
This is inspired from linux mxsfb driver. Also let's rename "per" clock to
"pix" clock for compatibility with already existing .dts lcdif nodes
implementation.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoconfigs: imxrt1050-evk: enable imx gpt timer as tick-timer
Giulio Benetti [Thu, 13 May 2021 10:18:45 +0000 (12:18 +0200)]
configs: imxrt1050-evk: enable imx gpt timer as tick-timer

Let's enable imx-gpt-timer in imx1050-evk defconfig.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk: add device_type = "memory" to memory node
Giulio Benetti [Thu, 13 May 2021 10:18:44 +0000 (12:18 +0200)]
ARM: dts: imxrt1050-evk: add device_type = "memory" to memory node

Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL
Giulio Benetti [Thu, 13 May 2021 10:18:43 +0000 (12:18 +0200)]
ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL

Timer needs to be already enabled in spl, so let's add its node to spl dtb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot
Giulio Benetti [Thu, 13 May 2021 10:18:42 +0000 (12:18 +0200)]
ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot

Let's set gpt1 as u-boot timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050-evk: enable gpt1 timer
Giulio Benetti [Thu, 13 May 2021 10:18:41 +0000 (12:18 +0200)]
ARM: dts: imxrt1050-evk: enable gpt1 timer

Enable gpt1 timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050: add gpt1 node
Giulio Benetti [Thu, 13 May 2021 10:18:40 +0000 (12:18 +0200)]
ARM: dts: imxrt1050: add gpt1 node

Add gpt1 node for using it as timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1050: add node label to osc
Giulio Benetti [Thu, 13 May 2021 10:18:39 +0000 (12:18 +0200)]
ARM: dts: imxrt1050: add node label to osc

Let's add node label to osc to be used as clock source for other nodes.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoconfigs: imxrt1020-evk: enable imx gpt timer as tick-timer
Giulio Benetti [Thu, 13 May 2021 10:18:38 +0000 (12:18 +0200)]
configs: imxrt1020-evk: enable imx gpt timer as tick-timer

Let's enable imx-gpt-timer in imx1020-evk defconfig.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020-evk: add device_type = "memory" to memory node
Giulio Benetti [Thu, 13 May 2021 10:18:37 +0000 (12:18 +0200)]
ARM: dts: imxrt1020-evk: add device_type = "memory" to memory node

Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL
Giulio Benetti [Thu, 13 May 2021 10:18:36 +0000 (12:18 +0200)]
ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL

Timer needs to be already enabled in spl, so let's add its node to spl dtb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot
Giulio Benetti [Thu, 13 May 2021 10:18:35 +0000 (12:18 +0200)]
ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot

Let's set gpt1 as u-boot timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020-evk: enable gpt1 timer
Giulio Benetti [Thu, 13 May 2021 10:18:34 +0000 (12:18 +0200)]
ARM: dts: imxrt1020-evk: enable gpt1 timer

Enable gpt1 timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020: add gpt1 node
Giulio Benetti [Thu, 13 May 2021 10:18:33 +0000 (12:18 +0200)]
ARM: dts: imxrt1020: add gpt1 node

Add gpt1 node for using it as timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoARM: dts: imxrt1020: add node label to osc
Giulio Benetti [Thu, 13 May 2021 10:18:32 +0000 (12:18 +0200)]
ARM: dts: imxrt1020: add node label to osc

Let's add node label to osc to be used as clock source for other nodes.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agotimer: imx-gpt: Add timer support for i.MX SoCs family
Giulio Benetti [Thu, 13 May 2021 10:18:31 +0000 (12:18 +0200)]
timer: imx-gpt: Add timer support for i.MX SoCs family

This timer driver uses GPT Timer (General Purpose Timer) available on
a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator
as well as peripheral clock.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
[Giulio: added the driver's stub and handled peripheral clock prescaler
setting making driver to work correctly]
Signed-off-by: Jesse Taube <mr.bossman075@gmail.com>
[Jesse: added init, setting prescaler for 24Mhz support and enabling
timer]

3 years agoarm: imxrt: soc: make mpu regions generic
Giulio Benetti [Thu, 13 May 2021 10:18:30 +0000 (12:18 +0200)]
arm: imxrt: soc: make mpu regions generic

This mpu handling works for every i.MXRT SoC that we have, so let's
generalize imxrt1050_region_config to imxrt_region_config.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Tue, 8 Jun 2021 21:46:49 +0000 (17:46 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh

- More pinctrl updates

3 years agopinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.12
Marek Vasut [Mon, 26 Apr 2021 20:04:11 +0000 (22:04 +0200)]
pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.12

Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large
commit, since the macros in sh-pfc.h also got updated, so
all the PFC tables must be updated in lockstep.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
3 years agoPrepare v2021.07-rc4
Tom Rini [Mon, 7 Jun 2021 13:26:39 +0000 (09:26 -0400)]
Prepare v2021.07-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 7 Jun 2021 12:09:35 +0000 (08:09 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge tag 'u-boot-rockchip-20210606' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 7 Jun 2021 11:22:14 +0000 (07:22 -0400)]
Merge tag 'u-boot-rockchip-20210606' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

3 years agoMerge tag 'dm-pull-6jun21' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Sun, 6 Jun 2021 17:00:23 +0000 (13:00 -0400)]
Merge tag 'dm-pull-6jun21' of https://source.denx.de/u-boot/custodians/u-boot-dm

Minor fixes for sandbox and handling of dm-ranges

3 years agoMerge tag 'video-for-2021-07-rc3' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Sat, 5 Jun 2021 15:17:55 +0000 (11:17 -0400)]
Merge tag 'video-for-2021-07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-video

 - disable legacy video for brxre1, mx28evk, pico-imx6ul,
   pxm2 and rut boards after DM_VIDEO conversion deadline

3 years agotest: add dm_test_read_resource
Patrick Delaunay [Fri, 21 May 2021 10:25:00 +0000 (12:25 +0200)]
test: add dm_test_read_resource

Add a test of dev_read_resource with translation or without translation

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agonet: luton: remove address translation after ofnode_read_resource
Patrick Delaunay [Fri, 21 May 2021 10:24:59 +0000 (12:24 +0200)]
net: luton: remove address translation after ofnode_read_resource

Removed call of ofnode_translate_address() after ofnode_read_resource
in luton_switch.c:luton_probe(); it is unnecessary since
the commit feb7ac457c20 ("dm: core: Add address translation in
fdt_get_resource").

Fixes: feb7ac457c20 ("dm: core: Add address translation in fdt_get_resource")
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agopwm: cros_ec: Rename "priv_auto_alloc_size" to "priv_auto"
Alper Nebi Yasak [Fri, 14 May 2021 13:48:40 +0000 (16:48 +0300)]
pwm: cros_ec: Rename "priv_auto_alloc_size" to "priv_auto"

With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This
driver was sent to the mailing list before that change, merged after it,
and still has the old form. Apply the rename here as well.

Fixes: 1b9ee2882e6b ("pwm: Add a driver for Chrome OS EC PWM")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: correct determination of the text base
Heinrich Schuchardt [Sat, 15 May 2021 17:29:13 +0000 (19:29 +0200)]
sandbox: correct determination of the text base

os_find_text_base() assumes that first line of /proc/self/maps holds
information about the text. Hence we must call the function before calling
os_malloc() which calls mmap(0x10000000,).

Failure to do so has led to incorrect values for pc_reloc when an
exception was reported

    => exception undefined

    Illegal instruction
    pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c

as well as incorrect output of the bdinfo command

    => bdinfo
    relocaddr   = 0x0000000007858000
    reloc off   = 0x0000000010000000

Fixes: b308d9fd18fa ("sandbox: Avoid using malloc() for system state")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoof: addr: Remove call to dev_count_cells() in of_get_address()
Bin Meng [Fri, 30 Apr 2021 13:16:59 +0000 (21:16 +0800)]
of: addr: Remove call to dev_count_cells() in of_get_address()

In of_get_address(), there is:

  dev_count_cells(dev, &na, &ns);

followed by:

  bus->count_cells(dev, &na, &ns);

but no codes in between use na/ns, hence the first call is useless.
By dropping the first call, dev_count_cells() is now useless too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoof: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'
Bin Meng [Fri, 30 Apr 2021 13:16:58 +0000 (21:16 +0800)]
of: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'

'dma-ranges' frequently exists without parent nodes having 'dma-ranges'.
While this is an error for 'ranges', this is fine because DMA capable
devices always have a translatable DMA address. Also, with no
'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with
no restrictions unless perhaps the device itself has implicit
restrictions.

This keeps in sync with Linux kernel commit:

  81db12ee15cb: of/address: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agopico-imx6ul: disable video after DM_VIDEO conversion deadline
Anatolij Gustschin [Mon, 24 May 2021 15:31:26 +0000 (17:31 +0200)]
pico-imx6ul: disable video after DM_VIDEO conversion deadline

These boards were not converted to DM_VIDEO before deadline,
so disable video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Fabio Estevam <festevam@gmail.com>
3 years agobrxre1: disable video after DM_VIDEO conversion deadline
Anatolij Gustschin [Mon, 24 May 2021 15:19:56 +0000 (17:19 +0200)]
brxre1: disable video after DM_VIDEO conversion deadline

The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
3 years agomx28evk: disable video after DM_VIDEO conversion deadline
Anatolij Gustschin [Mon, 24 May 2021 14:45:29 +0000 (16:45 +0200)]
mx28evk: disable video after DM_VIDEO conversion deadline

The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
3 years agosiemens: pxm2: disable video after DM_VIDEO conversion deadline
Anatolij Gustschin [Mon, 24 May 2021 14:35:57 +0000 (16:35 +0200)]
siemens: pxm2: disable video after DM_VIDEO conversion deadline

The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
3 years agosiemens: rut: disable video after DM_VIDEO conversion deadline
Anatolij Gustschin [Mon, 24 May 2021 14:26:51 +0000 (16:26 +0200)]
siemens: rut: disable video after DM_VIDEO conversion deadline

The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Fri, 4 Jun 2021 13:34:21 +0000 (09:34 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- mvebu: a37xx: PCI related enhancements and fixes (Pali)
- mvebu: turris_omnia: Board specific updates, e.g. rescue
  boot cmd etc (Marek)

3 years agoarm: mvebu: turris_omnia: support invoking rescue boot from console
Marek Behún [Fri, 28 May 2021 08:00:49 +0000 (10:00 +0200)]
arm: mvebu: turris_omnia: support invoking rescue boot from console

Make it possible to invoke rescue boot from U-Boot console, without
having to press the factory reset button. This is needed when accessing
the device remotely, for example.

Achieve this by putting rescue command into `bootcmd_rescue` default
environment variable and setting some distroboot environment variables
to their default values when the factory button is pressed.

Rescue boot from console can be invoked by running
  run bootcmd_rescue

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: mvebu: turris_omnia: update rescue mode boot command
Marek Behún [Fri, 28 May 2021 08:00:48 +0000 (10:00 +0200)]
arm: mvebu: turris_omnia: update rescue mode boot command

Update rescue mode boot command on Turris Omnia. We are compressing the
image with lzma now.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Fix configuring PCIe resources
Pali Rohár [Wed, 26 May 2021 15:59:40 +0000 (17:59 +0200)]
arm: a37xx: pci: Fix configuring PCIe resources

The `ranges` DT property of the PCIe node is currently ignored by
Aardvark driver - all entries are used as transparent PCIe MEM, despite
some of them being defined for IO in DT.

This is because the driver does not setup PCIe outbound windows and thus
a default configuration is used.

This can cause an external abort on CPU when a device driver tries to
access non-MEM space.

Setup the PCIe windows according to the `ranges` property for all
non-MEM resources (currently only IO) and also non-transparent MEM
resources.

Because Linux expects that bootloader does not setup Aardvark PCIe
windows, disable them before booting Linux.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB
Pali Rohár [Wed, 26 May 2021 15:59:39 +0000 (17:59 +0200)]
arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB

For some configurations with more PCIe cards and PCIe bridges, 16 MiB of
PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB
CPU window for PCIe, and since IO port space is only 64 KiB in total,
use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for
PCIe MEM.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function
Pali Rohár [Wed, 26 May 2021 15:59:38 +0000 (17:59 +0200)]
arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function

Current version of this function uses a lot of incorrect assumptions about
the `ranges` DT property:

 * parent(#address-cells) == 2
 * #size-cells == 2
 * number of entries == 2
 * address size of first entry == 0x1000000
 * second child address entry == base + 0x1000000

Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap
with PCIe IO space, and trying to define additional MEM space (as a third
entry in the `ranges` DT property) causes U-Boot to crash when booting the
kernel.

  ## Flattened Device Tree blob at 04f00000
     Booting using the fdt blob at 0x4f00000
     Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK
  ERROR: board-specific fdt fixup failed: <unknown error>
   - must RESET the board to recover.

Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses
in the `ranges` property according to
https://elinux.org/Device_Tree_Usage#PCI_Address_Translation

Now it is possible to increase PCIe MEM space from 16 MiB to maximal value
of 127 MiB.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Fixes: cb2ddb291ee6 ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions")
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Find PCIe controller node by compatible instead of path
Pali Rohár [Wed, 26 May 2021 15:59:37 +0000 (17:59 +0200)]
arm: a37xx: pci: Find PCIe controller node by compatible instead of path

Find PCIe DT node by compatible string instead of retrieving it by using
hardcoded DT path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Fix DT compatible string to Linux' DT compatible
Pali Rohár [Wed, 26 May 2021 15:59:36 +0000 (17:59 +0200)]
arm: a37xx: pci: Fix DT compatible string to Linux' DT compatible

Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie'
to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible
with Linux' DT node.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Disable bus mastering when unloading driver
Pali Rohár [Wed, 26 May 2021 15:59:35 +0000 (17:59 +0200)]
arm: a37xx: pci: Disable bus mastering when unloading driver

Disable Root Bridge I/O space, memory space and bus mastering in Aardvark's
remove method, which is called before booting Linux kernel.

This ensures that PCIe device which was initialized and used by U-Boot
cannot do new DMA transfers until Linux initializes PCI subsystem and loads
appropriate drivers for the device.

During initialization of PCI subsystem Linux in fact disables this bus
mastering on Root Bridge (and later enables it when driver is loaded and
configured), but there is a possibility of a small window after U-Boot
boots Linux when bus mastering is enabled, which is not correct.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: a37xx: pci: Don't put link into LTSSM Recovery state during probe
Pali Rohár [Wed, 26 May 2021 15:59:34 +0000 (17:59 +0200)]
arm: a37xx: pci: Don't put link into LTSSM Recovery state during probe

During our debugging of the Aardvark driver in Linux we have discovered
that the PCIE_CORE_LINK_CTRL_STAT_REG register in fact controls standard
PCIe Link Control Register for PCIe Root Bridge. This led us to discover
that the name of the PCIE_CORE_LINK_TRAINING macro and the corresponding
comment by this macro's usage is misleading; this bit in fact controls
Retrain Link, which, according to PCIe base spec is defined as:

  A write of 1b to this bit initiates Link retraining by directing the
  Physical Layer LTSSM to the Recovery state. If the LTSSM is already in
  Recovery or Configuration, re-entering Recovery is permitted but not
  required.

Entering Recovery state is normally done from LTSSM L0, L0s and L1 states.
But since the pci-aardvark.c driver enables Link Training just a few lines
above, the controller is not in L0 ready state yet. So setting aardvark bit
PCIE_CORE_LINK_TRAINING does not actually enter Recovery state at this
place.

Moreover, trying to enter LTSSM Recovery state without other configuration
is causing issues for some cards (e.g. Atheros AR9xxx and QCA9xxx). Since
Recovery state is not entered, these issues are not triggered.

Remove code which tries to enter LTSSM Recovery state completely.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agofastboot: Fix overflow when calculating chunk size
Sean Anderson [Thu, 27 May 2021 16:02:34 +0000 (12:02 -0400)]
fastboot: Fix overflow when calculating chunk size

If a chunk was larger than 4GiB, then chunk_data_sz would overflow and
blkcnt would not be calculated correctly. Upgrade it to a u64 and cast
its multiplicands as well. Also fix bytes_written while we're at it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
3 years agoMAINTAINERS: Update maintainer's mail address
Kever Yang [Tue, 30 Mar 2021 10:02:07 +0000 (18:02 +0800)]
MAINTAINERS: Update maintainer's mail address

Philipp has change the mail and the legacy one is not available, update it
to the new one.

CC: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Mon, 31 May 2021 14:19:14 +0000 (10:19 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

- SiFive FU740 and Unmatched support

3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Mon, 31 May 2021 14:18:26 +0000 (10:18 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi

This contains the fix to bring back the SD card as MMC0. In the long run
we are looking into a more robust solution, but for now we need to fix
this, as this breaks the user experience left, right, and centre.
Also add the one MAINTAINERS path addition from Samuel.

3 years agodrivers: pci: pcie_dw_common: fix Werror compilation error
Green Wan [Wed, 19 May 2021 11:16:15 +0000 (04:16 -0700)]
drivers: pci: pcie_dw_common: fix Werror compilation error

Fix compilation error when Werror is turned on. The warning could
possible break some CI builds.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoriscv: cpu: fu740: clear feature disable CSR
Green Wan [Thu, 27 May 2021 13:52:14 +0000 (06:52 -0700)]
riscv: cpu: fu740: clear feature disable CSR

Clear feature disable CSR to turn on all features of hart. The detail
is specified at section, 'SiFive Feature Disable CSR', in user manual

https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoboard: sifive: add HiFive Unmatched board support
Green Wan [Thu, 27 May 2021 13:52:13 +0000 (06:52 -0700)]
board: sifive: add HiFive Unmatched board support

Add defconfig and board support for HiFive Unmatched.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoriscv: dts: add SiFive Unmatched board support
Green Wan [Thu, 27 May 2021 13:52:12 +0000 (06:52 -0700)]
riscv: dts: add SiFive Unmatched board support

Add dts files for SiFive Unmatched board.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoriscv: dts: add fu740 support
Green Wan [Thu, 27 May 2021 13:52:11 +0000 (06:52 -0700)]
riscv: dts: add fu740 support

Add dts support for fu740. The HiFive Unmatched support is based on
fu740 cpu and drivers in following patch set.

Signed-off-by: Green Wan <green.wan@sifive.com>
[greentime.hu: set fu740 speed to 1.2GHz]
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agodrivers: pci: add pcie support for fu740
Green Wan [Thu, 27 May 2021 13:52:10 +0000 (06:52 -0700)]
drivers: pci: add pcie support for fu740

Add pcie driver for SiFive fu740, the driver depends on
fu740 gpio, clk and reset driver to do init. Force running at Gen1
for better capatible enumeration.

Several devices are tested:
a) M.2 NVMe SSD
b) USB-to-PCI adapter
c) Ethernet adapter (E1000 compatible)

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agodrivers: ram: sifive: rename fu540_ddr and add fu740 support
Green Wan [Thu, 27 May 2021 13:52:09 +0000 (06:52 -0700)]
drivers: ram: sifive: rename fu540_ddr and add fu740 support

Rename fu540_ddr.c to sifive_ddr.c and add fu740 support

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agodrivers: clk: add fu740 support
Green Wan [Thu, 27 May 2021 13:52:08 +0000 (06:52 -0700)]
drivers: clk: add fu740 support

Add fu740 support. One abstract layer is added for supporting
multiple chips such as fu540 and fu740.

Signed-off-by: Green Wan <green.wan@sifive.com>
3 years agoriscv: cpu: fu740: Add support for cpu fu740
Green Wan [Thu, 27 May 2021 13:52:07 +0000 (06:52 -0700)]
riscv: cpu: fu740: Add support for cpu fu740

Add SiFive fu740 cpu to support RISC-V arch

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoMAINTAINERS: Add allwinner/sunxi driver directories
Samuel Holland [Mon, 19 Apr 2021 03:13:36 +0000 (22:13 -0500)]
MAINTAINERS: Add allwinner/sunxi driver directories

These drivers are sunxi platform-specific, and so are of interest to the
sunxi maintainers.

In fact, as there is no PHY driver maintainer, drivers/phy/allwinner had
no maintainer at all.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agosunxi: Bring back SD card as MMC device 0
Andre Przywara [Fri, 16 Apr 2021 10:52:27 +0000 (11:52 +0100)]
sunxi: Bring back SD card as MMC device 0

Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases
node's index") now actually enforces U-Boot's device enumeration policy,
where explicitly named devices come first, then any other non-named
devices follow, without filling gaps.

For quite a while we have had an "mmc1 = &mmc2;" alias in our
sunxi-u-boot.dtsi, which now leads to the problem that the SD card
(which was always mmc device 0) now gets to be number 2.
This breaks quite some boot scripts, including our own distro boot
commands, and some other features looking at $mmc_bootdev, also
fastboot.

Just add an explicit mmc0 alias in the very same file to fix this and
restore the old behaviour.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Samuel Holland <samuel@sholland.org>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
3 years agoMerge tag 'u-boot-stm32-20210528' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Fri, 28 May 2021 18:11:06 +0000 (14:11 -0400)]
Merge tag 'u-boot-stm32-20210528' of https://source.denx.de/u-boot/custodians/u-boot-stm

- DFU: MTD: fix for lock support
- reset: stm32: fix bank bank and offset computation
- enable UNZIP config in several stm32mp defconfig

3 years agoMerge tag 'efi-2021-07-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 28 May 2021 18:10:51 +0000 (14:10 -0400)]
Merge tag 'efi-2021-07-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-07-rc4-2

Simplify configuration using HASH functions
Fix Coverity warnings related to EFI TCG2 protocol
Enable PE/COFF image measurement

3 years agoefi_loader: add PE/COFF image measurement
Masahisa Kojima [Wed, 26 May 2021 03:09:58 +0000 (12:09 +0900)]
efi_loader: add PE/COFF image measurement

"TCG PC Client Platform Firmware Profile Specification"
requires to measure every attempt to load and execute
a OS Loader(a UEFI application) into PCR[4].
This commit adds the PE/COFF image measurement, extends PCR,
and appends measurement into Event Log.

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Replace CONFIG_HASH_CALCULATE by CONFIG_HASH
Fix conversions between pointers and u64.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 years agoefi_loader: Work-around build issue due to missing hash_calculate()
Alexandru Gagniuc [Mon, 24 May 2021 19:28:57 +0000 (14:28 -0500)]
efi_loader: Work-around build issue due to missing hash_calculate()

The hash_calculate() symbol is provided by hash-checksum.c. It depends
on hash_progressive_lookup_algo(), provided when CONFIG_HASH=y.

The issue is that hash_calculate() is used by the efi_loader,
irregardless of CONFIG_FIT_SIGNATURE. As pointed out in
commit 87316da05f2f ("lib: introduce HASH_CALCULATE option"),
enabling hash_calculate() based on CONFIG_FIT_SIGNATURE is incorrect.

To resolve this, use CONFIG_HASH as the compile switch for
hash-checksum.c. This ensures that all dependencies are compiled, and
is the most natural Kconfig to use.

There is the issue of having to 'select HASH' in a couple of places
that already 'select SHA256'. This is a deeper problem with how hashes
are organized, and fixing it is beyonf the scope of this change.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Masahisa Kojima <masahisa.kojima@linaro.org>
3 years agoRevert "lib: introduce HASH_CALCULATE option"
Alexandru Gagniuc [Mon, 24 May 2021 19:28:56 +0000 (14:28 -0500)]
Revert "lib: introduce HASH_CALCULATE option"

When we think of Kconfig, we usually think of features that we like
to enable or not. Ideally, we wouldn't use Kconfig to fix a build
issue, although sometimes it might make sense. With Kconfig it's hard
to guarantee that the fix is universal. We can only say that it works
for the set of tested configurations. In the majority of cases, it's
preferable to let the linker figure things out for us.

The reverted commit attempted to fix a build issue by adding an
invisible Kconfig option. This is wrong in several ways:

It invents a new Kconfig variable when CONFIG_HASH already
exists for the same purpose.
Second, hash-checksum.c makes use of the hash_progressive_lookup_algo()
symbol, which is only provided with CONFIG_HASH, but this dependency
was not expressed in the reverted patch.

It feels like Kconfig is turning into a listing of all available
source files, and a buffet to 'select' which ones to compile. The
purpose of this revert is to enable the next change to make use of
CONFIG_HASH instead of adding to Kconfig.

This reverts commit 87316da05f2fd49d3709275e64ef0c5980366ade.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Masahisa Kojima <masahisa.kojima@linaro.org>
3 years agoefi_loader: Fix coverity warnings for efi tcg2 protocol
Ilias Apalodimas [Wed, 26 May 2021 18:01:00 +0000 (21:01 +0300)]
efi_loader: Fix coverity warnings for efi tcg2 protocol

Coverity reported 3 warnings on the current code.
CID 331856, 331855, 331854 on the latest scan.

Fix the rest of the warnings by initializing the variables before
passing them to tpm2_get_pcr_info().
In order to avoid future warnings and errors initialize them to 0 within
the function as well, since the values are always OR'ed after querying the
hardware.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 years agoarm: dts: stm32mp157c-odyssey-som: enable the RNG1
Grzegorz Szymaszek [Mon, 19 Apr 2021 17:55:52 +0000 (19:55 +0200)]
arm: dts: stm32mp157c-odyssey-som: enable the RNG1

Enable the true random number generator. It can be used, for example, to
generate partition UUIDs when partitioning with the gpt command. The
generator is already enabled in the device trees of several other
STM32MP1‐based boards, like DKx or DHCOM.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoconfigs: stm32mp: Enable UNZIP on STMicroelectronics stm32mp15 boards
Patrick Delaunay [Thu, 6 May 2021 07:31:00 +0000 (09:31 +0200)]
configs: stm32mp: Enable UNZIP on STMicroelectronics stm32mp15 boards

The CMD_UNZIP provides the 'gzwrite' command, which is convenient
for writing e.g. gz-compressed images to eMMC from U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoARM: stm32: Enable UNZIP on DHSOM by default
Marek Vasut [Mon, 3 May 2021 11:31:48 +0000 (13:31 +0200)]
ARM: stm32: Enable UNZIP on DHSOM by default

The CMD_UNZIP provides the 'gzwrite' command, which is convenient
for writing e.g. gz-compressed images to eMMC from U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoARM: stm32: Add additional ID register check for KSZ8851 presence
Marek Vasut [Mon, 3 May 2021 11:31:39 +0000 (13:31 +0200)]
ARM: stm32: Add additional ID register check for KSZ8851 presence

Currently the code sets eth1addr only if /ethernet1 alias exists in DT,
the node pointed to by the alias has "micrel,ks8851-mll" compatible
string, and the KSZ8851 CCR register read indicates programmed EEPROM
is not connected.

This is not sufficient to detect cases where the DT still contains the
KSZ8851 nodes, but the chip itself is not present. Extend the detection
to handle these cases.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoARM: stm32: Update dhelectronics/dh_stm32mp1/MAINTAINERS file
Christoph Niedermaier [Wed, 5 May 2021 16:23:51 +0000 (18:23 +0200)]
ARM: stm32: Update dhelectronics/dh_stm32mp1/MAINTAINERS file

Adding new DH electronics mailing list.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoreset: stm32: Fix bank and offset computation
Patrice Chotard [Wed, 28 Apr 2021 11:42:45 +0000 (13:42 +0200)]
reset: stm32: Fix bank and offset computation

BITS_PER_LONG is used to represent register's size which is 32.
But when compiled on arch64, BITS_PER_LONG is then equal to 64.

Fix bank and offset computation to make it work on arch32 and
arch64 and ensure that register's size is always equal to 32.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agodfu: dfu_mtd: remove the mtd_block_op error when mtd_lock is not supported
Patrick Delaunay [Wed, 10 Mar 2021 09:27:22 +0000 (10:27 +0100)]
dfu: dfu_mtd: remove the mtd_block_op error when mtd_lock is not supported

Fix the result of DFU_OP_WRITE operation in mtd_block_op function
when mtd_lock is not supported (-EOPNOTSUPP) to avoid DFU stack
error on the DFU manifestation of the MTD device, when
dfu_flush_medium_mtd is called.

Without this patch, dfu-util failed on dfuERROR state at the end
of the write operation on the alternate even if MTD write
opeartion is correctly performed.

$> dfu-util -a 3 -D test.bin
....
DFU mode device DFU version 0110
Device returned transfer size 4096
Copying data from PC to DFU device
....
Download [=========================] 100%       225469 bytes
Download done.
state(10) = dfuERROR, status(14) = Something went wrong,
  but the device does not know what it was Done!

Fixes: 65f3fc18fc1e ("dfu_mtd: Add provision to unlock mtd device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
3 years agoMerge tag 'ti-v2021.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Thu, 27 May 2021 11:42:49 +0000 (07:42 -0400)]
Merge tag 'ti-v2021.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-ti

- Fix reset for AM64 platforms
- Enable networking PHY driver for AM64
- Fix default R5F cluster setting in J7

3 years agoMerge branch '2021-05-26-assorted-bugfixes'
Tom Rini [Thu, 27 May 2021 11:41:25 +0000 (07:41 -0400)]
Merge branch '2021-05-26-assorted-bugfixes'

3 years agoARM: ti: Increase the allocated size for MLO.raw
Faiz Abbas [Mon, 19 Apr 2021 06:50:27 +0000 (12:20 +0530)]
ARM: ti: Increase the allocated size for MLO.raw

MLO has increased to a size greater than the allocated
128 kB in dfu_alt_info_emmc and _mmc.

Therefore, double the allocated size for MLO.raw in
the default environment.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210419065027.5834-1-a-govindraju@ti.com
3 years agoarm: dts: k3-am642-sk: Add sysreset controller node
Suman Anna [Fri, 14 May 2021 01:10:57 +0000 (20:10 -0500)]
arm: dts: k3-am642-sk: Add sysreset controller node

The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 SK.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
3 years agoarm: dts: k3-am642-evm: Add sysreset controller node
Suman Anna [Fri, 14 May 2021 01:10:56 +0000 (20:10 -0500)]
arm: dts: k3-am642-evm: Add sysreset controller node

The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 EVM.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
3 years agofirmware: ti_sci: Update ti_sci_msg_req_reboot to include domain
Dave Gerlach [Fri, 14 May 2021 01:10:55 +0000 (20:10 -0500)]
firmware: ti_sci: Update ti_sci_msg_req_reboot to include domain

The ti_sci_msg_req_reboot message payload has been extended to include a
domain field, but for the purposes of u-boot this should be zero to
reset the entire SoC as it did before. Include domain for completeness
and set to zero to ensure proper operation.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>