Simon Glass [Thu, 23 Jan 2020 18:48:14 +0000 (11:48 -0700)]
i2c: designware_i2c: Rewrite timing calculation
At present the driver can end up with timing parameters which are slightly
faster than those expected. It is possible to optimise the parameters to
get the best possible result.
Create a new function to handle the timing calculation. This uses a table
of defaults for each speed mode rather than writing it in code.
The function works by calculating the 'period' of each bit on the bus in
terms of the input clock to the controller (IC_CLK). It makes sure that
the constraints are met and that the different components of that period
add up correctly.
This code was taken from coreboot which has ended up with this same
driver, but now in a much-different form.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Thu, 23 Jan 2020 18:48:12 +0000 (11:48 -0700)]
i2c: designware_i2c: Drop scl_sda_cfg parameter
Instead of passing this parameter into __dw_i2c_set_bus_speed(), pass in
the driver's private data, from which the function can obtain that
information. This allows the function to have access to the full state of
the driver.
Simon Glass [Thu, 23 Jan 2020 18:48:07 +0000 (11:48 -0700)]
i2c: designware_i2c: Rename 'max' speed to 'high' speed
Some SoCs support a higher speed than what is currently called 'max' in
this driver. Rename it to 'high' speed, which is the official name of the
3.4MHz speed.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jun Chen <ptchentw@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Thu, 23 Jan 2020 18:48:06 +0000 (11:48 -0700)]
i2c: designware_i2c: Include clk.h in the header file
We use struct clk here so really should include this header file to avoid
build errors. Also switch the order of clk.h in the C file to match the
required code style.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Jun Chen <ptchentw@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Joel Johnson [Sun, 26 Jan 2020 16:48:58 +0000 (09:48 -0700)]
arm: mvebu: fix A38x breakage from commit bb872dd930cc
This function parameter usage of load_addr was incorrectly caught in
the clarifying renames of commit bb872dd930cc, which results in boot
failures on Marvell A38x.
Signed-off-by: Joel Johnson <mrjoel@lixil.net> Patch-to: Simon Glass <sjg@chromium.org>
Andre Przywara [Fri, 10 Jan 2020 01:47:32 +0000 (01:47 +0000)]
sunxi: Automate loading from 128KB MMC offset
Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset")
we support having the SPL loaded from either the traditional 8KB SD
card/eMMC offset, or from the alternative location at 128KB. However the
sector to find the U-Boot image was still hard-coded at compile time,
and had to be adjusted for one of the two choices.
Since we can actually override the function to return the sector offset,
we can just check the boot source byte there to select the proper offset
based on from where the SPL was loaded.
This allows the very same binary image to be loaded from either 128KB or
8KB, with the U-Boot proper image always being located just behind the SPL.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Fri, 10 Jan 2020 01:47:31 +0000 (01:47 +0000)]
sunxi: SPL: Factor out sunxi_get_boot_source()
The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into
a certain location in SRAM, so the SPL can easily determine where to
load U-Boot proper from.
Factor out reading this value, as it will come in handy again shortly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
On m68k, block_cache list is relocated, but next and prev list
pointers are not adjusted to the relocated struct list_head address,
so the first iteration over the block_cache list hangs.
This patch initializes the block_cache list after relocation.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com> Reviewed-by: Eric Nelson <eric@nelint.com>
Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.
While at that fix dma_unmap_single() call to match new prototype
Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
do dcache flush/invalidate operations as required. For example, see
see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
drivers/mtd/nand/raw/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate operations, so that drivers need not implement
them locally.
mingming lee [Thu, 16 Jan 2020 08:11:42 +0000 (16:11 +0800)]
fastboot: mt85xx: add command to flash/erase emmc hwpart
This patch includes the following:
1. Add fastboot command to erase the whole EMMC_USER
2. Add fastboot command to flash image at EMMC_BOOT1
3. Add fastboot command to erase the whole EMMC_BOOT1
4. Enale CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT for mt8518
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
lib: Kconfig dependencies for pseudo-random library
drivers/rng/sandbox_rng.c requires rand() to be defined but configuration
option CONFIG_CONFIG_LIB_RAND selected in drivers/rng/Kconfig does not
exist.
test/lib/test_aes.c requires rand() to be defined.
Fix the selection criteria for choice "Pseudo-random library support type".
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_SPL_RSA is meant to control if lib/rsa/* is used for SPL. Adjust
lib/Makefile to consider this setting.
This was correctly setup with commit 51c14cd128f4 ("verified-boot: Minimal
support for booting U-Boot proper from SPL") and got lost with commit 089df18bfe9d ("lib: move hash CONFIG options to Kconfig").
Fixes: 089df18bfe9d ("lib: move hash CONFIG options to Kconfig") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Chen-Yu Tsai [Sun, 12 Jan 2020 15:36:15 +0000 (23:36 +0800)]
sunxi: Add Libre Computer ALL-H5-CC H5 board
The Libre Computer ALL-H5-CC board is an upgraded version of the
ALL-H3-CC. Changes include:
- Gigabit Ethernet via external RTL8211E Ethernet PHY
- 16 MiB SPI NOR flash memory
- PoE tap header
- Line out jack removed
Only H5 variant test samples were made available, and the vendor is not
certain whether other SoC variants would be made or not. Furthermore the
board is a minor upgrade compared to the ALL-H3-CC. Thus the device tree
simply includes the one for the ALL-H3-CC, and adds the changes on top.
The device tree was synced over from the Linux kernel, along with other
H3/H5 changes, in a previous patch. Thus only the defconfig and an entry
to the MAINTAINERS file is added.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[jagan: drop CONFIG_SYS_SPI_U_BOOT_OFFS] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Chen-Yu Tsai [Sun, 12 Jan 2020 15:36:14 +0000 (23:36 +0800)]
sunxi: Add Libre Computer ALL-H3-IT H5 board
The Libre Computer ALL-H3-IT board is a small single board computer that
is roughly the same size as the Raspberry Pi Zero, or around 20% smaller
than a credit card.
The board features:
- H2, H3, or H5 SoC from Allwinner
- 2 DDR3 DRAM chips
- Realtek RTL8821CU based WiFi module
- 128 Mbit SPI-NOR flash
- micro-SD card slot
- micro HDMI video output
- FPC connector for camera sensor module
- generic Raspberri-Pi style 40 pin GPIO header
- additional pin headers for extra USB host ports, ananlog audio and
IR receiver
Only H5 variant test samples were made available, but the vendor does
have plans to include at least an H3 variant. Thus the device tree is
split much like the ALL-H3-CC, with a common dtsi file for the board
design, and separate dts files including the common board file and the
SoC dtsi file. The other variants will be added as they are made
available.
The device tree was synced over from the Linux kernel, along with other
H3/H5 changes, in a previous patch. Thus only the defconfig and an entry
to the MAINTAINERS file is added.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[jagan: drop CONFIG_SYS_SPI_U_BOOT_OFFS] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jan 2020 01:29:10 +0000 (01:29 +0000)]
sunxi: move CONFIG_SYS_SPI_U_BOOT_OFFS out of defconfig
For Allwinner SoCs the CONFIG_SYS_SPI_U_BOOT_OFFS value is not really a
board choice: The boot ROM only loads the SPL from offset 0 of the SPI
NOR flash, and loads at most 32KB. This is a similar situation as on MMC,
so consequently we create our "joint" image (SPL + U-Boot proper) with
that 32KB offset during the build.
So define the value of this symbol to be 32KB by default for every
Allwinner SoC. This removes the definition of this symbol from the
_defconfig files, and avoids every board to define this over and over
again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Wed, 1 Jan 2020 23:44:49 +0000 (23:44 +0000)]
sunxi: defconfig: R40 boards: enable USB
Now that the USB PHY on the Allwinner R40 SoC is supported, enable USB
support for the two R40 boards U-Boot supports.
For this we need to add the GPIO pin that powers the USB port(s), also
enable the usual suspects (OHCI/EHCI support).
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Wed, 1 Jan 2020 23:44:48 +0000 (23:44 +0000)]
phy: sun4i-usb: Add Allwinner R40 support
Since every Allwinner USB PHY seems to be slightly different from each
other, we need to add the compatible string and the respective data
structure to make it work on the R40/V40 SoC.
Nothing spectacular this time, just one less USB controller than the H3.
Copied from the Linux kernel.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
- cleanup of pinmux node names
- addition of Security ID, MBUS, CSI, crypto engine, video codec,
pmu, and thermal sensor device nodes for both SoCs
- addition of deinterlacing engine device node on H3
- cleanup of RTC device node and addition of its clocks
- various board cleanups and improvements
- removal of pinmux node for GPIO lines
- cpufreq / DVFS
- HDMI output
- UART-based Bluetooth
- audio codec
- USB ports
- new boards
Most of the changes don't concern U-boot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Simon Glass [Sat, 28 Dec 2019 17:45:07 +0000 (10:45 -0700)]
common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sat, 28 Dec 2019 17:45:04 +0000 (10:45 -0700)]
common: Rename and move source()
This function has a very generic name which does not adequately describe
its purpose. Rename it and move it to image.h, since it relates to reading
a script from an image.
Simon Glass [Sat, 28 Dec 2019 17:44:54 +0000 (10:44 -0700)]
common: Move device-tree setup functions to fdt_support.h
These functions relate to setting up the device tree for booting the OS.
The fdt_support.h header file supports similar functions, so move these
there.
Simon Glass [Sat, 28 Dec 2019 17:44:51 +0000 (10:44 -0700)]
common: Drop CONFIG_HAS_POST
This only exists to control whether the post/ directory is build. It is
just as easy to check this in the Makefile. Remove CONFIG_HAS_POST and use
an ifdef in the Makefile instead.
Simon Glass [Sat, 28 Dec 2019 17:44:50 +0000 (10:44 -0700)]
common: Drop CONFIG_POST_STD/ALT_LIST
These CONFIG options are not used anymore. CONFIG_POST_ALT_LIST just
causes CONFIG_POST_STD_LIST to be set and it causes tests.c to be
compiled. So just make compiling tests.c unconditional.
Patrick Delaunay [Mon, 13 Jan 2020 08:33:51 +0000 (09:33 +0100)]
tools: ftdgrep: correct the find regions loop in do_fdtgrep
Use realloc and update the loop executed in do_fdtgrep to find all
the regions: only test count > max_region after the second pass.
This patch solve an issue if the number of region found (count)
is greater then the default value (max_region = count = 100):
the second pass is never executed, because the loop stops after
the first pass (i = 0, count > 100, max_regions = 100)
with error -1 and the error message
"Internal error with fdtgrep_find_region".
I also update the error message.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrik Dahlström [Sat, 21 Dec 2019 16:25:12 +0000 (17:25 +0100)]
serial: ns16550: Use old baud rate divisor for flushing if not given
If baud_divisor is not set (i.e. == -1), we should use the baud divisor
already in use for flushing the xmit register. If we don't flush the
xmit register, then SPL will hang.
Patrick Delaunay [Fri, 20 Sep 2019 07:20:12 +0000 (09:20 +0200)]
cmd: mtd: solve bad block support in erase command
This patch modify the loop in mtd erase command to erase one by one
the blocks in the requested area.
It solves issue on "mtd erase" command on nand with existing bad block,
the command is interrupted on the first bad block with the trace:
"Skipping bad block at 0xffffffffffffffff"
In MTD driver (nand/raw), when a bad block is present on the MTD
device, the erase_op.fail_addr is not updated and we have the initial
value MTD_FAIL_ADDR_UNKNOWN = (ULL)-1.
This case seems normal in nand_base.c:nand_erase_nand(),
we have the 2 exit cases during the loop:
1/ we have a bad block (nand_block_checkbad)
instr->state = MTD_ERASE_FAILED
loop interrupted (goto erase_exit)
So erase_op.fail_addr can't be used if bad blocks were present
in the erased area; we need to use mtd_erase only one block to detect
and skip these existing bad blocks (as it is done in nand_util.c).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Pankaj Bansal [Wed, 15 Jan 2020 05:57:00 +0000 (05:57 +0000)]
board: fsl: lx2160a: Fix the loop in board_fix_fdt function
Fix loop in board_fix_fdt that erroneously increments the counter
in all cases whereas the counter should be incremented only if a
matching string has been found.
Alex Marginean [Fri, 10 Jan 2020 23:05:40 +0000 (01:05 +0200)]
arch: armv8: fsl-layerscape: export serdes config to environment
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line. It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Alex Marginean [Fri, 10 Jan 2020 23:05:39 +0000 (01:05 +0200)]
board: fsl: ls1028a: free up arch_misc_init
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS. Move this code to misc_init_r. This is consistent with LS gen 2
and T series SoCs/boards.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Alex Marginean [Fri, 10 Jan 2020 23:05:36 +0000 (01:05 +0200)]
board: fsl: lx2160a: free up arch_misc_init
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS. Move this code to misc_init_r. This is consistent with LS
gen 2 and T series SoCs/boards.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Alex Marginean [Fri, 10 Jan 2020 21:51:32 +0000 (23:51 +0200)]
armv8: ls1028a_serdes: Add few missing serdes protocols
Add serdes protocol 0x7777, 0x9999, 0xb998, 0xbb56 to supported list.
These protocols are supported and functional but they trigger a warning
in U-Boot console at boot because they are not on this list.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Alex Marginean [Fri, 10 Jan 2020 21:32:20 +0000 (23:32 +0200)]
drivers: net: fsl_enetc: fix SXGMII MAC configuration
Separate MAC and serdes configuration, MAC configuration must be applied
at each enetc_start() as FLR clears it.
This restores traffic for ENETC interfaces in USXGMII mode.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
projects / u-boot.git / log