Tom Rini [Mon, 20 Apr 2020 15:14:22 +0000 (11:14 -0400)]
Merge tag 'ti-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot on am335x guardian board
- Increase OPSI speed on AM65x and J721E devices
- Use JTAD register for identifying K3 devices.
- Update TI entry in MAINTAINERS file.
arm: mach-k3: Use JTAD_ID register for device identification
JTAG ID register is defined by IEEE 1149.1 for device identification.
Use this JTAG ID register for identifying AM65x[0] and J721E[1] devices
instead of using SoC specific registers.
Lukasz Majewski [Wed, 26 Feb 2020 11:37:01 +0000 (12:37 +0100)]
config: imx: Enable CONFIG_PHY_FIXED on HSC and DDC i.MX53 boards
The CONFIG_PHY_FIXED is necessary to allow DSA switch work in U-Boot after
the
commit 3bf135b6c367 ("drivers: net: phy: Ignore PHY ID 0 during PHY probing").
This particular device - LAN9303 - returns phy_id == 0. With
CONFIG_PHY_FIXED enabled HSC and DDC boards work again with the same U-Boot
binary.
Lukasz Majewski [Wed, 26 Feb 2020 11:37:00 +0000 (12:37 +0100)]
dts: imx: Add fixed-link property to HSC and DDC (imx53) devices
Those two boards are supposed to be run with a single u-boot binary.
There are notable differences though - HSC uses DSA switch (which
phy_id == 0x0) and DCC (DP83848C).
After the commit 3bf135b6c367
("drivers: net: phy: Ignore PHY ID 0 during PHY probing") the PHY devices
with phy_id == 0 are not created in U-Boot anymore. This caused regression
on HSC.
To fix this problem - the fec's 'fixed-link' node has been introduced and
the phy_id is not assessed anymore. This approach works on both boards.
Harald Seiler [Wed, 15 Apr 2020 18:04:53 +0000 (20:04 +0200)]
ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETH
Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator
to the relevant device-trees and augment the FEC node with properties
for the reset GPIO.
It should be noted that the relevant properties for the reset GPIO
already exist in the PHY node (reset-gpios, reset-delay-us,
reset-post-delay-us) but U-Boot currently ignores those and only
supports the bus-level reset properties in the FEC node
(phy-reset-gpios, phy-reset-duration, phy-reset-post-delay).
configs: imxrt1050-evk: enable video support/console
Enable DM_VIDEO subsystem and its BACKLIGHT_GPIO. Then enable
SYS_WHITE_ON_BLACK to have classic black background on display. Need
also to enable CONFIG_SYS_CONSOLE_ENV_OVERWRITE to retrieve
stdin/stdout/stderr from CONFIG_EXTRA_ENV_SETTINGS.
ARM: dts: imxrt1050: allow this dtsi file to be compiled in Linux
Linux doesn't provide skeleton.dtsi file so let's remove its include and
provide #address-cells/size-cells = <1> that were defined in
skeleton.dtsi before.
imxrt1050_evk: add 16bpp video support if video layer enabled
i.MXRT1050 provides mxsfb compatible lcd controller, so let's enable
video mxsfb driver with 16bpp depth if CONFIG_DM_VIDEO is selected since
board has 16bpp only connection.
struct display_timings provides more informations such clock and DE
polarity, so let's refactor the code to use struct display_timings
instead of struct ctfb_res_modes, so we'll become able to get clock and
DE polarity settings and set register according to them in the next patch.
sunxi: display: use common video_ctfb_mode_to_display_timing()
Since video_ctfb_mode_to_display_timing() has been implemented by moving
sunxi_ctfb_mode_to_display_timing() to video_modes.c and it's meant to be
used by other video subsystem, let's use it instead of local
sunxi_ctfb_mode_to_display_timing().
pllv3 PLLs have powerdown/up bits but enable bits too. Specifically
"enable bit" enable the pll output, so when dis/enabling pll by
setting/clearing power_bit we must also set/clear enable_bit.
Igor Opaniuk [Fri, 27 Mar 2020 10:28:25 +0000 (12:28 +0200)]
colibri_imx6: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Fri, 27 Mar 2020 10:28:24 +0000 (12:28 +0200)]
colibri-imx6ull: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Fri, 27 Mar 2020 10:28:23 +0000 (12:28 +0200)]
apalis_imx6: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Fri, 27 Mar 2020 10:28:22 +0000 (12:28 +0200)]
colibri_imx7: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Fri, 27 Mar 2020 10:28:21 +0000 (12:28 +0200)]
colibri_vf: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Fri, 27 Mar 2020 10:28:19 +0000 (12:28 +0200)]
imx8mm_evk: adjust dram size in case bl32 is used
Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
so during MMU initialization U-Boot won't touch this mem area.
BL32 is loaded to the end of DRAM, bl32 payload size is read from
rom_pointer[1]. This relates to the issue described in 59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Fri, 27 Mar 2020 10:28:18 +0000 (12:28 +0200)]
verdin-imx8mm: adjust dram size in case bl32 is used
Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
so during MMU initialization U-Boot won't touch this mem area.
BL32 is loaded to the end of DRAM, bl32 payload size is read from
rom_pointer[1]. This relates to the issue described in 59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
After triggering a "reboot" command in Linux the following
hang in SPL is observed:
U-Boot SPL 2020.04 (Apr 15 2020 - 10:49:29 -0300)
Normal Boot
WDT: Not found!
Trying to boot from MMC2_2
spl: mmc init failed with error: -70
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
This error happens because the CMD_ERR bit is set in the IRQ status
register after booting from Linux.
To ensure a fresh start, force the VMMC supply to get unpowered first.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
board: tqc: tqma6: hw init code disabled for device model
Keep code for non-dm configuration of baseboard WRU4.
It cannot be upgraded to device model as
we have no suitable device tree for it.
These changes were not run-tested on WRU4,
only compile-tested.
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
arm: dt: imx6qdl: add tqma6[qdl] som on mba6 mainboard
The device trees for TQMa6x SOM support variations in
- CPU type: imx6dl- or imx6q-
- MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3)
(plus the respective common/module include trees)
- USBH1 is directly connected to a hub
- USBOTG is connected to a separate connector
and can act as host/device or full OTG port.
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
The i.MX6DP and i.MX6QP incorporate NoC interconnect logic
which needs to be configured in order to use external DDR memory.
This patch enables the SPL to configure the necessary registers
in accordance with the NXP engineering bulletin EB828.
Co-developed-by: Filip Brozović <fbrozovic@gmail.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
Fabio Estevam [Mon, 3 Feb 2020 17:46:22 +0000 (14:46 -0300)]
mx6ulz_14x14_evk: Disable CONFIG_NET
Currently the following build warning is seen:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
===================================================
Since the mx6ulz-evk board does not have networking support, explicitly
disable networking to avoid the board removal.
Fabio Estevam [Mon, 3 Feb 2020 16:09:23 +0000 (13:09 -0300)]
mx6ul_evk: Remove FEC related board code
mx6ul_evk uses DM_ETH, so there is no need to have board code
to setup the FEC IOMUX and to register the network ports via the
old board_eth_init() method.
Remove these FEC related pieces of code.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Patrick Delaunay [Tue, 10 Mar 2020 09:15:05 +0000 (10:15 +0100)]
board_f.c: Ensure 16 alignment of start_addr_sp and reserved memory
Add a function reserve_stack_aligned() to reserved memory with 16 bits
alignment after the stack pointer (gd->start_addr_sp) and use this new
function in board_f.c to reserve all the memory area (malloc, board, gd,
fdt, bootstage, stacks).
This 16 byte alignment is needed for cast on struct pointer
for the reserved memory, for example:
+ x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
+ ARMv8 Instruction Set Overview: quad word, 16 bytes
An other alignment value could be needed for other architecture.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Patrick Delaunay [Tue, 10 Mar 2020 09:15:03 +0000 (10:15 +0100)]
Revert "stm32mp1: remove the imply BOOTSTAGE"
This reverts the workaround introduced by the
commit 16fec9b0bc1a ("stm32mp1: remove the imply BOOTSTAGE")
As the bootstage alignment issue is now solved.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Tue, 10 Mar 2020 09:15:02 +0000 (10:15 +0100)]
board_f.c: Ensure gd->new_bootstage alignment
In reserve_bootstage(), in case size is odd, gd->new_bootstage
is not aligned. In bootstage_relocate(), the platform hangs when
getting access to data->record[i].name.
To avoid this issue, make gd->new_bootstage 16 byte aligned.
To ensure that new_bootstage is 16 byte aligned (at least needed for
x86_64 and ARMv8) and new_bootstage starts down to get enough space,
ALIGN_DOWN macro is used.
Fixes: ac9cd4805c8b ("bootstage: Correct relocation algorithm") Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 13 Jan 2020 10:35:10 +0000 (11:35 +0100)]
dt-bindings: gpio: alignment with kernel v5.3
Update the binding file for gpio, it is just an alignment
with kernel v5.3.
The U-Boot code example for gpio-hog (not directly linked
to binding) is moved in a new file doc/README.gpio.
[commit 21676b706e99 ("gpio: fixes for gpio-hog support")
& 'commit 4762a9988ede ("gpio: add gpio-hog support")']
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:35:09 +0000 (11:35 +0100)]
gpio: add ops to set dir flags
Add the ops for GPIO driver set_dir_flags() to set the dir flags.
The user can update the direction and configuration
of each GPIO with a only call to dm_gpio_set_dir_flags() or
dm_gpio_set_dir() and respecting the configuration provided by
device tree (saved in desc->flags).
When these optional ops are absent, the gpio uclass use the mandatory
ops (direction_output, direction_input, get_value) and desc->flags
to manage only the main dir flags:
- GPIOD_IS_IN
- GPIOD_IS_OUT
- GPIOD_IS_OUT_ACTIVE
- GPIOD_ACTIVE_LOW
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:35:08 +0000 (11:35 +0100)]
gpio: add ops to get dir flags
Add the ops for GPIO driver get_dir_flags(), allows to get dynamically
the current gpio configuration; it is used by the API function
dm_gpio_get_dir_flags().
When these optional ops are absent, the gpio uclass continues to use
the mandatory ops (direction_output, direction_input, get_value) and
value of desc->flags to manage only the main dir flags:
- GPIOD_IS_IN
- GPIOD_IS_OUT
- GPIOD_IS_OUT_ACTIVE
- GPIOD_ACTIVE_LOW
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:35:07 +0000 (11:35 +0100)]
gpio: add support of new GPIO direction flag
This commit manages the new dir flags that can be used in gpio
specifiers to indicate the pull-up or pull-down resistor
configuration for output gpio (GPIO_PULL_UP, GPIO_PULL_DOWN)
or the Open Drain/Open Source configuration for input gpio
(GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE).
These flags are already supported in Linux kernel in gpio lib.
This patch only parse and save the direction flags in GPIO
descriptor (desc->flags), it prepares the introduction of new ops
to manage them.
The GPIO uclass supports new GPIO flags from device-tree
(GPIO_XXX define in include/dt-bindings/gpio/gpio.h)
and translate them in the dir flags (GPIOD_XXX):
- GPIO_PULL_UP => GPIOD_PULL_UP
- GPIO_PULL_DOWN => GPIOD_PULL_DOWN
- GPIO_OPEN_DRAIN => GPIOD_OPEN_DRAIN
- GPIO_OPEN_SOURCE => GPIOD_OPEN_SOURCE
This patch also adds protection in the check_dir_flags function for
new invalid configuration of the dir flags.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:35:06 +0000 (11:35 +0100)]
gpio: update dir_flags management
Update the flag management in GPIO uclass: the desc->flags is always
combined with the requested flags and the GPIO descriptor is updated
for further call.
Add a function dm_gpio_get_dir_flags to get dynamically
the current dir_flags (configuration and value).
This patch prepare introduction of the dir flags support with new ops.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:34:58 +0000 (11:34 +0100)]
dt-bindings: gpio: document the new pull-up/pull-down flags
This commit extends the flags that can be used in GPIO specifiers to
indicate if a pull-up resistor or pull-down resistor should be
enabled.
It is the backport of linux commit ede033e1e863c ('dt-bindings:
gpio: document the new pull-up/pull-down flags')
from Thomas Petazzoni <thomas.petazzoni@bootlin.com>
and integrated in v5.1-rc1
https://github.com/torvalds/linux/commit/ede033e1e863c
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:34:57 +0000 (11:34 +0100)]
dm: pinctrl: migrate pinctrl-generic to livetree
Migrate pinctrl-generic to livetree:
- dev_for_each_property
- dev_read_prop_by_prop
- dev_read_string_count
- dev_read_string_index
and get rid of DECLARE_GLOBAL_DATA_PTR.
This patch solves the parsing issue during sandbox tests for pin
configuration (OF_LIVE is activated in sandbox_defconfig
and sub node are not correctly parsed in
pinctrl_generic_set_state_subnode with fdt lib API).
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 13 Jan 2020 10:34:56 +0000 (11:34 +0100)]
dm: core: add ofnode and dev function to iterate on node property
Add functions to iterate on all property with livetree
- dev_read_first_prop
- dev_read_next_prop
- dev_read_prop_by_prop
and
- ofnode_get_first_property
- ofnode_get_next_property
- ofnode_get_property_by_prop
And helper: dev_for_each_property
For example:
struct ofprop property;
dev_for_each_property(property, config) {
value = dev_read_prop_by_prop(&property, &propname, &len);
or:
for (res = ofnode_get_first_property(node, &property);
!res;
res = ofnode_get_next_property(&property))
{
value = ofnode_get_property_by_prop(&property, &propname, &len);
....
}
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 13 Jan 2020 10:34:55 +0000 (11:34 +0100)]
dm: pinctrl: convert pinctrl-single to livetree
Convert 'pinctrl-single' using livetree functions
- dev_read_prop
- dev_read_u32_default
- dev_read_u32_array
- dev_read_bool
- dev_read_addr
and get rid of DECLARE_GLOBAL_DATA_PTR.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Karl Palsson [Mon, 6 Apr 2020 15:58:02 +0000 (15:58 +0000)]
README: remove requirement for CHANGELOG entry
As indicated elsewhere in the README, the standalone CHANGELOG file was
removed in 2010. Drop the instructions for creating patches on creating
a standalone CHANGELOG entry.
'|' is the "expected" segment header start position.
But in that page, there are only 2 bytes left, can't contain the 4 bytes
segment header.
So btrfs compression will skip that 2 bytes, put the segment header in
next page directly.
Uboot doesn't have such check, and read the header with 2 bytes offset,
result 0x05470000 (88539136), other than the expected result
0x00000547 (1351), resulting above error.
Follow the btrfs-progs restore implementation, by introducing tot_in to
record total processed bytes (including headers), and do proper page
boundary skip to fix it.
Please note that, current code base doesn't parse fs_info thus we can't
grab sector size easily, so it uses PAGE_SIZE, and relying on fs open
time check to exclude unsupported sector size.
Signed-off-by: Qu Wenruo <wqu@suse.com> Cc: Marek Behun <marek.behun@nic.cz> Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Thu, 26 Mar 2020 05:35:55 +0000 (13:35 +0800)]
fs: btrfs: Reject fs with sector size other than PAGE_SIZE
Although in theory u-boot fs driver could easily support more sector
sizes, current code base doesn't have good enough way to grab sector
size yet.
This would cause problem for later LZO fixes which rely on sector size.
And considering that most u-boot boards are using 4K page size, which is
also the most common sector size for btrfs, rejecting fs with
non-page-sized sector size shouldn't cause much problem.
This should only be a quick fix before we implement better sector size
support.
Signed-off-by: Qu Wenruo <wqu@suse.com> Cc: Marek Behun <marek.behun@nic.cz> Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tom Rini [Thu, 16 Apr 2020 21:14:44 +0000 (17:14 -0400)]
Merge tag 'arc-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
This is pretty minor set of changes mostly touching HSDK board:
* Enable on-chip reset controller on HSDK
* Add possibility to turn-on & off L2$ on more
recent ARC HS processors.
* AXI tunnel clock calculation on HSDK
Tom Rini [Thu, 16 Apr 2020 20:41:40 +0000 (16:41 -0400)]
Merge tag 'efi-2020-07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc1
This pull request
* provides an implementation of UEFI secure booting
* fixes a problem with the rsa_mod_exp driver which stops some boards
from booting when CONFIG_RSA is enabled which is needed for UEFI
secure booting
* enables the EFI_RNG_PROTOCOL if DM_RNG is enabled
* fixes some function comments
projects / u-boot.git / log