Tom Rini [Thu, 1 Mar 2018 17:41:21 +0000 (12:41 -0500)]
Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03
- Moving some macros to Kconfig
# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg: aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg: aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
Eugeniy Paltsev [Tue, 6 Feb 2018 14:12:09 +0000 (17:12 +0300)]
NET: designware: fix clock enable
After commit ba1f966725223 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.
Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.
If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.
Fix it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Mario Six [Mon, 15 Jan 2018 10:08:25 +0000 (11:08 +0100)]
net: phy: marvell 88e151x: Fix handling of bare RGMII interface type
Commit 68e6ecadc551 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.
Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Mon, 15 Jan 2018 10:08:22 +0000 (11:08 +0100)]
net: tsec: Fix memory leak in error path
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.
Free the device structure in the error case.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.
This saves around 740 bytes for the am335x_evm SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 24 Feb 2018 21:50:41 +0000 (16:50 -0500)]
bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig. We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use. We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig. In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files. The previous default
only applied in some cases, even on a specific SoC family.
Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Thu, 15 Feb 2018 14:41:40 +0000 (12:41 -0200)]
imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function"
Commit d695d6627803 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:
U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0
Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.
Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Breno Lima <breno.lima@nxp.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:36:41 +0000 (17:36 +0100)]
rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.
In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.
Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.
References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Jagan Teki [Fri, 23 Feb 2018 07:43:11 +0000 (13:13 +0530)]
rockchip: rk3288: Fix wrong TPL_TEXT_BASE
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So 0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.
Jagan Teki [Fri, 23 Feb 2018 07:43:10 +0000 (13:13 +0530)]
rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 16 Feb 2018 15:07:25 +0000 (16:07 +0100)]
rockchip: clk: rk3368: handle clk_enable requests for GMAC
Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
enabled (no actual action is necessary as the gates are open
after reset)
References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Philipp Tomsich [Fri, 16 Feb 2018 15:07:24 +0000 (16:07 +0100)]
rockchip: clk: rk3399: handle clk_enable requests for GMAC
Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.
References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Adam Ford [Tue, 6 Feb 2018 13:58:59 +0000 (07:58 -0600)]
Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
This converts the following to Kconfig:
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_DNS
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_PXE
CONFIG_BOOTP_SUBNETMASK
CONFIG_CMDLINE_EDITING
CONFIG_AUTO_COMPLETE
CONFIG_SYS_LONGHELP
CONFIG_SUPPORT_RAW_INITRD
CONFIG_ENV_VARS_UBOOT_CONFIG
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-run the migration] Signed-off-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:53 +0000 (17:38 +0100)]
rockchip: video: update MAINTAINERS
The video drivers (VOP, HDMI encoder, LVDS encoder, MIPI encoder) for
Rockchip SOCs are self-contained and are mainly impacted by other
changes in the architecture support (e.g. pinctrl, clocking, etc).
Let's add these to the list of files maintained as part of the
Rockchip port.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:52 +0000 (17:38 +0100)]
rockchip: video: rk_vop: migrate to livetree
This migrates rk_vop (the shared functions used by multiple VOP
mini-drivers) to be compatible with a live tree.
Unfortunately, there's
(i) a lot of tree traversal needed for a VOP (as each active VOP
vnode references back to the endpoints in the encoders and vice
versa) to configure the connection between VOPs and encoders;
(ii) the DTS binding is not too sane and one needs to walk a node's
parents (the original code just assumed that the device would
live 3 levels above the property linked through a phandle) until
a UCLASS_DISPLAY device can be found.
As part of the migration, the code for finding the enclosing display
device has been changed to not assume a specific depth of nesting
(i.e. we walk until we reach the root or find a matching device) and
to use the newly introduced (in the same series) ofnode_get_parent()
function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:51 +0000 (17:38 +0100)]
rockchip: video: rk_hdmi: migrate to livetree
The rk_hdmi (shared functions for multiple HDMI mini-drivers) has been
using devfdt_get_addr() to read the HDMI controller's IO base address.
This will cause a failure with a live tree.
This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Kever Yang [Fri, 23 Feb 2018 16:38:50 +0000 (17:38 +0100)]
core: add ofnode_get_by_phandle() api
We need to get ofnode from a phandle, add interface to support
both live dt and fdt.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:38:49 +0000 (17:38 +0100)]
core: ofnode: add ofnode_get_parent function
The Rockchip video drivers need to walk the ofnode-parrents to find
an enclosing device that has a UCLASS_DISPLAY driver bound. This
adds a ofnode_get_parent()-function that returns the parent-node.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Alexey Brodkin [Wed, 21 Feb 2018 10:06:26 +0000 (13:06 +0300)]
Makefile: Don't mess with .text section location for selected arches
Most of architectures have .text section situated in the very beginning
of U-Boot binary and thus it is very logical that CONFIG_SYS_TEXT_BASE
is used on final linkage step to specify where U-Boot gets linked to.
For that we pass the following construction to the LD:
---------------------------->8-----------------------
xxx-ld ... -Ttext $(CONFIG_SYS_TEXT_BASE) ...
---------------------------->8-----------------------
But there could be exceptions. For example:
1. In case of ARCv2 we want to put vectors table in its own section
.ivt in front of .text section which means we need either add an
offset to CONFIG_SYS_TEXT_BASE to compensate for .ivt or don't
pass "-Ttext" to the LD at all and specify link base in linker
script directly.
2. Some architectures even though have .text section in the very
beginning of the U-Boot image still use different symbols to
specify link-base:
* NIOS2: CONFIG_SYS_MONITOR_BASE (which I really like because
that exactly what makes sense - where out image starts but not
beginning of its .text section which just happened to match the
whole image beginning)
* EXTENSA: CONFIG_SYS_TEXT_ADDR
* X86: Which doesn't use CONFIG_SYS_MONITOR_BASE in case of EFI
otherwise sets explicit link base in u-boot.lds
I think that's good to allow for flexibility and don't require each and
every architecture or even platform to specify CONFIG_SYS_TEXT_BASE as well
as use it to set .text section location.
So let's only pass "-Ttext xxx" for those architectures who don't set
link-base explicitly in their linker scripts.
This patch iaddresses comments for previously sent
https://patchwork.ozlabs.org/patch/867540/.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Karl Beldan [Tue, 20 Feb 2018 23:30:08 +0000 (23:30 +0000)]
arm64: show_regs: Dump the LRs HW values
These were dropped in [1], after relocation, for their values offset by
reloc_off.
Unconditionally show the HW values and add a '(reloc)' hint for the
offset values showed after relocation.
Also, the LRs' dumps are now formatted the same way the other regs' are.
[1] Commit 082693f4 ("arm64 :show_regs: show the address before relocation")
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Michal Simek [Tue, 20 Feb 2018 09:19:00 +0000 (10:19 +0100)]
net: Remove Xilinx ll_temac driver
ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.
ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9cefdfdba62c069821bbba10273a0a8ed)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Andrew F. Davis [Wed, 14 Feb 2018 17:53:37 +0000 (11:53 -0600)]
ARM: Kconfig: Move TI_SECURE_DEVICE to a common area
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.
Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.
Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.
Fixes: a93fbf4a7892 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig") Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Sat, 10 Feb 2018 21:54:38 +0000 (16:54 -0500)]
configs: Re-sync with CONFIG_DISTRO_DEFAULTS
A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS. As they plainly intended to, set that flag and
re-sync config files.
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