Stefan Roese [Wed, 7 Apr 2021 07:12:29 +0000 (09:12 +0200)]
mips: octeon: cvmx-coremask.h: Fix cvmx_coremask_dprint() with DEBUG defined
As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros.
This patch switches to the unfortunately necessary #ifdef usage again
to make it work correctly.
Stefan Roese [Fri, 11 Dec 2020 16:06:12 +0000 (17:06 +0100)]
mips: octeon: octeon_ebb7304_defconfig: Enable Octeon PCIe and E1000
This patch changes the MIPS Octeon defconfig to enable some features
for PCIe enablement. This includes CONFIG_BOARD_LATE_INIT to call the
board specific serdes init code.
With these features enabled, the serdes and PCIe driver including the
Intel E1000 driver can be tested on the Octeon EBB7304.
This patch adds the PCIe host controller driver for MIPS Octeon II/III.
The driver mainly consist of the PCI config functions, as all of the
complex serdes related port / lane setup, is done in the serdes / pcie
code available in the "arch/mips/mach-octeon" directory.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Aaron Williams [Fri, 11 Dec 2020 16:06:10 +0000 (17:06 +0100)]
mips: octeon: octeon_ebb7304: Add board specific QLM init code
This patch adds the board specific QLM/DLM init code to the Octeon 3 EBB7304 board. The configuration of each port is read from the
environment exactly as done in the 2013 U-Boot version to keep the
board and it's configuration compatible.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 11 Dec 2020 16:06:07 +0000 (17:06 +0100)]
mips: octeon: Makefile: Enable building of the newly added C files
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Aaron Williams [Fri, 11 Dec 2020 16:06:02 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper.c
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:01 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper-util.c
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:00 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper-jtag.c
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:59 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-helper-fdt.c
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:58 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-helper-cfg.c
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 11 Dec 2020 16:05:56 +0000 (17:05 +0100)]
mips: octeon: Misc changes required because of the newly added headers
With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.
Aaron Williams [Fri, 23 Apr 2021 17:56:32 +0000 (19:56 +0200)]
mips: octeon: Add misc remaining header files
Import misc remaining header files from 2013 U-Boot. These will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Aaron Williams [Fri, 11 Dec 2020 16:05:54 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sso-defs.h header file
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:53 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sriox-defs.h header file
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:51 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-smix-defs.h header file
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:50 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sli-defs.h header file
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:49 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sata-defs.h header file
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:48 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-rst-defs.h header file
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:47 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pow-defs.h header file
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:46 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pko-defs.h header file
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:45 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pki-defs.h header file
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:44 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pip-defs.h header file
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:43 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pepx-defs.h header file
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:42 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pemx-defs.h header file
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:41 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pcsx-defs.h header file
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:40 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pciercx-defs.h header file
Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:39 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pcieepx-defs.h header file
Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:38 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-npi-defs.h header file
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:37 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-mio-defs.h header file
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:36 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-l2c-defs.h header file
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:35 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-ipd-defs.h header file
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:34 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-gserx-defs.h header file
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:33 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-gmxx-defs.h header file
Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:32 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-fpa-defs.h header file
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:31 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-dtx-defs.h header file
Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:30 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-dpi-defs.h header file
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:29 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-dbg-defs.h header file
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:28 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-ciu-defs.h header file
Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:27 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-bgxx-defs.h header file
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:26 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-asxx-defs.h header file
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:25 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-agl-defs.h header file
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:24 +0000 (17:05 +0100)]
mips: octeon: Add misc cvmx-helper header files
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Sat, 24 Apr 2021 17:30:57 +0000 (13:30 -0400)]
Merge tag 'video-2021-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-video
- search for additional detailed timings in the EDID extension block
- rework sunxi DE2 driver and accompanying DW-HDMI platform driver
to drop redundant device specific code, and later use the DT as a
source of information
video: sunxi: de2: switch to public uclass functions
Currently DE2 driver uses functions which are defined in internal
headers. They are not meant to be used outside of uclass framework.
Switch DE2 driver to public ones. This has additional benefit that
device_probe doesn't need to be called manually.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There is no real need to read source_id at probe time. It also doesn't
make sense to store it in driver private data since it's already stored
in class platform data. While this looks like cleanup (and it is), it's
also important for DE2 driver rework because this info will be filled
later (after probe is already executed).
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that there are two ways how hot plug detection can be done.
One is standard way for DW HDMI controller - checking bit 2 in 0x3004
register. Another way is applicable only to Allwinner custom PHY - by
checking bit 19 in register 0x10038. Both methods are equally good as
far as we know.
Use standard method in order to reduce amount of custom code.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
common: edid: Search for valid timing in extension block
One of my monitors have only 4k@60 timing in base EDID block which is
out of range for devices with HDMI 1.4. It turns out that it has
additional detailed timings in CTA-861 Extension Block and two of them
are appropriate for HDMI 1.4.
Add additional search for valid detailed timing in extension block.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
common: edid: extract code for detailed timing search
Code which searches for valid detailed timing entry will be used in more
places. Extract it.
No functional change is made. However, descriptors are casted to
edid_detailed_timing instead of edid_monitor_descriptor. Descriptor can
be of either type, but since we're interested only in DTD, it is more
fitting to cast to edid_detailed_timing.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
commit cbea241e935e("efidebug: add multiple device path instances on Boot####")
slightly tweaked the efidebug syntax adding -b, -i and -s for the boot
image, initrd and optional data.
The pytests using this command were adapted as well. However I completely
missed the last "" argument, which at the time indicated the optional data
and needed conversion as well. This patch is adding the missing -s flag
and the tests are back to normal.
Fixes: cbea241e935e("efidebug: add multiple device path instances on Boot####") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_loader: capsule: return a correct error code at find_boot_device()
In case of failure at efi_get_variable_int("BootOrder"), we should
skip examining boot option variables and return an appropriate error
code which is the one the function returned.
Bumping the digest list count, for all supported algorithms, can be
calculated outside of the individual switch statements. So let's do that
for every loop iteration instead and simplify the code a bit.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Marek Vasut [Sun, 11 Apr 2021 16:30:36 +0000 (18:30 +0200)]
doc: imx: psb: Fix missing setexpr arguments
Due to copy-paste error, two of the setexpr arguments were missing.
Add the missing arguments.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ye Li [Tue, 9 Mar 2021 03:26:57 +0000 (19:26 -0800)]
usb: ehci-hcd: Add IAA handshake for removing async QH
According to EHCI spec, software needs to do handshake with HC for
safely removing QH from async list. This handshake is implemented by
setting IAAD (Interrupt on Async Advance Doorbell) bit in USB_USBCMD
register and poll the IAA (Interrupt on Async Advance bit) in the
USB_USBSTS to ensure the HC has released all on-chip state that may
potentially reference one of the data structures just removed.
Current codes only check active status of the last QTD, but this can't
ensure the QH is released from HC. We can meet unrecoverable
"EHCI timed out on TD" errors when running UEFI SCT tests on USB disk.
The USB_ASYNCLISTADDR register is changed to a invalid address when the
issue happens. It is fixed after adding the IAA handshake.
Steps to reproduce the issue:
1. Build the UEFI SCT from https://github.com/tianocore/edk2-test
2. Build the EDK2 UEFI Shell from https://github.com/tianocore/edk2
3. Copy SCT files and Shell.efi to USB disk FAT partition
4. Load the Shell.efi from USB FAT, and run bootefi to execute it
5. After booting into Shell, enter the SCT directory and run "sct -a"
to execute all tests.
6. Tests run about 1 hour and stop with many EHCI timeout errors like
EHCI timed out on TD - token=0x801f8c80
Patrick Delaunay [Wed, 10 Mar 2021 09:16:31 +0000 (10:16 +0100)]
lmb: Add 2 config to define the max number of regions
Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS
to change independently the max number of the regions in lmb
library.
When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to
struct lmb and manage the array size with the element 'max' of struct
lmb_region; their are still allocated in stack.
When CONFIG_LMB_USE_MAX_REGIONS=n, keep the current location in
struct lmb_region to allow compiler optimization.
Increase CONFIG_LMB_RESERVED_REGIONS is useful to avoid lmb errors in
bootm when the number of reserved regions (not adjacent) is reached:
+ 1 region for relocated U-Boot
+ 1 region for initrd
+ 1 region for relocated linux device tree
+ reserved memory regions present in Linux device tree.
The current limit of 8 regions is reached with only 5 reserved regions
in DT.
see Linux kernel commit bf23c51f1f49 ("memblock: Move memblock arrays
to static storage in memblock.c and make their size a variable")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:29 +0000 (10:16 +0100)]
lmb: correct size of the regions array
As in lmb_region, cnt < max and in the lmb library
use region[i] only with i in 0...cnt, this region array size
can be reduced by 1 element without overflow.
This patch allows to reduce the struct lmb size.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Sean Anderson [Thu, 15 Apr 2021 02:02:21 +0000 (22:02 -0400)]
checkpatch: Ignore ENOSYS warnings
There are no system calls in U-Boot, but ENOSYS is still allowed (and
preferred since 42a2668743 ("dm: core: Document the common error codes")).
Silence this warning.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 12 Apr 2021 22:53:07 +0000 (18:53 -0400)]
test: Add test for partitions
This is technically a library function, but we use MMCs for testing, so
it is easier to do it with DM. At the moment, the only block devices in
sandbox are MMCs (AFAIK) so we just test with those.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 20 Apr 2021 15:03:12 +0000 (11:03 -0400)]
test: Alphabetize dm Makefile
Recently, tests have been added primarily to the end of the dm Makefile.
This results in merge conflicts when two people add new tests at the
same time. To reduce these conflicts, alphabetize the makefile.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Stefan Roese [Fri, 12 Mar 2021 08:48:25 +0000 (09:48 +0100)]
mmc: octeontx_hsmmc: Add support for MIPS Octeon
Until now, the Octeontx MMC driver did only support the ARM Octeon
TX/Tx2 platforms. This patch adds support for the MIPS Octeon platform
to this driver. Here a short summary of the changes:
- Enable driver compilation for MIPS Octeon, including the MMC related
header file
- Reorder header inclusion
- Switch to using the clk framework to get the input clock
- Remove some functions for MIPS Octeon, as some registers don't
exist here
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Horatiu Vultur [Wed, 10 Mar 2021 08:31:39 +0000 (09:31 +0100)]
net: jr2: Fix Serdes6G configuration
Sometimes no traffic was getting out on the ports, the root cause was
a wrong configuration of the Serdes6G, which is used on jr2 pcb111.
This patch fixes this issue by applying the correct configuration.