Driver for the Atmel MACB on-chip ethernet controller.
This driver has been tested on the ATSTK1000 board with a AT32AP7000
CPU. It should probably work on AT91SAM926x as well with some minor
modifications.
Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from
AVR32: Add clk and gpio infrastructure for macb0 and macb1
Implement functions for configuring the macb0 and macb1 pins, as
well as functions for getting the clock rate of the various
busses the macb ethernet controllers are connected to.
Include the imi, imls and jffs commands sets by default on ATSTK1000.
Also define CONFIG_BOOTARGS to something more useful, define
CONFIG_BOOTCOMMAND and enable autoboot by default.
AVR32: Use initdram() instead of board_init_memories()
Conform to the "standard" interface and use initdram() instead of
board_init_memories() on AVR32. This enables us to get rid of the
sdram_size member of the global_data struct as well.
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.
As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.
Add -fPIC -mno-init-got to the avr32-specific CFLAGS to make u-boot
position independent. This will make relocation a lot easier.
-mno-init-got means that gcc shouldn't emit code to load the GOT
address into r6 in every function prologue. We do it once and for
all in the early startup assembly code, so enabling this option
makes u-boot a bit faster and smaller.
The assembly parts have always been position-independent, so no code
changes should be necessary.
AVR32: Split start_u_boot into board_init_f and board_init_r
Split the avr32 initialization code into a function to run before
relocation, board_init_f and a function to run after relocation,
board_init_r. For now, board_init_f simply calls board_init_r
at the end.
Gerald Van Baren [Sat, 31 Mar 2007 16:22:10 +0000 (12:22 -0400)]
Add a flattened device tree (fdt) command (1 of 2)
The fdt command uses David Gibson's libfdt library to manipulate as well
as print the flattened device tree. This patch is the new command,
the second part is the modifications to the existing code.
Gerald Van Baren [Sat, 31 Mar 2007 16:13:43 +0000 (12:13 -0400)]
libfdt: Enhanced and published fdt_next_tag()
Enhanced the formerly private function _fdt_next_tag() to allow stepping
through the tree, used to produce a human-readable dump, and made
it part of the published interface.
Also added some comments.
Stefan Roese [Sat, 31 Mar 2007 06:46:08 +0000 (08:46 +0200)]
ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Stefan Roese [Wed, 28 Mar 2007 12:52:12 +0000 (14:52 +0200)]
i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined
The "old" i2c commands (iprobe, imd...) are now compiled in again,
even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
config option.
Haiying Wang [Thu, 7 Dec 2006 16:35:55 +0000 (10:35 -0600)]
Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
Stefan Roese [Fri, 16 Mar 2007 20:11:42 +0000 (21:11 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Michal Simek [Sun, 11 Mar 2007 12:48:24 +0000 (13:48 +0100)]
[Microblaze][PATCH] part 2
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
Michal Simek [Sun, 11 Mar 2007 12:42:58 +0000 (13:42 +0100)]
[Microblaze][PATCH]
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
Stefan Roese [Thu, 8 Mar 2007 09:13:16 +0000 (10:13 +0100)]
[PATCH] Update AMCC Luan 440SP eval board support
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Stefan Roese [Thu, 8 Mar 2007 09:10:18 +0000 (10:10 +0100)]
[PATCH] Update AMCC Yucca 440SPe eval board support
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
Stefan Roese [Wed, 7 Mar 2007 15:43:00 +0000 (16:43 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Stefan Roese [Wed, 7 Mar 2007 15:39:36 +0000 (16:39 +0100)]
[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
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