Michal Simek [Thu, 14 Oct 2021 17:07:52 +0000 (19:07 +0200)]
arm64: zynqmp: Add support for DLC21 (Smartlynq+) board
DLC21 is used as fast jtag cable. The patch adds support for this board
from PS perspective. The most interesting part on the board is seps525 oled
display. Also i2c, gpio, ethernet, uart, SD and eMMC are tested.
T Karthik Reddy [Fri, 1 Oct 2021 11:08:38 +0000 (16:38 +0530)]
mmc: zynq_sdhci: Add xilinx_pm_request weak function
Mini emmc does not use any pmufw and ZYNQMP_FIRMWARE is disabled.
xilinx_pm_request() will not be compiled and causes undefined reference to
`xilinx_pm_request' error. So add a weak function in zynq_sdhci.c file.
Samuel Holland [Wed, 13 Oct 2021 00:40:29 +0000 (19:40 -0500)]
clk: fixed_rate: add dummy disable() function
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function")
implemented .enable, so fixed rate clocks can be used where drivers
might call clk_enable(). Implement the .disable op for the same reason;
some drivers, e.g. USB PHYs, may attempt to disable clocks at runtime.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tom Rini [Mon, 11 Oct 2021 15:11:41 +0000 (11:11 -0400)]
tools: Stop re-defining -std= when building tools
While we intentionally set -std=gnu11 for building host tools, and have
for quite some time, we never dropped -std=gnu99 from tools/Makefile.
This resulted in passing -std=gnu11 ... -std=gnu99 when building, and
gnu99 would win. This in turn would result now in warnings such as:
tools/mkeficapsule.c:25:15: warning: redefinition of typedef 'u32' is a C11 feature [-Wtypedef-redefinition]
typedef __u32 u32;
^
This enables the clock controller driver support on TI's SoCs. This will
fix this GPIO issue at boot time:
request_and_set_gpio: Unable to request GPIO_PR1_MII_CTRL
request_and_set_gpio: Unable to request GPIO_MUX_MII_CTRL
request_and_set_gpio: Unable to request GPIO_FET_SWITCH_CTRL
request_and_set_gpio: Unable to request GPIO_PHY_RESET
This issue comes from the fact that the clock controller is not probed.
Enable the TI's clock controller driver support to solve this.
Simon Glass [Wed, 22 Sep 2021 17:34:44 +0000 (11:34 -0600)]
Makefile: Only build dtc if needed
At present U-Boot always builds dtc if CONFIG_OF_CONTROL is defined, even
when DTC is provided. The built dtc is not actually used, so this is a
waste of time.
Update the Makefile logic to build dtc only if one is not provided to the
build with the DTC variable. Add documentation to explain this.
This saves about 3.5 seconds of elapsed time on a clean build of
sandbox_spl for me.
Ilias Apalodimas [Mon, 11 Oct 2021 21:00:15 +0000 (00:00 +0300)]
treewide: Remove OF_PRIOR_STAGE
The previous patches removed OF_PRIOR_STAGE from the last consumers of the
Kconfig option. Cleanup any references to it in documentation, code and
configuration options.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Ilias Apalodimas [Mon, 11 Oct 2021 21:00:14 +0000 (00:00 +0300)]
board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
So let's remove the option in an effort to simplify U-Boot's config and DTB
management, and use OF_BOARD instead.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Ilias Apalodimas [Mon, 11 Oct 2021 21:00:13 +0000 (00:00 +0300)]
riscv: Remove OF_PRIOR_STAGE from RISC-V boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t. Apart from that they copy it to prior_stage_fdt_address, if
the Kconfig option is selected, which is unnecessary.
So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Chris Morgan [Sat, 21 Aug 2021 01:46:58 +0000 (20:46 -0500)]
rockchip: px30: sync serial flash controller bindings with mainline
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Fri, 20 Aug 2021 17:27:58 +0000 (19:27 +0200)]
doc: rockchip: sort rockchip support list for rk3188
In the list of mainline U-boot supported Rockchip boards
rk3188 is placed below under the name rv3188. Give back it's
original name and sort the list in alphabetical order.
Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 16:48:48 +0000 (11:48 -0500)]
rockchip: board: remove SCLK_GPU from U-Boot DT
Starting with commit 92f1e9a4b31c ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 16:48:47 +0000 (11:48 -0500)]
rockchip: px30: add support for setting cpll clock
Starting with commit 92f1e9a4b31c ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
scripts: remove some configs in config_whitelist.txt
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.
for example:
doc/uImage.FIT/command_syntax_extensions.txt:
... #ifdef CONFIG_OF_* | ...
cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
FLASH|MMC|FAT|EXT4|\
Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 8 Oct 2021 15:15:23 +0000 (09:15 -0600)]
pytest: Show a message when sandbox crashes
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.
With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.
So instead of:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E OSError: [Errno 5] Input/output error
We get:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)
Pali Rohár [Thu, 7 Oct 2021 12:50:58 +0000 (14:50 +0200)]
pci: Skip configuring invalid P2P bridge devices
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Wed, 13 Oct 2021 20:06:02 +0000 (13:06 -0700)]
ARM: tegra: Support EMC frequency tables on Tegra210
The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.
Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.
Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
ARM: tegra: Support multiple reserved memory regions
Support multiple reserved memory regions per device to support platforms
that use both a framebuffer and color conversion lookup table for early
boot display splash.
While at it, also pass along the name, compatible strings and flags of
the carveouts.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.
This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency
The fdtdec_set_carveout() function's parameters are inconsistent with
the parameters passed to fdtdec_add_reserved_memory(). Fix up the order
to make it more consistent.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
fdtdec: Support compatible string list for reserved memory
Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
When retrieving a given carveout for a device, allow callers to query
the name. This helps differentiating between carveouts when there are
more than one.
This is also useful when copying carveouts to help assign a meaningful
name that cannot always be guessed.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
fdtdec: Allow using fdtdec_get_carveout() in loops
In order make it possible to use fdtdec_get_carveout() in loops, return
FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles
present in the given property.
Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stefan Agner [Mon, 4 Oct 2021 09:24:51 +0000 (11:24 +0200)]
nvme: invalidate correct memory range after read
The current code invalidates the range after the read buffer since the
buffer pointer gets incremented in the read loop. Use a temporary
pointer to make sure we have a pristine pointer to invalidate the
correct memory range after read.
Fixes: 704e040a51d2 ("nvme: Apply cache operations on the DMA buffers") Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
Mark Tomlinson [Mon, 27 Sep 2021 21:10:42 +0000 (10:10 +1300)]
rtc: ds1307: Handle oscillator-stop bit correctly
The DS1307 driver was originally based on the DS1337 driver. However,
the functionality of the clock set/get functions has diverged. In the
original DS1337 driver, the set/get functions did the following:
1) Setting the clock ensured the oscillator was enabled.
2) Getting the clock checked and reset the oscillator-stop flag.
The DS1307 does not have an oscillator-stop flag, but the driver tried
(incorrectly) to emulate this by ensuring the oscillator was running. It
really makes no sense to start a stopped clock without setting it.
This patch makes the DS1307 driver behave like the original DS1337
driver again. For the DS1307 itself, this is just a removal of code,
since there is no oscillator-fail bit to check or reset, and the clock
is started when it is set. Since the DS1307 driver can now also be used
for the DS1337 and DS1340 which do have this bit, add code to handle the
oscillator-stop bit in the same was the original DS1337 driver did --
i.e. report that the oscillator had stopped and clear the flag.
This means that setting the date using the date command (which does both
a get and a set) will now clear the oscillator-stop flag in addition to
setting and starting the clock.
The old-style (non-DM) code has not been updated and will be removed in
a future patch. Note that this older code does not support the DS1337,
as there is a separate driver for this. Also note that the original (DM)
code used the wrong control-register address for the DS1337.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
fs: fat: check for buffer size before reading blocks
This patch optimizes the commit mentioned below by avoiding running
a set of commands which are useless in the case when
size < mydata->sect_size and sect_count would be 0.
Fixes: 5b3ddb17ba ("fs/fat/fat.c: Do not perform zero block reads if there are no blocks left") Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
fastboot: fix partition name truncation in environment lookup
strlcat() need to be passed the full buffer length. The incorrect call
caused truncation of partition names for fastboot_raw_partition_... and
fastboot_partition_alias_... env lookup to much less than PART_NAME_LEN.
Fixes: 69a752983171 ("fastboot: Fix possible buffer overrun") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tom Rini [Tue, 12 Oct 2021 16:01:00 +0000 (12:01 -0400)]
Merge tag 'u-boot-stm32-20211012' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Disable ATAGS for STM32 MCU and MPU boards
- Disable bi_boot_params for STM32 MCU and MPU boards
- Update stm32-usbphyc node management
- Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards
- Convert some USB config flags to Kconfig for various boards
- Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board
- Remove specific CONFIG_STV0991 flags
- Remove unused CONFIG_USER_LOWLEVEL_INIT flag
- Add ofdata_to_platdata() callback for stm32_spi driver
- Update for stm32f7_i2c driver
- Remove gpio_hog_probe_all() from STM32 MP1 board
- Fix bind command
The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C
deprecation warnings for most 32-bit boards. It also includes some
smaller refactorings that pave the way for more changes, mostly driven
by needing to support the Allwinner RISC-V SoC later on.
Board wise we gain support for the FriendlyARM NanoPi R1S H5 router
board and official Pinetab support.
Build-tested for all 160 sunxi boards, and boot tested on a A64, A20,
H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there
(where applicable).
As usb_ether driver has no compatible string, it can't be find by
lists_bind_fdt(). In bind_by_node_path(), which called lists_bind_fdt(),
the driver entry is known, pass it to lists_bind_fdt() to force the driver
entry selection.
For this, add a new parameter struct *driver to lists_bind_fdt().
Fix also all lists_bind_fdt() callers.
Fixes: 84f8e36f03fa ("cmd: bind: allow to bind driver with driver data") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reported-by: Herbert Poetzl <herbert@13thfloor.at> Cc: Marek Vasut <marex@denx.de> Cc: Herbert Poetzl <herbert@13thfloor.at> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Samuel Holland [Fri, 8 Oct 2021 05:17:24 +0000 (00:17 -0500)]
sunxi: video: Convert panel I2C to use DM_I2C
Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).
Since the i2c-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.
This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.
Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:23 +0000 (00:17 -0500)]
sunxi: pmic_bus: Use the DM PMIC interface when possible
The pmic_bus functions are used in both SPL (for regulator setup) and
U-Boot proper (for regulator setup, SID access, GPIO, and poweroff).
Currently, pmic_bus conflicts with DM_I2C because it uses the legacy I2C
interface. This commit makes pmic_bus dual-compatible with either the
legacy I2C functions or the newly-added PMIC_AXP driver (which uses
DM_I2C). In turn, this allows platforms to start transitioning to DM_I2C
in U-Boot proper, without breaking boards that still depend on the
legacy I2C interface for other reasons.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:22 +0000 (00:17 -0500)]
sunxi: pmic_bus: Clean up preprocessor conditions
Instead of using the SoC symbols to decide the bus type, use whichever
bus driver is actually enabled. This allows collapsing all of the AXP2xx
and AXP8xx variants into one "else" case. It also has the advantage of
falling back to I2C when the other bus drivers are disabled; this works
because all of the PMICs support I2C in addition to other interfaces.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:21 +0000 (00:17 -0500)]
i2c: Add a DM_I2C driver for the sun8i RSB controller
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.
There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:20 +0000 (00:17 -0500)]
i2c: Add a DM_I2C driver for the sun6i P2WI controller
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the p2wi functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants. Move that to the common header, so it can be used by
both interface implementations.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:19 +0000 (00:17 -0500)]
sunxi: pmic_bus: Fix Kconfig dependencies
AXP_PMIC_BUS enables communication with a specific AXP PMIC at a
PMIC-dependent I2C/P2WI/RSB bus address. It is automatically selected
as a dependency of the PMIC driver. It should not be selectable by the
user when no PMIC is chosen.
AXP_GPIO uses the pmic_bus functions, and also depends on a specific
PMIC header to pick up register definitions.
Both of these changes have no impact on any existing configs, since
the code does not compile if the dependencies are not met.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:18 +0000 (00:17 -0500)]
sunxi: Select SUN8I_RSB more carefully
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
As it currently stands, selecting that option also requires using it in
some way, which is not the case for one A80 board. Since we have only
three A80 boards in total, we select it their via their defconfigs.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixing up Sunchip_CX-A99 build] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:17 +0000 (00:17 -0500)]
sunxi: Only initialize legacy I2C when enabled
CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level
Kconfig symbol (not specific to either legacy or DM I2C), whereas the
i2c_init() function is specific to legacy I2C. This change fixes a
build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:16 +0000 (00:17 -0500)]
power: pmic: Add a driver for X-Powers AXP PMICs
These PMICs provide some combination of battery charger, fuel gauge,
GPIOs, regulators, and VBUS routing. These functions are represented
as child nodes in the device tree. Add the minimal driver needed to
probe these child devices and provide the DM_PMIC ops.
Enable the driver by default for SoCs that normally pair with a PMIC.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:15 +0000 (00:17 -0500)]
power: pmic: Consistently depend on SPL_DM_PMIC
Now that there is a separate symbol to enable DM_PMIC in SPL, update the
the SPL-specific driver symbols to depend on this new option.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Fri, 8 Oct 2021 05:17:14 +0000 (00:17 -0500)]
power: pmic: Consistently depend on DM_PMIC
Kconfig symbols for two PMIC drivers (PMIC_AS3722 and DM_PMIC_MC34708)
were missing a dependency on DM_PMIC. To fix this inconsistency, and to
keep it from happening again, wrap the driver section with "if DM_PMIC"
instead of using a "depends on DM_PMIC" clause for each driver.
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
clk: ti: add am33xx/am43xx spread spectrum clock support
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.
As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for
DDR, PER, and CORE PLLs.
Calculating the required values and setting the registers accordingly
was taken from the set_mpu_spreadspectrum routine contained in the
arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.
In locked condition, DPLL output clock = CLKINP *[M/N]. In case of
SSC enabled, the reference manual explains that there is a restriction
of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts
to select the minimum possible N, the value of M obtained is not
guaranteed to be within the range required. With the new "ti,min-div"
parameter it is possible to increase N and consequently M to satisfy the
constraint imposed by SSC.
ARM: dts: am43xx-clocks: add spread spectrum support
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruhl7x RM, SSC is supported only for LCD
and MPU PLLs, but the PRCM_CM_SSC_DELTAMSTEP_DPLL_XXX and
PRCM_CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field
in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
MPU, DDR, PER, DISP, EXTDEV).
ARM: dts: am33xx-clocks: add spread spectrum support
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for LCD
and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).
Chukun Pan [Sun, 10 Oct 2021 13:36:57 +0000 (21:36 +0800)]
sunxi: Add support for FriendlyARM NanoPi R1S H5
This adds support for the NanoPi R1S H5 board.
Allwinner H5 SoC
512MB DDR3 RAM
10/100/1000M Ethernet x 2
RTL8189ETV WiFi 802.11b/g/n
USB 2.0 host port (A)
MicroSD Slot
Reset button
Serial Debug Port
WAN - LAN - SYS LED
The dts file is taken from Linux 5.14 tag.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 12 Sep 2021 14:47:25 +0000 (09:47 -0500)]
clk: sunxi: Add drivers for A31 and H6 PRCM CCUs
Add a driver so the clocks/resets for these peripherals (especially I2C,
RSB, and UART) can be enabled using the normal uclass methods.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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