Kunihiko Hayashi [Fri, 23 Aug 2019 01:56:55 +0000 (10:56 +0900)]
cmd: pci: Adjust display of digits for 64bit address and size
The command "pci bar" and "pci region" display the address and size in
16 characters including "0x", so the command can only display
14 hexadecimal digits if the number of digits in the address and size is
less than 14.
ID Base Size Width Type
----------------------------------------------------------
0 0x00000020000000 0x00000000100000 64 MEM Prefetchable
1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable
The 64-bit address and size should be displayed in 18(= 16+2) digits,
so this patch adjusts them.
Cc: Yehuda Yitschak <yehuday@marvell.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adam Ford [Thu, 22 Aug 2019 20:32:42 +0000 (15:32 -0500)]
ARM: omap3_logic: Fix SPL boot failure when EHCI enabled
Some of the USB code is still being built into SPL even when the
SPL menu options have it explicitly disabled for SPL. Unit there is
a better solution, This patch undefines CONFIG_USB_EHCI_OMAP when
building SPL which reduces the code and lets the board boot again.
Fixes: 25e4ff45b17d ("ARM: omap3_logic: Enable OMAP EHCI support
for SOM-LV Boards")
Sudeep Holla [Wed, 21 Aug 2019 17:29:10 +0000 (18:29 +0100)]
vexpress/aemv8a: drop CONFIG_ARMV8_SWITCH_TO_EL1
To support KVM, we need to drop at EL2 and not EL1 before we boot Linux
kernel. This causes issues on platform with VHE and secondaries booting
at EL2 via TF-A PSCI CPU_ON call.
Cc: Ryan Harkin <ryan.harkin@linaro.org> Cc: Liviu Dudau <liviu.dudau@foss.arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: David Feng <fenghua@phytium.com.cn> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Martin Vystrčil [Tue, 20 Aug 2019 20:18:30 +0000 (22:18 +0200)]
fat: FAT filesystem premature release of info struct.
File was found on specified location. Info about file was read,
but then immediately destroyed using 'free' call. As a result
file size was set to 0, hence fat process didn't read any data.
Premature 'free' call removed. Resources are freed right before
function return. File is read correctly.
Signed-off-by: Martin Vystrcil <martin.vystrcil@m-linux.cz>
Park, Aiden [Tue, 20 Aug 2019 16:47:42 +0000 (16:47 +0000)]
dm: scsi: Scan the actual number of ports
The scsi_scan_dev() is looping over the number of uc_plat->max_id.
The number of actual ports a AHCI controller has can be greater than
max_id. Update uc_plat->max_id to make SCSI scan all detected ports.
Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adam Ford [Tue, 20 Aug 2019 12:20:58 +0000 (07:20 -0500)]
ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux
When the pinmux configuration was added, it was accidentally placed into
the omap3_pmx_wkup node when it should have been placed into the
omap3_pmx_core. This error was accidentally propagated to U-Boot by
me when I blindly copied the device tree from Linux.
This patch moves the i2c2_pins and i2c3_pins to the correct node
which should eliminate i2c bus errors and timeouts due to the fact
the bootloader uses the save device tree that no longer properly
assigns these pins.
Vikas Manocha [Fri, 16 Aug 2019 16:57:44 +0000 (09:57 -0700)]
board_f: reserve noncached space below malloc area
Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.
When devnum was changed to a local variable in distro_bootcmd we ran
into a problem on TI platforms (confirmed on Beaglebone) as we had been
using 'setenv devnum' there as well and it needs to match the other
usage.
Fixes: 13dd6665ed18 ("distro: not taint environment variables if possible")
[trini: Review other platforms, re-word commit message] Signed-off-by: Tom Rini <trini@konsulko.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:46 +0000 (15:41 +0200)]
Convert CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_SPI_U_BOOT_OFFS
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
[trini: Expose this for SPL_SPI_SUNXI for now] Signed-off-by: Tom Rini <trini@konsulko.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:44 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 3
Exact two boards are referencing CONFIG_SYS_SPI_U_BOOT_OFFS to another
define, we replace this manually with the value for having a clean run
of moveconfig.py afterwards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:43 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 2
some boards have common headers for several individual build-targets
where CONFIG_SYS_SPI_U_BOOT_OFFS is defined even it is not needed (only
needed if CONFIG_SPL_SPI_LOAD is defined also). Take this define here
under '#ifdef CONFIG_SPL_SPI_LOAD' for having a clean run of
moveconfig.py
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:42 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 1
Some boards have coded this offset with formula or bitshifts in their
board-config. Manually convert these things into hex-values to be able
using moveconfig.py afterwards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Stefan Roese [Thu, 22 Aug 2019 10:28:04 +0000 (12:28 +0200)]
mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.
Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
[trini: Rework such that the configs are unchanged to start with] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 24 Aug 2019 12:33:27 +0000 (08:33 -0400)]
Merge tag 'u-boot-rockchip-20190823' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver
Adam Ford [Tue, 13 Aug 2019 19:32:30 +0000 (14:32 -0500)]
Kconfigs: Various: Fix some SPL, TPL and ARM64 dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used. (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)
This patch is not attempting to be a complete list of items, but
more like low hanging fruit.
This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Max Kellermann [Tue, 4 Dec 2018 11:00:48 +0000 (12:00 +0100)]
evb_rk3399: revert CONFIG_SYS_MMC_ENV_DEV to 0
This was changed to 1 in commit 0717dde057e, but a few months later,
commit 5f9411af37b swapped the order of eMMC and SD card by assigning
indexed aliases to `&sdhci` and `&sdmmc`.
Signed-off-by: Max Kellermann <max.kellermann@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Add signature) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
disk: efi: ignore 'IGNOREME' GPT header found on cros eMMCs
Some ChromeOS devices (atleast veyron speedy) have the first 8MiB of
the eMMC write protected and equipped with a dummy 'IGNOREME' GPT
header - instead of spewing error messages about it, just silently
try the backup GPT.
Note: this does not touch the gpt cmd writing/verifying functions,
those will still complain.
Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rohan Garg [Mon, 12 Aug 2019 15:04:34 +0000 (17:04 +0200)]
rockchip: rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.
The MAC address is only generated and set if there is no ethaddr
present in the saved environment.
This is based off of Klaus Goger's work in 8adc9d
Signed-off-by: Rohan Garg <rohan.garg@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Thu, 15 Aug 2019 03:13:28 +0000 (11:13 +0800)]
rockchip: dts: rk3328-rock64: fix usb power supply
According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Mon, 12 Aug 2019 12:02:29 +0000 (20:02 +0800)]
ram: rk3399: update cap and ddrconfig for each channel after init
We need to store all the ram related cap/map info back to register
for each channel after all the init has been done in case some of register
was reset during the process.
Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
armv8: ls1088a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.
armv8: fsl-layerscape: make icid setup endianness aware
The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.
Chuanhua Han [Fri, 2 Aug 2019 08:53:53 +0000 (16:53 +0800)]
armv8: kconfig: Fix some platforms incorrect I2C clock divider
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Thu, 1 Aug 2019 08:36:57 +0000 (16:36 +0800)]
armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.
USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources
SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.
Alison Wang [Mon, 22 Jul 2019 07:17:21 +0000 (07:17 +0000)]
armv8: ls1046afrwy: Define CONFIG_ENV_ADDR for QSPI Boot
Defines CONFIG_ENV_ADDR for QSPI Boot which specifies the start
address of the flash sector containing the environment. It fixes
the issue that bootcmd is always set as default at bootup.
Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Tue, 23 Jul 2019 10:43:11 +0000 (18:43 +0800)]
boards: ls1088a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Mon, 22 Jul 2019 08:36:42 +0000 (16:36 +0800)]
boards: ls2088a: Add support of I2C driver model.
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls2088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 07:48:37 +0000 (15:48 +0800)]
armv8: ls1028aqds: Remove the definition of CONFIG_SYS_I2C_EARLY_INIT
Since i2c uses dm mode, i2c controller will be initialized when reading
and writing devices on i2c bus. So there is no need for the original
non-dm mode i2c early initialization function call, this patch removed
the definition of CONFIG_SYS_I2C_EARLY_INIT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:16:49 +0000 (21:16 +0800)]
boards: ls1028a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1028a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
i2c_early_init_f();
^~~~~~~~~~~~~~~~
arch_early_init_r
drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
ret = enable_i2c_clk(1, bus->seq);
^~~~~~~~~~~~~~
enable_irq_wake
So fix these compilation errors.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:20 +0000 (21:00 +0800)]
boards: lx2160a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Yuantian Tang [Wed, 19 Jun 2019 06:39:28 +0000 (14:39 +0800)]
common: qixis: make the qixis compatible with new soc
This driver needs modification to work with new soc,
like ls1028, since bitmap of RCFG is changed to
RESV[7:5] LIVE[4] WDEN[3] RESV[2:1] GO[0]
000 1 0 00 0
Also the RCW location is moved to only dutcfg0.
RESV[7:4] RCWSRC[3:0]
1111 configurable
Following commands are functional now
qixis_reset
qixis_reset sd
qixis_reset qspi
qixis_reset emmc
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Peng Fan [Wed, 21 Aug 2019 13:35:19 +0000 (13:35 +0000)]
sandbox: clk: add clk enable/disable test code
Since we added clk enable_count and prograte clk child enabling
operation to clk parent, so add a new function sandbox_clk_enable_count
to get enable_count for test usage.
And add test code to get the enable_count after we enable/disable
the device clk.
Peng Fan [Wed, 21 Aug 2019 13:35:09 +0000 (13:35 +0000)]
clk: prograte clk enable/disable to parent
On i.MX8MM, thinking such as clk path
OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device
Only enabling CCGR GATE is not enough, we also need to enable PLL GATE
to make sure the clk path work. So when enabling CCGR GATE,
we could prograte to enabling PLL GATE to make life easier.
Peng Fan [Wed, 21 Aug 2019 13:35:03 +0000 (13:35 +0000)]
clk: introduce enable_count
As what Linux Kernel 5.3.0 provides when enable/disable clk,
there is an enable_count in clk_core_disable/enable. Introduce
enable_count to track the clk enable/disable count when
clk_enable/disable for CCF. And Initialize enable_count to 0 when
register the clk.
And clk tree dump with enable_count will be supported, it will
be easy for us to check the clk status with enable_count
Michal Simek [Mon, 19 Aug 2019 09:06:13 +0000 (11:06 +0200)]
test/py: Add cmd_memory dependency back to test_mmc_wr
Based on discussion with Stephen Warren there was recommendation to list
both memory and random command dependencies just in case that dependency is
not properly handled by Kconfig.
Fixes: a09c1f7e1c1b ("test/py: Fix MMC/SD block write test dependency") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Building easylogo with `HOST_TOOLS_ALL=y make tools` results in a build
warning due to a possible buffer overrun:
tools/easylogo/easylogo.c:453:4: note: ‘sprintf’ output between 7 and
262 bytes into a destination of size 256
sprintf (str, "%s, 0x%02x", app, *dataptr++);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Truncate the output to fit into the destination buffer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Looking at the contents of file .mailmap it seems that some editors assumed
that translation is done by entering multiple lines into the file and the
last one replaces the others. This is not how it works. The translation
occurs according to entries in single lines as described in the
git-check-mailmap man-page.
Add a description of the file format.
Add an entry for Alexander Graf as his old email address is not valid
anymore.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
projects / u-boot.git / log