The fields Creator ID and Creator Revision contain information about the
tool that created an ACPI table. This may be the ASL compiler for some
tables but it is not for others. Naming these fields aslc_id and
aslc_revision is misleading.
It is usual to see diverse values of Creator ID. On a laptop I saw these:
'AMD ', 'INTL, 'MSFT', 'PTEC'. Obviously not all relate to the Intel
ASL compiler.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Neil Armstrong [Wed, 20 Mar 2024 08:46:11 +0000 (09:46 +0100)]
board: amlogic: fix buffler overflow in seria, mac & usid read
While meson_sm_read_efuse() doesn't overflow, the string is not
zero terminated and env_set*() will buffer overflow and add random
characters to environment.
Christian Hewitt [Sun, 24 Mar 2024 15:19:05 +0000 (15:19 +0000)]
board: amlogic: add meson_generate_serial_ethaddr fallback to p200
Add a fall-back method to generate ethaddr from CPU serial on p200 boards
if the MAC cannot be read from efuse. This prevents random MAC addresses
on the WeTek Hub/Play2 boards.
Christian Hewitt [Sun, 24 Mar 2024 15:19:04 +0000 (15:19 +0000)]
ARM: dts: fix Ethernet on WeTek Hub/Play2
Placing the snps,reset content needed for Ethernet to probe in a common
uboot.dtsi results in the content not being used and broken Ethernet. Fix
this by creating two board specific dtsi files with the right content.
Tom Rini [Sun, 24 Mar 2024 21:49:42 +0000 (17:49 -0400)]
Merge tag 'u-boot-imx-next-20240324' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
- Add ahab_commit command support.
- Add USB support for the imx93-phyboard-segin board.
- Add i.MX8MP PCIe support.
- Fix netboot environment on phycore_imx8mp.
The "run netargs" command should come later in the "netboot" command
order when using dhcp since it sets the server and client ip addresses.
The previous order led to misconfigured kernel boot params and thus
kernel panic when serverip was not manually set.
Further, following Linux FHS 3.0, change the nfsroot default directory
to /srv/nfs.
Mathieu Othacehe [Thu, 21 Mar 2024 07:19:53 +0000 (08:19 +0100)]
imx: ele_ahab: Add ahab_commit command support
This message is used to commit into the fuses any new SRK revocation and
FW version information that have been found into the NXP (ELE FW) and
OEM containers.
Sumit Garg [Thu, 21 Mar 2024 14:55:04 +0000 (20:25 +0530)]
pcie_imx: Update header to describe it as a legacy driver
Since now we have the modern pcie_dw_imx.c driver for iMX SoCs,
encourage people to switch to that for any further new iMX SoC support
or even for the older iMX6 SoCs too.
Suggested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
Sumit Garg [Thu, 21 Mar 2024 14:55:03 +0000 (20:25 +0530)]
pci: Add DW PCIe controller support for iMX8MP SoC
pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC. So lets reuse those common
bits instead as a new driver for iMX8 SoCs. It should be fairly easy to
add support for other iMX8 variants to this driver.
iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we
can reuse the generic PHY infrastructure to power on PCIe PHY.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Thu, 21 Mar 2024 14:55:02 +0000 (20:25 +0530)]
phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver
reference commit 7559e7572c03 ("phy: Explicitly include correct DT
includes").
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Thu, 21 Mar 2024 14:55:01 +0000 (20:25 +0530)]
imx8mp: power-domain: Expose high performance PLL clock
Expose the high performance PLL as clock framework clock, so the
PCIe PHY can use it when there is no external refclock provided.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver
reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to
platform remove callback returning void").
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Thu, 21 Mar 2024 14:55:00 +0000 (20:25 +0530)]
imx8mp: power-domain: Add PCIe support
Add support for GPCv2 power domains and clock handling for PCIe and
PCIe PHY.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Thu, 21 Mar 2024 14:54:59 +0000 (20:24 +0530)]
reset: imx: Add support for i.MX8MP reset controller
Add support for i.MX8MP reset controller, it has same reset IP inside
as the other iMX7 and iMX8M variants but with different module layout.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/reset/reset-imx7.c. Use last Linux kernel driver reference
commit bad8a8afe19f ("reset: Explicitly include correct DT includes").
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Thu, 21 Mar 2024 14:54:58 +0000 (20:24 +0530)]
reset: imx: Refactor driver to simplify function names
imx7_reset_{deassert/assert}_imx* are a bit more confusing when compared
with imx*_reset_{deassert/assert}. So refactor driver to use function
names easier to understand. This shouldn't affect the functionality
though.
Suggested-by: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Thu, 21 Mar 2024 14:54:57 +0000 (20:24 +0530)]
clk: imx8mp: Add support for PCIe clocks
Add support for PCIe clocks required to enable PCIe support on
iMX8MP SoC.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
remoteproc: uclass: Add methods to load firmware to rproc and boot rproc
Add APIs to set a firmware_name to a rproc and boot the rproc with the
same firmware.
Clients can call rproc_set_firmware() API to set firmware_name for a rproc
whereas rproc_boot() will load the firmware set by rproc_set_firmware() to
a buffer by calling request_firmware_into_buf(). rproc_boot() will then
load the firmware file to the remote processor and start the remote
processor.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org>
Hari Nagalla [Tue, 12 Mar 2024 09:44:36 +0000 (15:14 +0530)]
remoteproc: k3-dsp: Extend support for C71x DSPs on J721S2 SoCs
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain,
and there are no C66x DSP subsystems on these SoCs. The C71x DSP subsystem
is a slighly updated version of the C71x DSP subsystem on J721e. The
C71x DSPs are 64 bit machine with fixed and floating point DSP
operations.
Extend support to the C71x DSPs with J721S2 compatible strings.
Hari Nagalla [Tue, 12 Mar 2024 09:44:35 +0000 (15:14 +0530)]
remoteproc: k3-r5: Extend support for R5F clusters on J721S2 SoCs
The K3 J721S2 SoCs have three dual-core R5F subsystems, one in MCU
voltage domain and the other two in MAIN voltage domain. These R5F
clusters are similar to the R5F clusters in J7200 SoCs.
Compatible Info is updated to support J721S2 SoCs.
Increase the SPL_STACK_R_MALLOC_SIMPLE_LEN to 0x200000 to accommodate the
size of tispl.bin fit image. With the recent upgrade of ti-linux-firmware
from version v9.1.0 to v9.2.5, the size of tispl.bin fit image has
increased to 1.4MB, causing allocation errors in the R5 SPL:
```
alloc space exhausted
Could not get FIT buffer of 1325056 bytes
check CONFIG_SPL_SYS_MALLOC_SIZE
```
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Cc: kojima.masahisa@socionext.com Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Masahisa Kojima <kojima.masahisa@socionext.com>
arm: dts: k3-am625-verdin-r5: Change CPU frequency to 800MHz
The lowest speed grade of Toradex AM62 SoMs is K speed, resulting in a
max value of 800MHz for the CPU operating frequency. A solution with
runtime selection of the CPU frequency is already planned to avoid these
kinds of problems in the future.
Fixes: 8fb8a6d49977 ("arm: dts: k3-am625-verdin-r5:Change CPU frequency to 1000MHz") Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Douglas Anderson [Mon, 11 Mar 2024 21:02:45 +0000 (14:02 -0700)]
patman: Properly document the patchwork_url setting
The "Series-patchwork-url:" tag description says that it overrides the
settings file but doesn't specify the name of the setting. Elsewhere
in the documentation about the "useful" settings we see a setting that
sounds promising called "patchwork_server" that's actually not a valid
setting. It should be "patchwork_url".
Fix these problems so the doc is right and more useful.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
If bootefi selftest is executed and a problem with the device-tree
installation occurs, efi_install_fdt() writes sensible error messages.
It never returns EFI_INVALID_PARAMETER. It neither makes sense to check
for EFI_INVALID_PARAMETER nor to show the usage help for the bootefi
command in this case.
Hiago De Franco [Fri, 15 Mar 2024 21:56:57 +0000 (18:56 -0300)]
doc: board: apalis-imx8: Update and improve documentation
Update and improve the building documentation of Apalis iMX8.
The following changes were made:
- imx-atf repository changed to nxp-imx GitHub.
- imx-atf branch updated to 'lf_v2.6'.
- imx-seco updated to version 5.8.7.
- nxp-imx mfgtools link updated to GitHub releases.
- General writing improvements.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Hiago De Franco [Fri, 15 Mar 2024 21:56:56 +0000 (18:56 -0300)]
doc: board: colibri-imx8x: Update and improve documentation
Update and improve the building documentation of Colibri iMX8X.
The following changes were made:
- imx-atf repository changed to nxp-imx GitHub.
- imx-atf branch updated to 'lf_v2.6'.
- imx-seco updated to version 5.8.7.
- nxp-imx mfgtools link updated to GitHub releases.
- General writing improvements.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Janne Grunau [Sat, 16 Mar 2024 21:50:24 +0000 (22:50 +0100)]
efi_selftest: Update StrToFat() unit test after CP473 map extension
Test that Unicode code points which map to CP437 code points 1-31 are
converted to '_'. This ensures no FAT file names do not contain chars
which are control characters in other code pages (CP 1250 for example).
Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Janne Grunau [Sat, 16 Mar 2024 21:50:23 +0000 (22:50 +0100)]
efi_selftest: Add geometric shapes character selftest
Draw symbols from Unicode's "Geometric shapes" page which translate to
code page 437 code points 1-31. These are used by UEFI applications to
draw user interfaces using EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.
The output has to be checked manually on the screen for correctness.
Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Andre Przywara [Sat, 16 Mar 2024 21:50:22 +0000 (22:50 +0100)]
efi_selftest: Add box drawing character selftest
UEFI applications rely on Unicode output capability, and might use that
for drawing pseudo-graphical interfaces using Unicode defined box
drawing characters.
Add a simple test to display the most basic box characters, which would
need to be checked manually on the screen for correctness.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Andre Przywara [Sat, 16 Mar 2024 21:50:21 +0000 (22:50 +0100)]
efi_selftest: Add international characters test
UEFI relies entirely on unicode output, which actual fonts displayed on
the screen might not be ready for.
Add a test displaying some international characters, to reveal missing
glyphs, especially in our builtin fonts.
This would be needed to be manually checked on the screen for
correctness.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Janne Grunau [Sat, 16 Mar 2024 21:50:20 +0000 (22:50 +0100)]
lib/charset: Map Unicode code points to CP437 code points 1-31
Code page 437 uses code points 1-31 for glyphs instead of control
characters. Map the appropriate Unicode code points to this code points.
Fixes rendering of grub2's menu as EFI application using the
EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL on a console with bitmap fonts.
Janne Grunau [Sat, 16 Mar 2024 21:50:19 +0000 (22:50 +0100)]
video: console: Parse UTF-8 character sequences
efi_console / UEFI applications (grub2, sd-boot, ...) pass UTF-8
character sequences to vidconsole which results in wrong glyphs for code
points outside of ASCII. The truetype console expects Unicode code
points and bitmap font based consoles expect code page 437 code points.
To support both convert UTF-8 to UTF-32 and pass Unicode code points in
vidconsole_ops.putc_xy(). These can be used directly in console_truetype
and after conversion to code page 437 in console_{normal,rotate}.
This fixes rendering of international, symbol and box drawing characters
used by UEFI applications.
Sumit Garg [Fri, 1 Mar 2024 13:24:53 +0000 (18:54 +0530)]
doc: devicetree: Lets avoid short reference link names
Short reference link names like "dtspec", "dtrepo", "dttweaks" etc.
interrupt the flow of the document text. Lets avoid them and instead
expand in place for better readability.
Suggested-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Caleb Connolly [Tue, 19 Mar 2024 13:24:42 +0000 (13:24 +0000)]
test: dm: add button_cmd test
Add a test for the button_cmd feature. This validates that commands can
be mapped to two buttons, that the correct command runs based on which
button is pressed, that only 1 command is run, and that no command runs
if button_cmd_0_name is wrong or unset.
Additionally, fix a potential uninitialised variable use caught by these
tests, the btn variable in get_button_cmd() is assumed to be null if
button_get_by_label() fails, but it's actually used uninitialised in
that case.
CONFIG_BUTTON is now enabled automatically and was removed when running
save_defconfig.
Fixes: e761035b6423 ("boot: add support for button commands") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Marek Vasut [Mon, 18 Mar 2024 15:03:14 +0000 (16:03 +0100)]
Makefile: Add missing OF_UPSTREAM Makefile for 32bit ARM
Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile
and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm Tested-by: Tony Dinh <mibodhi@gmail.com>
Tom Rini [Wed, 20 Mar 2024 12:39:05 +0000 (08:39 -0400)]
Merge branch '2024-03-19-assorted-updates' into next
- TI J7200 updates, GIC-600 support, 2 more tests, fix parsing
ccsidr_el1 register in some cases, prepare for allowing remoteproc to
use fs_loader and make the binary_size_check rule not require 'bc'.
The error message "bc: command not found" is easily missed since the
build continues.
bc is not a part of coreutils or base-devel. POSIX sh can also do the
calculation.
Signed-off-by: Leon M. Busch-George <leon@georgemail.eu> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Lukasz Wiecaszek [Sun, 10 Mar 2024 10:29:58 +0000 (11:29 +0100)]
arm: Check FEAT_CCIDX when parsing ccsidr_el1 register
Current Cache Size ID Register (ccsidr_el1) has two "flavors"
depending on whether FEAT_CCIDX is implemented or not.
When FEAT_CCIDX is implemented Associativity parameter
is coded on bits [23:3] and NumSets parameter on bits [55:32].
When FEAT_CCIDX is not implemented then Associativity parameter
is coded on bits [12:3] and NumSets parameter on bits [27:13].
Current U-Boot code does not check whether FEAT_CCIDX is implemented
and always parses ccsidr_el1 as if FEAT_CCIDX was not implemented.
This is of course wrong on systems where FEAT_CCIDX is implemented.
This patch fixes that problems and tests whether FEAT_CCIDX
is implemented or not and accordingly parses the ccsidr_el1 register.
Arm's GIC-600 features a Power Register (GICR_PWRR),
which needs to be programmed to enable redistributor
operation. Power on the redistributor and wait until
the power on state is reflected by checking the bit
GICR_PWRR.RDPD == 0. While running U-Boot in EL3
without enabling this register, GICR_WAKER.ChildrenAsleep
bit is not getting cleared and loops infinitely.
This register(GICR_PWRR) must be programmed to mark the frame
as powered on, before accessing other registers in the frame.
Rest of initialization sequence remains the same.
ARM GIC-600 IP complies with ARM GICv3 architecture.
Enable this config if GIC-600 IP present.
load_firmware() API calls fs-loader APIs and checks for CONFIG_FS_LOADER
before calling those APIs. The if check only checks for CONFIG_FS_LOADER
but not for CONFIG_SPL_FS_LOADER.
When CONFIG_FS_LOADER is enabled, load_firmware() API calls fs-loader APIs
but this is done at SPL stage and at this time FS_LOADER is not built yet
as a result we see below build error.
AR spl/boot/built-in.o
LD spl/u-boot-spl
arm-none-linux-gnueabihf-ld.bfd: arch/arm/mach-k3/common.o: in function
`load_firmware':
/home/danish/workspace/u-boot/arch/arm/mach-k3/common.c:184: undefined
reference to `get_fs_loader'
arm-none-linux-gnueabihf-ld.bfd:
/home/danish/workspace/u-boot/arch/arm/mach-k3/common.c:185: undefined
reference to `request_firmware_into_buf'
make[2]: *** [/home/danish/workspace/u-boot/scripts/Makefile.spl:527:
spl/u-boot-spl] Error 1
make[1]: *** [/home/danish/workspace/u-boot/Makefile:2055:
spl/u-boot-spl] Error 2
make[1]: Leaving directory '/home/danish/uboot_images/am64x/r5'
make: *** [Makefile:177: sub-make] Error 2
Fix this by modifying the if check to CONFIG_IS_ENABLED(FS_LOADER) instead
of IS_ENABLED(CONFIG_FS_LOADER) as the former will check for the
appropriate config option (CONFIG_SPL_FS_LOADER / CONFIG_FS_LOADER) based
on the build stage.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Tom Rini [Tue, 19 Mar 2024 13:10:30 +0000 (09:10 -0400)]
Merge tag 'u-boot-socfpga-next-20240319' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
- A new driver in the misc to register setting from device tree. This
also provides user a clean interface and all register settings are
centralized in one place, device tree.
- Enable Agilex5 platform for Intel product. Changes, modification and
new files are created for board, dts, configs and makefile to create
the base for Agilex5.
Build-tested on SoC64 boards, boot tested on some of them.
This patch is to enable Agilex5 platform for Intel
product. Changes, modification and new files are
created for board, dts, configs and makefile to
create the base for Agilex5.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
- Select polling-rate from cpu-thermal devicetree node on imx_tmu.
- Re-organize the U-Boot environment and add RAUC logic for
phycore_imx8mp.
- Enable watchdog on colibri-imx7.
- Move imx8mm-venice to use OF_UPSTREAM.
- Fix build error when SoM detection on Phytec board.
- Fix sc_misc_otp_fuse_read() error check on colibri-imx8x/apalis-imx8.
- Fix NPU/VPU fdt disable fixup on i.MX8M.
Tim Harvey [Tue, 12 Mar 2024 19:05:43 +0000 (12:05 -0700)]
imx8m*_venice: move venice to OF_UPSTREAM
Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
- replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
dt's from the OF_LIST
- handle the fact that dtbs now have a 'freescale/' prefix
- imply OF_UPSTREAM
- remove rudundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files
Benjamin Hahn [Mon, 4 Mar 2024 11:48:54 +0000 (12:48 +0100)]
drivers: imx_tmu: Select polling-rate from cpu-thermal devicetree node
The polling rate is already specified in some devicetrees, like
imx8mp.dtsi for example, but was not selected so far. For the
trippoints, the cpu-thermal node is used. Also get the polling rate from
this node. Use the default of 5000ms if the polling rate should not be
specified in the devicetree.
NOTE: The polling rate from the devicetree will be used after this
patch. In imx8*.dtsi devicetrees the polling delay is set to 2000ms for
example.
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
On imx8m[m|p|q].dtsi, upstream Linux uses different names for NPU/VPU
IP block nodes. It leads variants without such HW block having it
enabled by default.
This patch adds the upstream Linux node's paths to the disable list while
keep the compatibility with downstream Linux.
Signed-off-by: Vitor Soares <vitor.soares@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Commit bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
made an incorrect logic change in the error code check of
sc_misc_otp_fuse_read():
- if (scierr == SC_ERR_NONE) {
+ if (scierr) {
/* QP has one A72 core disabled */
is_quadplus = ((val >> 4) & 0x3) != 0x0;
}
The other changes in this commit are correct.
sc_misc_otp_fuse_read() returns 0 on a successful fuse read.
This inversion causes board_mem_get_layout() to report incorrect RAM size.
Go back the original error check logic to fix the problem.
Fixes: bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Commit aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
made an incorrect logic change in the error code check of
sc_misc_otp_fuse_read():
- if (sc_err == SC_ERR_NONE) {
+ if (sc_err) {
/* DX has two A35 cores disabled */
return (val & 0xf) != 0x0;
}
The other changes in this commit are correct.
sc_misc_otp_fuse_read() returns 0 on a successful fuse read.
This inversion causes board_mem_get_layout() to report incorrect RAM size.
Go back the original error check logic to fix the problem.
Fixes: aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage") Reported-by: Hiago De Franco <hiago.franco@toradex.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Colibri iMX8X 1GB
Tom Rini [Fri, 15 Mar 2024 13:15:31 +0000 (09:15 -0400)]
Merge tag 'u-boot-rockchip-20240315' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
Please pull the updates for rockchip platform:
- Add board: rk3588 Generic, Cool Pi CM5, Theobroma-Systems RK3588 Jaguar SBC,
Toybrick TB-RK3588X;
rk3588s Cool Pi 4B;
rk3566 Pine64 PineTab2;
- Add saradc v2 support;
- Add PMIC RK806 support;
- rk3588 disable force_jtag by default;
- Migrate to use IO-domain driver for all boards;
- Use common bss and stack addresses for rk33xx and rk35xx boards;
- Other updates for driver, config and dts;
Quentin Schulz [Thu, 14 Mar 2024 09:36:29 +0000 (10:36 +0100)]
rockchip: boot_mode: fix rockchip_dnl_key_pressed requiring ADC support
ADC support is implied by the Rockchip arch Kconfig but that means it
should be possible to disable ADC support and still be able to build.
However the weak implementation of rockchip_dnl_key_pressed() currently
blindly use functions from the ADC subsystem which do not exist when ADC
is not enabled, failing the build.
Therefore, let's encapsulate this logic with a check on the ADC symbol
being selected.
Quentin Schulz [Thu, 14 Mar 2024 09:36:27 +0000 (10:36 +0100)]
adc: add missing depends on ADC for controller drivers
The ADC controller drivers are obviously all depending on ADC symbol
being selected.
While they don't seem to fail to build without, they won't be useful
without that symbol selected, so let's make sure the options aren't
shown in menuconfig when ADC isn't selected.
Quentin Schulz [Thu, 14 Mar 2024 09:36:26 +0000 (10:36 +0100)]
rockchip: jaguar-rk3588: enable SARADC and derivatives
The SARADC is used on Jaguar for multiple things:
- channel 0 is used (at runtime) as a BIOS button,
- channel 2 is exposed on the Mezzanine connector for customer specific
logic,
- channel 5 and 6 are used for identification,
Since the SARADC requires a vref-supply provided by the RK806 PMIC, its
support and the support for its regulators are also enabled.
The button, adc, pmic and regulator commands are also enabled for CLI
use in U-Boot for debugging and scripting purposes.
The RK806 PMIC on Jaguar being routed on the SPI bus, let's enable
Rockchip SPI controller driver.
Finally, the SARADC channel 1 on Jaguar is hardwired so will never
change in the lifetime of a unit, for that reason, disable the Rockchip
Download Mode check by setting ROCKCHIP_BOOT_MODE_REG symbol to 0.
Quentin Schulz [Thu, 14 Mar 2024 09:36:25 +0000 (10:36 +0100)]
power: pmic: rk8xx: fix duplicate prompt
SPL_PMIC_RK8XX and PMIC_RK8XX both share the same prompt making it
difficult to know at first glance in menuconfig what's for what, let's
fix this by adding "in SPL" at the end of the prompt for the SPL symbol.
Quentin Schulz [Thu, 14 Mar 2024 09:36:24 +0000 (10:36 +0100)]
rockchip: adc: rockchip-saradc: add support for RK3588
This adds support for the SARADCv2 found on RK3588.
There is no stop callback as it is currently configured in single
conversion mode, where the ADC is powered down after a single conversion
has been made.
Due to what seems to be a silicon bug, a controller reset needs to be
issued before starting a channel conversion otherwise Rockchip says that
channel 1 will error whatever that means. This is aligned with upstream
and downstream Linux kernel as well as downstream U-Boot.
Quentin Schulz [Thu, 14 Mar 2024 09:36:23 +0000 (10:36 +0100)]
rockchip: adc: rockchip-saradc: factor out stop callback
SARADC v2 doesn't have a stop mechanism once in single mode. In series
conversion, the logic is different anyway. Therefore, let's abstract
this function so that it can be provided from the udevice.data pointer.
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