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23 months agoMerge tag 'u-boot-rockchip-20230117' of https://source.denx.de/u-boot/custodians...
Tom Rini [Tue, 17 Jan 2023 01:58:37 +0000 (20:58 -0500)]
Merge tag 'u-boot-rockchip-20230117' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

- Add support for rv1126 soc and rv1126 neu2 io board;
- Add support for rk3399 pine64 pinephone pro board;
- dts sync from linux for rk3399 and px30;
- Add support for PX30 Ringneck SoM board;

23 months agorockchip: add support for PX30 Ringneck SoM on Haikou Devkit
Quentin Schulz [Mon, 9 Jan 2023 10:36:45 +0000 (11:36 +0100)]
rockchip: add support for PX30 Ringneck SoM on Haikou Devkit

The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
        * CPU: quad-core Cortex-A35
        * DRAM: 2GB dual-channel
        * eMMC: onboard eMMC
        * SD/MMC
        * TI DP83825I 10/100Mbps PHY
        * USB:
                * USB2.0 dual role port
                * 3x USB2.0 host via onboard USB2.0 hub
        * Display: MIPI-DSI
        * Camera: MIPI-CSI
        * onboard 2.4GHz WiFi + Bluetooth module
        * Companion Controller: on-board additional microcontroller
  (STM32 Cortex-M0 or ATtiny):
                * RTC
                * fan controller
                * CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
23 months agoarm64: dts: rockchip: sync px30 DTSI with Linux kernel v6.1
Quentin Schulz [Mon, 9 Jan 2023 10:36:44 +0000 (11:36 +0100)]
arm64: dts: rockchip: sync px30 DTSI with Linux kernel v6.1

Sync the px30 dtsi from Linux kernel v6.1.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
23 months agorockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree
Quentin Schulz [Mon, 9 Jan 2023 10:36:43 +0000 (11:36 +0100)]
rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree

It is possible to boot U-Boot proper from a different storage medium
than the one used by the BOOTROM to load the SPL. This information is
stored in the u-boot,spl-boot-device Device Tree property and is
accessible from U-Boot proper so that it has knowledge at runtime where
it was loaded from.

Let's add support for this feature for px30.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
23 months agorockchip: px30: list possible SPL boot devices
Quentin Schulz [Mon, 9 Jan 2023 10:36:42 +0000 (11:36 +0100)]
rockchip: px30: list possible SPL boot devices

BOOTROM sets a bit in a CPU register so that the software can know from
where the first stage bootloader was booted. One use case for this is to
specify the default loading medium for U-Boot proper to match the one
used by the BOOTROM to load the SPL (same-as-spl in
u-boot,spl-boot-order).

Let's create the mapping between BOOTROM value and Device Tree node
names for MMC devices.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
23 months agorockchip: px30: fix CFG_IRAM_BASE
Quentin Schulz [Mon, 9 Jan 2023 10:36:41 +0000 (11:36 +0100)]
rockchip: px30: fix CFG_IRAM_BASE

The IRAM on PX30 (or Int_MEM in datasheet) starts at 0xff0e0000 and not
0xff020000 as rightfully stated in the FIXME comment.

Let's fix it so that BROM_BOOTSOURCE_ID_ADDR points to the correct
address for PX30.

Fixes: 46281a76bee3 ("rockchip: add core px30 headers")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
23 months agorockchip: px30: fix possibly unused grf and cru variables
Quentin Schulz [Mon, 9 Jan 2023 10:36:40 +0000 (11:36 +0100)]
rockchip: px30: fix possibly unused grf and cru variables

The grf and cru are only used when no UART base is provided by the user
(defaults to UART2) or for UART1, UART3 and UART5 to be used for the
debug UART. Therefore, let's surround those variable definitions with
the proper checks.

This wasn't an issue before support for UART0 was added, because all
cases were using cru and grf. UART0 only uses pmucru so there's a need
to not define those variables anymore.

Fixes: d0af506625ff ("rockchip: px30: support debug uart on UART0")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agorockchip: Add initial support for the PINE64 Pinephone Pro
Peter Robinson [Sat, 31 Dec 2022 09:24:00 +0000 (09:24 +0000)]
rockchip: Add initial support for the PINE64 Pinephone Pro

The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.

Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
23 months agoarm64: dts: rk3399: Add upstream Pinephone Pro dts
Peter Robinson [Sat, 31 Dec 2022 09:23:59 +0000 (09:23 +0000)]
arm64: dts: rk3399: Add upstream Pinephone Pro dts

Initial support for the PinePhone Pro has now landed upstream in
Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
23 months agoboard: rockchip: Add Edgeble Neu2 IO Board
Jagan Teki [Wed, 14 Dec 2022 17:51:11 +0000 (23:21 +0530)]
board: rockchip: Add Edgeble Neu2 IO Board

Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
23 months agoARM: dts: rockchip: Add rv1126-u-boot.dtsi
Jagan Teki [Wed, 14 Dec 2022 17:51:10 +0000 (23:21 +0530)]
ARM: dts: rockchip: Add rv1126-u-boot.dtsi

Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.

Both eMMC and SD boot are tested in Edgeble Neu2 SoM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO
Jagan Teki [Wed, 14 Dec 2022 17:51:09 +0000 (23:21 +0530)]
ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO

Neural Compute Module 2(Neu2) IO board is an industrial form factor
evaluation board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
23 months agoARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2)
Jagan Teki [Wed, 14 Dec 2022 17:51:08 +0000 (23:21 +0530)]
ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2)

Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.

General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 8/16/32GB eMMC
- 2x MIPI CSI2 FPC connector
- Fn-link 8223A-SR WiFi/BT

Industrial grade (-40 °C to +85 °C) version of the same class of module
called Neu2k powered with Rockchip RV1126K.

Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
23 months agorockchip: mkimage: Add rv1126 support
Jagan Teki [Wed, 14 Dec 2022 17:51:07 +0000 (23:21 +0530)]
rockchip: mkimage: Add rv1126 support

Add support for rv1126 package header in mkimage tool.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoarm: rockchip: rv1126: Set dram area unsecure for SPL
Jagan Teki [Wed, 14 Dec 2022 17:51:06 +0000 (23:21 +0530)]
arm: rockchip: rv1126: Set dram area unsecure for SPL

Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoarm: rockchip: Add RV1126 arch core support
Jagan Teki [Wed, 14 Dec 2022 17:51:05 +0000 (23:21 +0530)]
arm: rockchip: Add RV1126 arch core support

Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.

Add arch core support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04

23 months agoARM: dts: rockchip: Add Rockchip RV1126 SoC
Jagan Teki [Wed, 14 Dec 2022 17:51:04 +0000 (23:21 +0530)]
ARM: dts: rockchip: Add Rockchip RV1126 SoC

RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.

It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.

This patch add basic core dtsi support.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
23 months agoARM: dts: rockchip: Add Rockchip RV1126 pinctrl
Jagan Teki [Wed, 14 Dec 2022 17:51:03 +0000 (23:21 +0530)]
ARM: dts: rockchip: Add Rockchip RV1126 pinctrl

Add pinctrl definitions for Rockchip RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoarm: rockchip: Add grf header for rv1126
Jagan Teki [Wed, 14 Dec 2022 17:51:02 +0000 (23:21 +0530)]
arm: rockchip: Add grf header for rv1126

Add GRF header for Rockchip RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agodt-bindings: power: Add power-domain header for rv1126
Jagan Teki [Wed, 14 Dec 2022 17:51:01 +0000 (23:21 +0530)]
dt-bindings: power: Add power-domain header for rv1126

Add power-domain header for RV1126 SoC from description in TRM.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoclk: rockchip: Add rv1126 clk support
Jagan Teki [Wed, 14 Dec 2022 17:51:00 +0000 (23:21 +0530)]
clk: rockchip: Add rv1126 clk support

Add clock driver support for Rockchip RV1126 SoC.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agodt-bindings: clk: Add dt-binding header for RV1126
Jagan Teki [Wed, 14 Dec 2022 17:50:59 +0000 (23:20 +0530)]
dt-bindings: clk: Add dt-binding header for RV1126

Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoarch: rockchip: Add cru header for rv1126
Jagan Teki [Wed, 14 Dec 2022 17:50:58 +0000 (23:20 +0530)]
arch: rockchip: Add cru header for rv1126

Add clock and reset unit header include for rv1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agopinctrl: rockchip: Add rv1126 support
Jagan Teki [Wed, 14 Dec 2022 17:50:57 +0000 (23:20 +0530)]
pinctrl: rockchip: Add rv1126 support

Add pinctrl driver for Rockchip RV1126.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agopinctrl: rockchip: Add pinctrl route types
Jagan Teki [Wed, 14 Dec 2022 17:50:56 +0000 (23:20 +0530)]
pinctrl: rockchip: Add pinctrl route types

Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.

Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Add rv1126 lpddr4 support
Jagan Teki [Wed, 14 Dec 2022 17:50:55 +0000 (23:20 +0530)]
ram: rockchip: Add rv1126 lpddr4 support

Add LPDDR4 detection timings and support for RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: rv1126: Control ddr init prints via DEBUG
Jagan Teki [Wed, 14 Dec 2022 17:50:54 +0000 (23:20 +0530)]
ram: rockchip: rv1126: Control ddr init prints via DEBUG

Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.

This gives an option to configs to enable these prints or
not.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Add rv1126 ddr driver support
Jagan Teki [Wed, 14 Dec 2022 17:50:53 +0000 (23:20 +0530)]
ram: rockchip: Add rv1126 ddr driver support

Add DDR driver for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Add rv1126 ddr loader params
Jagan Teki [Wed, 14 Dec 2022 17:50:52 +0000 (23:20 +0530)]
ram: rockchip: Add rv1126 ddr loader params

Add DDR loader parameters for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Add rv1126 ddr3 support
Jagan Teki [Wed, 14 Dec 2022 17:50:51 +0000 (23:20 +0530)]
ram: rockchip: Add rv1126 ddr3 support

Add DDR3 detection timings for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Update ddr pctl regs for px30
Jagan Teki [Wed, 14 Dec 2022 17:50:50 +0000 (23:20 +0530)]
ram: rockchip: Update ddr pctl regs for px30

Add full ddr pctl registers and bit masks for px30.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Compute ddr capacity based on grf split
Jagan Teki [Wed, 14 Dec 2022 17:50:49 +0000 (23:20 +0530)]
ram: rockchip: Compute ddr capacity based on grf split

DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.

Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: rockchip: Add common ddr type configs
Jagan Teki [Wed, 14 Dec 2022 17:50:48 +0000 (23:20 +0530)]
ram: rockchip: Add common ddr type configs

We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.

The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoram: Mark ram-uclass depend on TPL_DM or SPL_DM
Jagan Teki [Wed, 14 Dec 2022 17:50:47 +0000 (23:20 +0530)]
ram: Mark ram-uclass depend on TPL_DM or SPL_DM

ram-uclass is building irrespective of whether TPL_DM
or SPL_DM is enabled. So control the ram uclass build
based on TPL/SPL_DM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoconfigs: roc-pc-rk3399: Enable rockchip efuse support
Christopher Obbard [Wed, 23 Nov 2022 13:59:02 +0000 (13:59 +0000)]
configs: roc-pc-rk3399: Enable rockchip efuse support

Enable efuse support which allows reading of the cpuid#, serial#
and also generates a unique mac address from the board's serial.

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agorockchip: mkimage: make RC4 key const
John Keeping [Fri, 18 Nov 2022 16:13:18 +0000 (16:13 +0000)]
rockchip: mkimage: make RC4 key const

This is read-only data, so mark it as such.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agorc4: mark key as const
John Keeping [Fri, 18 Nov 2022 16:13:17 +0000 (16:13 +0000)]
rc4: mark key as const

Key data is never written so the parameter can be const, which allows
putting fixed keys in .rodata.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agorockchip: puma-rk3399: sync DTS with Linux kernel next-20221114
Quentin Schulz [Tue, 15 Nov 2022 14:46:23 +0000 (15:46 +0100)]
rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114

This synchronizes the Device Trees related to Puma RK3399 SoM with Linux
kernel next-20221114 to include two important changes pertaining to
eMMC and SD card instability.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agorockchip: clk: add watchdog clock to px30_clk_enable
Quentin Schulz [Mon, 14 Nov 2022 10:33:46 +0000 (11:33 +0100)]
rockchip: clk: add watchdog clock to px30_clk_enable

Add the PCLK_WDT_NS clock to px30_clk_enable so that the watchdog driver
can probe since it wants to enable this clock.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agorockchip: px30: make watchdog and tsadc trigger a first global reset
Quentin Schulz [Fri, 11 Nov 2022 11:25:48 +0000 (12:25 +0100)]
rockchip: px30: make watchdog and tsadc trigger a first global reset

By default, the PX30 is configured for watchdog and tsadc to trigger a
second global reset which is a more permissive reset than first global
reset.

From TRM part 1 "2.3 System Reset Solution":
glb_srstn_1 will reset the all logic, and
glb_srstn_2 will reset the all logic except GRF, SGRF and all GPIOs.

This enforces that the watchdog and tsadc trigger glb_srstn_1 as
similarly done for RK3399 in U-Boot (in SDRAM driver for some reason?),
TF-A and Coreboot.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
23 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Sun, 15 Jan 2023 15:31:17 +0000 (10:31 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh

23 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Sun, 15 Jan 2023 15:31:00 +0000 (10:31 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb

23 months agousb: gadget: dwc2_udc_otg: implement pullup()
Mattijs Korpershoek [Wed, 11 Jan 2023 08:19:27 +0000 (09:19 +0100)]
usb: gadget: dwc2_udc_otg: implement pullup()

Pullup is used by the usb framework in order to do software-controlled
usb_gadget_connect() and usb_gadget_disconnect().

Implement pullup() for dwc2 using the SOFT_DISCONNECT bit in the dctl
register:
* when pullup is on, clear SOFT_DISCONNECT
* when pullup is off, set SOFT_DISCONNECT

This is especially useful when a gadget disconnection is initiated but
no board_usb_cleanup() is called.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
23 months agousb: gadget: fastboot: detach usb just before rebooting
Dario Binacchi [Sat, 7 Jan 2023 16:48:07 +0000 (17:48 +0100)]
usb: gadget: fastboot: detach usb just before rebooting

The patch fixes the following error when updating a BSH SMM S2 board:
3:72>Start Cmd:FB[-t 8000]: ucmd nand write ${loadaddr} nanddtb ${filesize}
3:72>Okay (0.023s)
3:72>Start Cmd:FB: reboot
3:72>Fail Bulk(R):LIBUSB_ERROR_IO(0s)

The "fastboot reboot" command detaches the USB when it still needs to be
used. So let's detach the USB just before the reset.

CC: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Fixes: 5f7e01e9d5d800 ("usb: gadget: fastboot: detach usb on reboot commands")
Suggested-by: Michael Trimarchi <michael@amarulasolutions.com>
Co-developed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
23 months agousb: hub: allow to increase HUB_DEBOUNCE_TIMEOUT
Patrick Delaunay [Fri, 9 Sep 2022 09:45:23 +0000 (11:45 +0200)]
usb: hub: allow to increase HUB_DEBOUNCE_TIMEOUT

Add a new CONFIG_USB_HUB_DEBOUNCE_TIMEOUT to increase the
HUB_DEBOUNCE_TIMEOUT value, for example to 2s because some usb device
needs around 1.5s or more to make the hub port status to be
connected steadily after being powered off and powered on.

This 2s value is aligned with Linux driver and avoids to configure
"usb_pgood_delay" as a workaround for connection timeout on
some USB device; normally the env variable "usb_pgood_delay" is used
to delay the first query after power ON and thus the device answer,
but this variable not used to increase the connection timeout delay.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoconfigs: r8a77980: Condor: Enable MMC support by default
Andrey Dolnikov [Thu, 22 Dec 2022 21:18:25 +0000 (22:18 +0100)]
configs: r8a77980: Condor: Enable MMC support by default

This enables MMC support, which is available
on Condor board, by default.

Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
23 months agoARM: renesas: condor: switch eMMC bus to 1V8
Hai Pham [Thu, 22 Dec 2022 21:18:01 +0000 (22:18 +0100)]
ARM: renesas: condor: switch eMMC bus to 1V8

The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.

Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
23 months agoARM: dts: renesas: condor: Enable SPI NOR fast-read
Marek Vasut [Thu, 22 Dec 2022 21:17:20 +0000 (22:17 +0100)]
ARM: dts: renesas: condor: Enable SPI NOR fast-read

This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: ulcb: Set CONFIG_TEXT_BASE=0x0 on R-Car Gen3 ULCB
Marek Vasut [Thu, 22 Dec 2022 21:06:46 +0000 (22:06 +0100)]
ARM: renesas: ulcb: Set CONFIG_TEXT_BASE=0x0 on R-Car Gen3 ULCB

Since R-Car Gen3 already enables position independent build, also set
CONFIG_TEXT_BASE=0x0 to finalize the switch. This is possible since
534f0fbd65 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y")
fixed current env_get_char() crash with CONFIG_TEXT_BASE=0x0 .

This change permits us to start U-Boot from any location in DRAM instead
of specific TEXT_BASE.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: condor: Set CONFIG_TEXT_BASE=0x0 on R-Car Gen3 Condor
Marek Vasut [Thu, 22 Dec 2022 21:07:08 +0000 (22:07 +0100)]
ARM: renesas: condor: Set CONFIG_TEXT_BASE=0x0 on R-Car Gen3 Condor

Since R-Car Gen3 already enables position independent build, also set
CONFIG_TEXT_BASE=0x0 to finalize the switch. This is possible since
534f0fbd65 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y")
fixed current env_get_char() crash with CONFIG_TEXT_BASE=0x0 .

This change permits us to start U-Boot from any location in DRAM instead
of specific TEXT_BASE.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: Enable LTO on R-Car3 Falcon
Marek Vasut [Thu, 22 Dec 2022 21:13:15 +0000 (22:13 +0100)]
ARM: renesas: Enable LTO on R-Car3 Falcon

Enable LTO (link time optimization) to improve optimization
and reduce code size by cca. 30 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: Enable LTO on R-Car3 Draak
Marek Vasut [Thu, 22 Dec 2022 21:13:14 +0000 (22:13 +0100)]
ARM: renesas: Enable LTO on R-Car3 Draak

Enable LTO (link time optimization) to improve optimization
and reduce code size by cca. 29 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: Enable LTO on R-Car3 Ebisu
Marek Vasut [Thu, 22 Dec 2022 21:13:13 +0000 (22:13 +0100)]
ARM: renesas: Enable LTO on R-Car3 Ebisu

Enable LTO (link time optimization) to improve optimization
and reduce code size by cca. 34 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: Enable LTO on R-Car3 Condor
Marek Vasut [Thu, 22 Dec 2022 21:13:12 +0000 (22:13 +0100)]
ARM: renesas: Enable LTO on R-Car3 Condor

Enable LTO (link time optimization) to improve optimization
and reduce code size by cca. 32 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: Enable LTO on R-Car3 Eagle
Marek Vasut [Thu, 22 Dec 2022 21:13:11 +0000 (22:13 +0100)]
ARM: renesas: Enable LTO on R-Car3 Eagle

Enable LTO (link time optimization) to improve optimization
and reduce code size by cca. 32 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoARM: renesas: Enable LTO on R-Car3 ULCB
Marek Vasut [Thu, 22 Dec 2022 21:13:10 +0000 (22:13 +0100)]
ARM: renesas: Enable LTO on R-Car3 ULCB

Enable LTO (link time optimization) to improve optimization
and reduce code size by cca. 31 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
23 months agoMerge tag 'u-boot-stm32-20230113' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Fri, 13 Jan 2023 14:56:19 +0000 (09:56 -0500)]
Merge tag 'u-boot-stm32-20230113' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add driver to manage onboard hub supplies
Add calibration support for stm32-adc
Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
stm32mp157a-dk1-scmi-u-boot.dtsi update
Add support of OP-TEE and STM32MP13x in bsec driver
ECDSA various fixes for stm32mp

23 months agoMerge tag 'efi-2023-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 13 Jan 2023 13:37:32 +0000 (08:37 -0500)]
Merge tag 'efi-2023-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-04-rc1

Documentation:

* build infodocs target on Gitlab CI, Azure

UEFI:

* fix function descriptions
* add .rela sections to .text on arm64
* use EFI_EXIT in efi_riscv_get_boot_hartid
* improve specification conformance of set_keyboard_layout()

23 months agoARM: stm32: Make ECDSA authentication available to U-Boot
Marek Vasut [Thu, 12 Jan 2023 17:58:42 +0000 (18:58 +0100)]
ARM: stm32: Make ECDSA authentication available to U-Boot

With U-Boot having access to ROM API call table, it is possible to use
the ROM API call it authenticate e.g. signed kernel fitImages using the
BootROM ECDSA support. Make this available by pulling the ECDSA BootROM
call support from SPL-only guard.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
23 months agoARM: stm32: Pass ROM API table pointer to U-Boot proper
Marek Vasut [Thu, 12 Jan 2023 17:58:41 +0000 (18:58 +0100)]
ARM: stm32: Pass ROM API table pointer to U-Boot proper

The ROM API table pointer is no longer accessible from U-Boot, fix
this by passing the ROM API pointer through. This makes it possible
for U-Boot to call ROM API functions to authenticate payload like
signed fitImages.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
23 months agoARM: stm32: Factor out save_boot_params
Marek Vasut [Thu, 12 Jan 2023 17:58:40 +0000 (18:58 +0100)]
ARM: stm32: Factor out save_boot_params

The STM32MP15xx platform currently comes with two incompatible
implementations of save_boot_params() weak function override.
Factor the save_boot_params() implementation into common cpu.c
code and provide accessors to read out both ROM API table address
and DT address from any place in the code instead.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
23 months agoARM: stm32: Fix ECDSA authentication with Dcache enabled
Marek Vasut [Thu, 12 Jan 2023 17:58:39 +0000 (18:58 +0100)]
ARM: stm32: Fix ECDSA authentication with Dcache enabled

In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the MMU tables are set up and the BootROM
region is not marked as executable, so an attempt to run code from it
results in a hang. Mark the BootROM region as executable as suggested
by Patrick to prevent the hang.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
23 months agoefi_loader: provide agent_handle to efi_disk_add_dev()
Heinrich Schuchardt [Sat, 8 Oct 2022 07:11:54 +0000 (09:11 +0200)]
efi_loader: provide agent_handle to efi_disk_add_dev()

In efi_disk_add_dev() we have to open protocols with BY_DRIVER and
BY_CHILD_CONTROLLER. Provide the handle of the EFI block driver. The actual
usage of the value will follow in a later patch.

Change function descriptions to Sphinx style.

Remove a TODO: tag.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
23 months agoefi_selftest: add hii set keyboard layout test case
Vincent Stehlé [Fri, 6 Jan 2023 09:46:41 +0000 (10:46 +0100)]
efi_selftest: add hii set keyboard layout test case

Add a test for the case when the HII database protocol
set_keyboard_layout() function is called with a NULL key_guid argument.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
23 months agoefi_loader: refine set_keyboard_layout() status
Vincent Stehlé [Fri, 6 Jan 2023 09:46:40 +0000 (10:46 +0100)]
efi_loader: refine set_keyboard_layout() status

As per the EFI specification, the HII database protocol function
set_keyboard_layout() must return EFI_INVALID_PARAMETER when it is called
with a NULL key_guid argument. Modify the function accordingly to improve
conformance.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
23 months agoefi_loader: use EFI_EXIT in efi_riscv_get_boot_hartid
Heinrich Schuchardt [Wed, 11 Jan 2023 18:08:01 +0000 (19:08 +0100)]
efi_loader: use EFI_EXIT in efi_riscv_get_boot_hartid

After calling EFI_ENTRY we have to call EFI_EXIT before returning.

Add a missing EFI_EXIT().

Fixes: 1ccf87165e38 ("efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support")
Reported-by: Dave Jones <dave.jones@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
23 months agoefi_loader: add .rela sections to .text on arm64
Heinrich Schuchardt [Sun, 8 Jan 2023 18:00:47 +0000 (19:00 +0100)]
efi_loader: add .rela sections to .text on arm64

_relocate() needs the information in .rela* for self relocation
of the EFI binary.

Fixes: d7ddeb66a6ce ("efi_loader: fix building aarch64 EFI binaries")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
23 months agoefi_loader: fix description of memory functions
Heinrich Schuchardt [Sun, 8 Jan 2023 00:00:00 +0000 (01:00 +0100)]
efi_loader: fix description of memory functions

* Add missing function descriptions
* Adjust to Sphinx style

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
23 months agodoc: build infodocs target on Gitlab CI, Azure
Heinrich Schuchardt [Thu, 12 Jan 2023 19:30:58 +0000 (20:30 +0100)]
doc: build infodocs target on Gitlab CI, Azure

Add infodocs target to CI testing.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
23 months agodoc: fix description of u16_strcasecmp()
Heinrich Schuchardt [Sat, 7 Jan 2023 23:23:06 +0000 (00:23 +0100)]
doc: fix description of u16_strcasecmp()

Remove non-existent parameter 'n' from function description.

Fixes: 7a9b366cd9b7 ("lib: add function u16_strcasecmp()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
23 months agoMerge branch '2023-01-12-further-assorted-general-updates'
Tom Rini [Thu, 12 Jan 2023 22:05:41 +0000 (17:05 -0500)]
Merge branch '2023-01-12-further-assorted-general-updates'

- Bring in a number of assorted updates, some of which have been waiting
  around for a bit.  Make silent console really be silent, get rid of
  gpio_hog_probe_all, add RNG for imx6, make net/fm use fs_loader, get
  rid of a bad __weak usage and set distro_bootpart_uuid in another case.

23 months agogpio: Get rid of gpio_hog_probe_all()
Marek Vasut [Thu, 22 Sep 2022 15:53:26 +0000 (17:53 +0200)]
gpio: Get rid of gpio_hog_probe_all()

The gpio_hog_probe_all() functionality can be perfectly well replaced by
DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback
of each GPIO hog driver instance after .bind() and thus configure the
hogged GPIO accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
23 months agodm: fix probing of all devices that have u-boot, dm-pre-reloc in SPL/TPL
Quentin Schulz [Thu, 22 Sep 2022 15:53:25 +0000 (17:53 +0200)]
dm: fix probing of all devices that have u-boot, dm-pre-reloc in SPL/TPL

Currently, dm_probe_devices checks that the flags of the device contains
DM_FLAG_PRE_RELOC. However DM_FLAG_PRE_RELOC is a driver - and not a
device - flag. This means that the check in pre_reloc_only mode would
always fail.

Instead, what was aimed to be checked is that either the driver of the
device has the flag set, or that the device has the u-boot,dm-pre-reloc
Device Tree property set.

So let's fix the check to allow u-boot,dm-pre-reloc devices to be
probed.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
23 months agodistro_bootcmd: Set distro_bootpart_uuid for block devices
Marek Vasut [Thu, 5 Jan 2023 13:08:23 +0000 (14:08 +0100)]
distro_bootcmd: Set distro_bootpart_uuid for block devices

The assignment of block device nodes in Linux is not deterministic by
default, i.e. a newly added eMMC controller or other block device can
change the assignment of /dev/mmcblkN (or other block device node like
e.g. /dev/sdXy) and prevent the system from picking the correct block
device for root filesystem in case the root filesystem is specified on
kernel command line using 'root=/dev/mmcblkNpM' (or 'root=/dev/sdXy'
etc.).

One way out is to derive PARTUUID in U-Boot, which is unique identifier
of a partition, and pass that as root=PARTUUID=<partuuid> to Linux via
kernel command line. Linux would then find the partition using PARTUUID,
no matter on which block device the partition resides and which node was
assigned to that block device.

Derive the PARTUUID before scanning for extlinux presence and assign it
into distro_bootpart_uuid environment variable, which can then be used
in extlinux.conf kernel command line specifier.

Note that it is not possible to do this in scan_dev_for_extlinux script
because this script is called from scan_dev_for_boot script, which is
called for both block devices as well as UBI volumes, and we can not
derive PARTUUID for UBI volumes.

Signed-off-by: Marek Vasut <marex@denx.de>
23 months agoRevert "time: add weak annotation to timer_read_counter declaration"
Harald Seiler [Thu, 5 Jan 2023 00:08:47 +0000 (01:08 +0100)]
Revert "time: add weak annotation to timer_read_counter declaration"

This reverts commit 65ba7add0d609bbd035b8d42fafdaf428ac24751.

A weak extern is a nasty sight to behold: If the symbol is never
defined, on ARM, the linker will replace the function call with a NOP.
This behavior isn't well documented but there are at least some hints
to it [1].

When timer_read_counter() is not defined, this obviously does the wrong
thing here and it does so silently.  The consequence is that a board
without timer_read_counter() will sleep for random amounts and generally
have erratic get_ticks() values.

Drop the __weak annotation of the extern so a linker error is raised
when timer_read_counter() is not defined.  This is okay, the original
reason for the reverted change - breaking the sandbox build - no longer
applies.

Final sidenote:  This was the only weak extern in the entire tree at
this time as far as I can tell.  I guess we should avoid introduction of
them again as they are obviously a very big footgun.

[1]: https://stackoverflow.com/questions/31203402/gcc-behavior-for-unresolved-weak-functions

Fixes: 65ba7add0d60 ("time: add weak annotation to timer_read_counter declaration")
Reported-by: Serge Bazanski <q3k@q3k.org>
Signed-off-by: Harald Seiler <hws@denx.de>
23 months agonet: fm: Support loading firmware from a filesystem
Sean Anderson [Thu, 29 Dec 2022 16:53:01 +0000 (11:53 -0500)]
net: fm: Support loading firmware from a filesystem

This adds a new method to load Fman firmware from a filesystem. This
allows users to use regular files instead of hard-coded offsets for the
firmware.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
23 months agonet: fm: Add firmware name parameter
Sean Anderson [Thu, 29 Dec 2022 16:53:00 +0000 (11:53 -0500)]
net: fm: Add firmware name parameter

In order to read the firmware from the filesystem, we need a file name.
Read the firmware name from the device tree, using the firmware-name
property. This property is commonly used in Linux to determine the
correct name to use (and can be seen in several device trees in U-Boot).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
23 months agomisc: fs_loader: Add function to get the chosen loader
Sean Anderson [Thu, 29 Dec 2022 16:52:59 +0000 (11:52 -0500)]
misc: fs_loader: Add function to get the chosen loader

The fs_loader device is used to pull in settings via the chosen node.
However, there was no library function for this, so arria10 was doing it
explicitly. This function subsumes that, and uses ofnode_get_chosen_node
instead of navigating the device tree directly. Because fs_loader pulls
its config from the environment by default, it's fine to create a device
with nothing backing it at all. Doing this allows enabling
CONFIG_FS_LOADER without needing to modify the device tree.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
23 months agoAdded configs required for dcp_rng driver
Kshitiz Varshney [Thu, 22 Dec 2022 08:50:29 +0000 (09:50 +0100)]
Added configs required for dcp_rng driver

This commit adds configs required for using dcp_rng driver in imx6ull
defconfig files.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
23 months agoAdded dcp_rng driver initialization code
Kshitiz Varshney [Thu, 22 Dec 2022 08:50:28 +0000 (09:50 +0100)]
Added dcp_rng driver initialization code

This commit initializes dcp_rng device driver inside
arch_misc_init() function.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
23 months agoUboot RNG Driver using Data Co-processor
Kshitiz Varshney [Thu, 22 Dec 2022 08:50:27 +0000 (09:50 +0100)]
Uboot RNG Driver using Data Co-processor

This commit introduces Random number generator to uboot. It uses DCP
driver for number generation.
RNG driver can be invoked by using below command on uboot prompt:-
           rng <number of bytes>

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
23 months agocommon: spl: ram: fix return code
Nikita Shubin [Mon, 12 Dec 2022 08:03:35 +0000 (11:03 +0300)]
common: spl: ram: fix return code

Instead of always retuning success, return actual result of
load_simple_fit_image or spl_parse_image_header, otherwise we
might end up jumping on uninitialized spl_image->entry_point.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Stefan Roese <sr@denx.de>
23 months agocmd: spi: Judge the number of added parameters
chenzhipeng [Tue, 6 Dec 2022 09:24:38 +0000 (17:24 +0800)]
cmd: spi: Judge the number of added parameters

When only sspi is entered, help information can be printed.

Signed-off-by: chenzhipeng <chenzhipeng@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
23 months agoconsole: Add option to keep it silent until env is loaded
Harald Seiler [Wed, 6 Jul 2022 11:19:10 +0000 (13:19 +0200)]
console: Add option to keep it silent until env is loaded

Add a config-option which forces the console to stay silent until the
proper environment is loaded from flash.

This is important when the default environment does not silence the
console but no output must be printed when 'silent' is set in the flash
environment.

After the environment from flash is loaded, the console will be
silenced/unsilenced depending on it.  If PRE_CONSOLE_BUFFER is also
used, the buffer will now be flushed if the console should not be
silenced.

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
23 months agoconfigs: stm32mp13: Activate command stm32key
Patrick Delaunay [Fri, 6 Jan 2023 12:20:19 +0000 (13:20 +0100)]
configs: stm32mp13: Activate command stm32key

Activate the command stm32key with CONFIG_CMD_STM32KEY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoboard: st: Add support of STM32MP13x boards in stm32board cmd
Patrick Delaunay [Fri, 6 Jan 2023 12:20:18 +0000 (13:20 +0100)]
board: st: Add support of STM32MP13x boards in stm32board cmd

Add board identifiers for STMicroelectronics STM32MP13x boards:
- DISCO board: MB1635

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoconfigs: stm32mp13: Activate CONFIG_CMD_FUSE
Patrick Delaunay [Fri, 6 Jan 2023 12:20:17 +0000 (13:20 +0100)]
configs: stm32mp13: Activate CONFIG_CMD_FUSE

Activate the command fuse to access on STM32MP13x OTP with
the BSEC driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agostm32mp: Add support of STM32MP13x in bsec driver
Patrick Delaunay [Fri, 6 Jan 2023 12:20:16 +0000 (13:20 +0100)]
stm32mp: Add support of STM32MP13x in bsec driver

Add support for "st,stm32mp13-bsec" for STM32MP13x in the
bsec driver based on OP-TEE pseudo TA STM32MP BSEC.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agostm32mp: Add OP-TEE support in bsec driver
Patrick Delaunay [Fri, 6 Jan 2023 12:20:15 +0000 (13:20 +0100)]
stm32mp: Add OP-TEE support in bsec driver

When OP-TEE is used, the SMC for BSEC management are not available and
the STM32MP BSEC pseudo TA must be used (it is mandatory for STM32MP13
and it is a new feature for STM32MP15x).

The BSEC driver try to open a session to this PTA BSEC at probe
and use it for OTP read or write access to fuse or to shadow.

This patch also adapts the commands stm32key and stboard to handle
the BSEC_LOCK_PERM lock value instead of 1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agostm32mp: cosmetic: Update of bsec driver
Patrick Delaunay [Fri, 6 Jan 2023 12:20:14 +0000 (13:20 +0100)]
stm32mp: cosmetic: Update of bsec driver

Remove unnecessary return in stm32mp_bsec_write_lock and replace tab
by space for plat_auto opts.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoARM: dts: stm32: Add timer interrupts on stm32mp15
Patrick Delaunay [Wed, 14 Dec 2022 15:25:01 +0000 (16:25 +0100)]
ARM: dts: stm32: Add timer interrupts on stm32mp15

The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.

Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
("ARM: dts: stm32: Add timer interrupts on stm32mp15")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoARM: dts: stm32mp15: fix typo in stm32mp15xx-dkx.dtsi
Patrick Delaunay [Wed, 14 Dec 2022 15:25:00 +0000 (16:25 +0100)]
ARM: dts: stm32mp15: fix typo in stm32mp15xx-dkx.dtsi

Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file
Patrick Delaunay [Wed, 14 Dec 2022 15:24:59 +0000 (16:24 +0100)]
ARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file

The include file stm32mp1-clksrc.h is not necessary for the SCMI STM32MP15
dtsi files as the clock tree is not defined in the U-Boot SCMI device tree;
these SCMI device tree only support TFABOOT with stm32mp15_defconfig,
SPL with the basic boot defconfig is not supported.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoadc: stm32mp15: add calibration support
Olivier Moysan [Thu, 15 Dec 2022 12:51:10 +0000 (13:51 +0100)]
adc: stm32mp15: add calibration support

Add support of offset and linear calibration for STM32MP15.
The calibration is performed once at probe. The ADC is set in power on
state for calibration. It remains in this state after calibration,
to give to the kernel the opportunity to retrieve calibration data,
directly from the ADC.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1
Fabrice Gasnier [Mon, 12 Dec 2022 10:44:37 +0000 (11:44 +0100)]
ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1

Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.

[backport from linux ad9591b01d24]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
23 months agoconfigs: stm32: enable USB onboard HUB driver
Fabrice Gasnier [Mon, 12 Dec 2022 10:44:36 +0000 (11:44 +0100)]
configs: stm32: enable USB onboard HUB driver

Activate the USB onboard HUB driver, that is used to enable the HUB supply
on STM32MP15 EVAL, DK1 and DK2 boards.
This avoids marking the 3v3 corresponding regulator as always-on.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
23 months agousb: onboard-hub: add driver to manage onboard hub supplies
Fabrice Gasnier [Mon, 12 Dec 2022 10:44:35 +0000 (11:44 +0100)]
usb: onboard-hub: add driver to manage onboard hub supplies

The main issue the driver addresses is that a USB hub needs to be
powered before it can be discovered. This is often solved by using
"regulator-always-on".

This driver is inspired by the Linux v6.1 driver. It only enables (or
disables) the hub vdd (3v3) supply, so it can be enumerated.
Scanning of the device tree is done in a similar manner to the sandbox,
by the usb-uclass. DT part looks like:

&usbh_ehci {
...
#address-cells = <1>;
#size-cells = <0>;
hub@1 {
compatible = "usb424,2514";
reg = <1>;
vdd-supply = <&v3v3>;
};
};

When the bus gets probed, the driver is automatically probed/removed from
the bus tree, as an example on stm32:
STM32MP> usb start
starting USB...
STM32MP> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 usb           0  [ + ]   ehci_generic          |   |-- usb@5800d000
 usb_hub       0  [ + ]   usb_onboard_hub       |   |   `-- hub@1
 usb_hub       1  [ + ]   usb_hub               |   |       `-- usb_hub

STM32MP> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 2mA)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
23 months agoMerge branch '2023-01-11-assorted-general-updates'
Tom Rini [Thu, 12 Jan 2023 15:15:24 +0000 (10:15 -0500)]
Merge branch '2023-01-11-assorted-general-updates'

- Assorted Kconfig cleanups, code clean ups, env+ubi updates, correct
  return value propagation out of environment scripts, and update CI to
  latest "jammy" tag.

23 months agoARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
Fabrice Gasnier [Mon, 12 Dec 2022 10:32:42 +0000 (11:32 +0100)]
ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1

phy-stm32-usbphyc bindings uses a connector node with vbus-supply
property.

[backport from linux 43e55d778a6b]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
23 months agoCI/Docker: Update to jammy-20221130 tag
Tom Rini [Wed, 11 Jan 2023 17:24:57 +0000 (12:24 -0500)]
CI/Docker: Update to jammy-20221130 tag

Update to the latest "jammy" tag. This requires us to list libc6-i386 as
a required package to install (for nokia_rx51 tests) that was previously
implicit.

Signed-off-by: Tom Rini <trini@konsulko.com>