Simon Glass [Tue, 6 Nov 2018 22:21:27 +0000 (15:21 -0700)]
sandbox: Update some drivers to work in SPL/TPL
At present sandbox drivers are mostly not used before relocation. Some of
these are needed by Chromium OS verified boot, since it uses sandbox TPL,
so update them accordingly.
Simon Glass [Tue, 6 Nov 2018 22:21:25 +0000 (15:21 -0700)]
sandbox: Add a function to read a host file
Add a way to read a file from the host filesystem. This can be useful for
reading test data, for example. Also fix up the writing function which was
not the right version, and drop the debugging lines.
Simon Glass [Tue, 6 Nov 2018 22:21:18 +0000 (15:21 -0700)]
cros_ec: Use uint instead of u8 for parameters
There is no advantage to using a u8 for function parameters. It forces
the compiler to mask values and can increase code size. Also the command
enum has been extended to 16 bits. Update the functions to use uint
instead.
Simon Glass [Tue, 6 Nov 2018 23:02:13 +0000 (16:02 -0700)]
buildman: Show boards with warning with w+
At present we should boards with warnings in the same way as those with
errors. This is not ideal. Add a new 'warn' state and show these listed
in yellow to match the actual warning lines printing with -e.
Simon Glass [Tue, 6 Nov 2018 23:02:12 +0000 (16:02 -0700)]
buildman: Rename the good, better, worse variables
At present we don't distinguish between errors and warnings when printing
the architecture summary. Rename the variables to better describe their
purpose.
'Worse' at present means we got an error, so use that as the name.
Simon Glass [Tue, 6 Nov 2018 23:02:10 +0000 (16:02 -0700)]
buildman: Only print toolchain probing with -v
At present --list-tool-chains prints a lot of information about the
toolchain-probing process. This is generally not very interesting.
Update buildman to print this only if --list-tool-chains is given
with -v.
When the device tree is missing a correct spi slave description below
the bus (compatible "spi-flash" or spi-max-frequency are missing),
the 'set_speed' callback can be called with 'speed' == 0 Hz.
At least with cadence qspi, this leads to a division by zero.
Prevent this by initializing speed to 100 kHz in this case (same
fallback value as is done in 'dm_spi_claim_bus') and issue a warning
to console.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Baruch Siach [Sun, 28 Oct 2018 12:41:14 +0000 (14:41 +0200)]
fdt: restore board_fdt_blob_setup() declaration
Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the
prototype declaration of board_fdt_blob_setup(), most likely by mistake.
This didn't break the build because the only file calling this function
(lib/fdtdec.c) provides a local weak definition. Restore the
declaration.
Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Thu, 18 Oct 2018 18:37:05 +0000 (20:37 +0200)]
fdt: Fix uncompress_blob() for U-Boot proper
When U-Boot proper is compiled with CONFIG_MULTI_DTB_FIT and tries
to call uncompress_blob(), it fails with -ENOTSUPP. This is because
the full implementation of this function which includes compression
is available only in SPL. In U-Boot proper or if the compression is
not enabled, the blob is not compressed and thus can be passed to
locate_dtb_in_fit() in fdtdec_setup() without any changes. Pass the
blob without any changes if compression is not enabled instead of
failing.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Liviu Dudau [Mon, 15 Oct 2018 09:03:06 +0000 (10:03 +0100)]
dm: core: Widen the dump tree to show more of the driver's name.
With drivers that have prefix names that are quite long (like
'versatile_') it is useful to have a wider column for the driver's
name when dumping the device driver tree.
Also update the tests to take into account the wider output format.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
If we want to control which network interface is actually used, we have to
issue 'setenv ethrotate no'. If ethrotate is not set any interface may be
used.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Hou Zhiqiang [Mon, 8 Oct 2018 08:35:47 +0000 (16:35 +0800)]
dm/pci: Change the first CFG read to Vendor ID in enumeration
As the PCIe specification recommend reading the Vendor ID register
to determine if a Function is present, read the Vendor ID of a
non-existent Function must not result in system error, so we'd better
make the first CFG read to Vendor ID instead of Header Type register
in the PCIe enumeration.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fabrice Gasnier [Mon, 12 Nov 2018 13:04:01 +0000 (14:04 +0100)]
cmd: adc: add an option to scan some or all available channels
Add new option to 'adc' command to do a single scan of:
- some channel(s), using mask argument
- all channels available on an ADC device (when optional mask is omitted).
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Fabrice Gasnier [Mon, 12 Nov 2018 13:03:58 +0000 (14:03 +0100)]
dm: adc: add uclass's mask and conversion helpers
Add two functions to ADC uclass's:
- adc_raw_to_uV() to ease ADC raw value conversion to microvolts
- adc_channel_mask() to get channels on consumer side
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Baruch Siach [Sun, 11 Nov 2018 10:31:04 +0000 (12:31 +0200)]
arm64: mvebu: a8k: autodetect RAM size
Some Armada 8K boards like Macchiatobin and Clearfog GT-8K use RAM from
external DIMM. Hard coding the RAM size in the device-tree is not
convenient. Fortunately, the ATF that initializes the RAM knows the size
of RAM, and U-Boot can query the ATF using a SMC call.
The ATF maps the lower 3G of RAM starting at address 0. Higher RAM is
mapped at 4G. This leaves a 1G hole between 3G and 4G for IO
peripherals. Use a second bi_dram[] entry to describe the higher RAM
area. As a result, CONFIG_NR_DRAM_BANKS must be set to 2 to use more
than 3GB RAM.
This code in this commit is mostly taken from downstream Marvell U-Boot
code by Grzegorz Jaszczyk.
Cc: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 11 Nov 2018 10:31:02 +0000 (12:31 +0200)]
MIPS: drop asm/const.h
Commit 86f21c96f467368 (mips: Use common _AC macro now.) removed the _AC
definition from const.h. All other macros defined in const.h are not
used anywhere, and there is now no user of this header. Remove this
header.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 11 Nov 2018 10:31:01 +0000 (12:31 +0200)]
Use _AC and UL macros from linux/const.h
Drop the _AC and UL macros from common.h. Linux headers is the original
source of this macro, so keep its definition in the same header.
Update existing users of these macros to include const.h directly.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Rick Chen <rick@andestech.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 11 Nov 2018 10:31:00 +0000 (12:31 +0200)]
linux/const.h: import from kernel
Combine the uapi/linux/const.h header into the kernel linux/const.h. The
next commit will use the _AC macro this header instead of the common.h
definition.
Based on Linux kernel version 4.19.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Sun, 18 Nov 2018 20:47:16 +0000 (15:47 -0500)]
Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips
- tree-wide: introduce LDFLAGS_STANDALONE
- MIPS: fix long-standing issue with linking of standalone programs
- MIPS: MT76xx: add GPIO and WDT drivers
- MIPS: MT76xx: various fixes and updates to gardena-smart-gateway board
- MIPS: MT76xx: various fixes and updates to linkit-smart-7688 board
Use the global MIPS specific u-boot.lds for linking standalone programs
instead of the outdated ones in examples/standalone/. Also pass --gc-sections
in LDFLAGS_STANDALONE to optimize the size of standalone programs.
Finally remove the deprecated config.mk files in arch/mips/cpu/mips[32,64]/.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Kbuild: standalone: do not ignore platform-specific OBJCOPYFLAGS
Currently the OBJCOPYFLAGS are cleared when assigning "-O srec"
or "-O binary" for standalone programs. All flags set by arch-specific
Makefiles are lost. This is bad if an arch demands arch-specific
flags for the objcopy step.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Introduce a new Makefile variable for passing LDFLAGS to standalone
programs. Currently the variable CONFIG_STANDALONE_LOAD_ADDR is
misued on some archs to pass a specific linker script.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
Stefan Roese [Tue, 9 Oct 2018 06:59:16 +0000 (08:59 +0200)]
mips: mt76xx: linkit-smart-7688: Misc updates to dts/config/defconfig
These misc updates include the following changes:
- Change baudrate from 57600 to 115200
- Enable MIPS_BOOT_CMDLINE_LEGACY
- Enable FIT support
- Enable ethernet support
- Enable SPI support
- Enable GPIO support
- Change max image size from 0x40000 to 0x80000
A note about the baudrate change:
The original Mediatek U-Boot version used 57600 baud. Lets move to a
more common and faster speed of 115200 baud. And remove the "console="
property from the DT as its not needed.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 9 Oct 2018 06:59:14 +0000 (08:59 +0200)]
mips: mt76xx: gardena-smart-gateway: Misc updates to dts/config/defconfig
These misc updates include the following changes:
- Change baudrate from 57600 to 115200
- Enable MIPS_BOOT_CMDLINE_LEGACY
- Enable FIT support
- Enable ethernet support
- Enable SPI NOR and NAND support
- Change MTD_UBI_BEB_LIMIT to 22
- Enable MTD Support
- Enable GPIO support
- Enable watchdog support
- Enable bootcounter support
- Enable version variable
- Change max image size from 0x80000 to 0xa0000
- Change SYS_MALLOC_LEN to 16MiB (because of UBI/UBIFS)
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 9 Oct 2018 06:59:10 +0000 (08:59 +0200)]
mips: mt76xx: Enable watchdog support
This patch enables and starts the watchdog on the MT7620 platform.
Currently the WD timeout is configured to 60 seconds.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed build error due to missing function prototype arch_misc_init] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This fixes an issue which has been noticed on the Gardena board, with
the watchdog enabled, where the watdchdog reset (after a system hang)
did result in reporting of 2.9 GiB and a hang after this. With this
patch applied the memory controller is correctly reset and initialized
again even after a watchdog reset.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Mon, 8 Oct 2018 10:38:01 +0000 (12:38 +0200)]
gpio: Add MT7621 GPIO support
This patch adds GPIO support for the Mediatek MT7621 SoC, tested on
MT7688 (Gardena smart-gateway). The driver is loosly based on the
Linux kernel version.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned'] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Thu, 4 Oct 2018 11:39:07 +0000 (13:39 +0200)]
wdt: Add MT7621 watchdog driver
This patch adds watchdog support for the Mediatek MT7621 SoC. The driver
is loosly based on the Linux kernel version.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed merge conflict in drivers/watchdog/Kconfig] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Konrad Beckmann [Wed, 7 Nov 2018 19:51:46 +0000 (14:51 -0500)]
fdt_region: Ensure that depth never goes below -1
A specially crafted FIT image makes it possible to overflow the stack
with controlled values when using the verified boot feature. Depending
on the memory layout, this could be used to overwrite configuration
variables on the heap and setting them to 0, e.g. disable signature
verification, thus bypassing it.
This change fixes a bug in fdt_find_regions where the fdt structure is
parsed. A lower value than -1 of depth can lead to a buffer underflow
write on the stack.
Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Konrad Beckmann [Wed, 7 Nov 2018 19:51:45 +0000 (14:51 -0500)]
image-sig: Ensure that hashed-nodes is null-terminated
A specially crafted FIT image leads to memory corruption in the stack
when using the verified boot feature. The function fit_config_check_sig
has a logic error that makes it possible to write past the end of the
stack allocated array node_inc. This could potentially be used to bypass
the signature check when using verified boot.
This change ensures that the number of strings is correct when counted.
Signed-off-by: Konrad Beckmann <konrad.beckmann@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Martyn Welch [Tue, 6 Nov 2018 12:23:53 +0000 (12:23 +0000)]
Ability to modify distro boot filename
Add in the ability to modify the distro boot filename. Whilst not
immediately useful in normal usage, it allows an alternative
configuration to be provided when other u-boot functionality is used, such
as bootcount limit, to fallback to an alternative boot configuration. In
this case we can follow the same boot path as for normal boot, just
using an alternatively named configuration file.
For example, by providing the following `altbootcmd` when bootcount is in
use:
altbootcmd=setenv boot_extlinx_conf extlinux-rollback.conf; \
run distro_bootcmd
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Keerthy [Mon, 5 Nov 2018 06:04:54 +0000 (11:34 +0530)]
misc: fs_loader: Fix compiler warning
Fix compiler warning
drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects
argument of type ‘int’, but argument 5 has type ‘size_t
{aka long unsigned int}’ [-Wformat=]
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Keerthy [Mon, 5 Nov 2018 06:04:53 +0000 (11:34 +0530)]
misc: fs_loader: Use device_get_global_by_ofnode to get to node
Instead of two staged ofnode_to_offset followed by
device_get_global_by_of_offset approach, direcly use the
device_get_global_by_ofnode to fetch the device.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Keerthy [Mon, 5 Nov 2018 06:04:52 +0000 (11:34 +0530)]
fs: Makefile: Add fs.c under SPL for fs_loader
Add fs.c under SPL as well as it is needed for fs_loader
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add as obj-$(CONFIG_FS_LOADER) for non-SPL_FRAMEWORK builds] Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Lokesh Vutla [Fri, 2 Nov 2018 14:21:06 +0000 (19:51 +0530)]
armv7R: K3: am654: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support
for triggering DDR initialization from board_init_f().
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 2 Nov 2018 14:21:02 +0000 (19:51 +0530)]
ram: Introduce K3 AM654 DDR Sub System driver
K3 based AM654 devices has DDR memory subsystem that comprises
Synopys DDR controller, Synopsis DDR phy and wrapper logic to
intergrate these blocks into the device. This DDR subsystem
provides an interface to external SDRAM devices. Adding support
for the initialization of the external SDRAM devices by
configuring the DDRSS registers and using the buitin PHY
routines.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
Klaus Goger [Thu, 26 Apr 2018 18:18:10 +0000 (20:18 +0200)]
arm: Make arch specific memcpy thumb-safe.
The current arch implementation of memcpy cannot be called
from thumb code, because it does not use bx instructions on return.
This patch addresses that. Note, that this patch does not touch
the hot loop of memcpy, so performance is not affected.
Tested on MXS (arm926ejs) with and without thumb-mode enabled.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Patrice Chotard [Wed, 24 Oct 2018 12:10:23 +0000 (14:10 +0200)]
test/py: test pinmux command
Add pinmux test which test the following commands:
- pinmux list
- pinmux dev
- pinmux status
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Mark some tests as sandbox-centric] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Patrice Chotard [Wed, 24 Oct 2018 12:10:18 +0000 (14:10 +0200)]
pinctrl: stm32: Add get_pins_count() ops
Add get_pins_count ops to obtain the number of pins
owns by a pin-controller.
On STM32 SoCs bindings, each pin-controller owns
several gpio banks. Each GPIO bank can own up to 16 pins.
To obtain the total pins count, walk through each sub-nodes
(ie GPIO banks) and sum each GPIO banks pins number. For that
in probe() we build a list with each GPIO device reference found.
This list will also be used with future get_pin_muxing and get_pin_name
ops to speed up and optimize walk through all GPIO banks.
As this code is common to all STM32 SoCs, this code is put
under SPL_BUILD compilation flag to avoid to increase SPL code size
for STM32F7 which is limited to 32Ko.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Wed, 24 Oct 2018 12:10:17 +0000 (14:10 +0200)]
cmd: pinmux: Add pinmux command
pinmux command allows to :
- list all pin-controllers available on platforms
- select a pin-controller
- display the muxing of all pins of the current pin-controller
or all pin-controllers depending of given options
Adam Ford [Sun, 21 Oct 2018 18:58:39 +0000 (13:58 -0500)]
ARM: omap3_logic: Make CONFIG_SYS_TEXT_BASE match README.omap3
README.omap3 has two options. For option 1, CONFIG_SYS_TEXT_BASE
is set to 0x80100000. Option 2 lists 0x80008000. The existing
value is neither of these, so this patch makes it equivalent to
Option 1.
mtd: nand: lpc32xx slc: disable DMA support in SPL builds
Testing and analysis shows that at the moment LPC32xx NAND SLC driver
can not get PL080 DMA backbone support in SPL build, because SPL NAND
loaders operate with subpage (ECC step to be precisely) reads, and
this is not supported in the NAND SLC + DMA + hardware ECC calculation
bundle.
The change removes a cautious build time warning and explicitly
disables DMA flavour of the driver for SPL builds, to reduce the
amound of #ifdef sections the code blocks are minimally reorganized.
mtd: nand: lpc32xx mlc: predefine number of NAND chips to support
Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC
driver only, as a preparation for potential removal or replacement of
the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same
value is used by the single user Work Microwave Work 92105 board, thus
it will be safe now to remove the option as a board specific one.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Ye Li [Thu, 18 Oct 2018 14:16:46 +0000 (16:16 +0200)]
gpio: pca953x: Clear the polarity invert register at init
The pca953x_gpio driver uses default value of polarity inversion
register. For some devices like PCA9557 and MAX7310, their polarity
inversion register default value is 0xf0. So for high 4 ports, when
reading their values, the values are inverted as the actual level.
This patch clears the polarity inversion register to 0 at init, so
that the port read and write values are aligned.
Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>