Tom Rini [Fri, 17 Jul 2020 12:04:28 +0000 (08:04 -0400)]
Merge tag 'u-boot-imx-20200716' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
i.MX for 2020.10
----------------
- i.MX DDR driver fix/update for i.MX8M
- i.MX pinctrl driver fix.
- Use arm_smccc_smc to remove imx sip function
- i.MX8M clk update
- support booting aarch32 kernel on aarch64 hardware
- fused part support for i.MX8MP
- imx6: pcm058 to DM
Currently default output of 'printenv -e' is restricted to variables with
GUID EFI_GLOBAL_VARIABLE. This excludes db and dbx. As the number of
variables is small there is no need for this restriction.
If no GUID is provided, print all matching variables irrespective of GUID.
Always show the numeric value of the GUID.
If the GUID provided to 'setenv -e' is invalid, return CMD_RET_USAGE.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Include a file with the initial values for non-volatile UEFI variables
into the U-Boot binary. If this variable is set, changes to variable PK
will not be allowed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some distributions provide UEFI binaries like Shim that have been signed
using a Microsoft certificate. Provide the download paths for the public
keys.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
arm: dts: imx7: Fix error in coresight TPIU graph connection
OF graph endpoint connections must be bidirectional and dtc warn if they
are not. i.MX7 based DTs have an error and generate
warnings:
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/replicator/ports/port@0/endpoint: graph connection to node
'/soc/tpiu@30087000/port/endpoint' is not bidirectional
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/soc/tpiu@30087000/port/endpoint: graph connection to node
'/replicator/ports/port@1/endpoint' is not bidirectional
arm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)
This commit enables imx28 based XEA board's u-boot.sb (SPL) to download
u-boot proper (u-boot.img) via Ymodem protocol.
This is extremely useful in the recovery scenario where u-boot.sb is
downloaded via uuu utility to SDRAM [*], and then one can upload u-boot
proper via serial console to fully debrick the device.
Note - debricking procedure of imx28 devices:
- NXP's original USB based tools (like mxsldr or uuu) expect single
u-boot.sb which is a relic of the old U-Boot (~2013) without SPL and
U-Boot proper distinction.
After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog
can be started by wdt command. But the imx watchdog driver only
support start with the default timeout.
This commit adds the support for setting the timeout which pass from
the wdt command into the imx watchdog. If the timeout out of the
valid range(0.5~128s), start the watchdog with a timeout within the
valid range and the timeout is the one which closest to the passed
timeout.
Even if the HAB fuse is not set we want to be able to use the Cryptographic
Accelerator and Assurance Module (CAAM) for generating random numbers. So
SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set.
arch_misc_init() has to be called to initialize the CAAM.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ye Li [Wed, 10 Jun 2020 03:29:51 +0000 (20:29 -0700)]
gpio: mxc_gpio: Improve to use ofdata_to_platdata
Current mxc_gpio DM driver allocates the platdata in bind function to
handle both OF_CONTROL enabled case and disabled case. This implementation
puts the devfdt_get_addr in bind, which introduces much overhead especially
in board_f phase.
Change the driver to a common way for handling the cases by using
ofdata_to_platdata and using DM framework to allocate platdata.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 9 Jun 2020 10:34:42 +0000 (03:34 -0700)]
misc: scu_api: Add SCFW API to get the index of boot container set
Add SCFW API sc_misc_get_boot_container to get current boot container
set index.
The index value returns 1 for primary container set, 2 for secondary
container set.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 9 Jun 2020 07:59:06 +0000 (00:59 -0700)]
spi: fsl_qspi: Support to use full AHB space on i.MX
i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.
Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.
When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Ye Li [Tue, 9 Jun 2020 07:59:05 +0000 (00:59 -0700)]
spi: fsl_qspi: Add support for i.MX7ULP
Add compatible string and driver data for i.MX7ULP.
Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should
align with 1KB, because the lowest 10 bits are reserved by the
registers definition.
For i.MX7ULP which has only 128Bytes AHB buffer, must align it
when setting the registers and selecting cs.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Tom Rini [Fri, 10 Jul 2020 20:00:08 +0000 (16:00 -0400)]
github: azure: Update our GitHub template to note for CI
While the general policy of not taking changes to the project via pull
requests directly on GitHub has not changed, it can be useful to submit
a PR there in order to trigger a CI run on Azure. These are run
automatically and the results are populated back to GitHub. Add a note
to the template to reflect this.
Pragnesh Patel [Mon, 29 Jun 2020 09:47:24 +0000 (15:17 +0530)]
mmc: mmc_spi: correct the while condition
When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
Peng Fan [Thu, 9 Jul 2020 07:26:06 +0000 (15:26 +0800)]
imx8m: Refactor the OPTEE memory removal
Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.
When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Tested-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 15 Jul 2019 08:16:46 +0000 (01:16 -0700)]
imx8mn/imx8mp: override env_get_offset and env_get_location
To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 9 Jul 2020 05:39:26 +0000 (13:39 +0800)]
imx8m: workaround ROM serror
ROM SError happens on two cases:
1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.
2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K of ROM is still protected and cause
SError.
Since ROM mask SError until ATF unmask it, so then ATF always meets the
exception. This patch works around the issue in SPL by enabling SPL
Exception vectors table and the SError exception, take the exception
to eret immediately to clear the SError.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 9 Jul 2020 03:35:15 +0000 (11:35 +0800)]
imx8m: add sdhc/nand/ecspi clk api
Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.
Peng Fan [Sat, 30 May 2020 08:43:20 +0000 (16:43 +0800)]
pinctrl: imx5: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Peng Fan [Sat, 30 May 2020 08:39:14 +0000 (16:39 +0800)]
pinctrl: imx8m: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Peng Fan [Sat, 30 May 2020 08:37:39 +0000 (16:37 +0800)]
pinctrl: imx7: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Oliver Chen [Tue, 21 Apr 2020 06:48:09 +0000 (14:48 +0800)]
drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue
Add logic to automatically update umctl2's setting based
on phy training CDD value for rank to rank space issue
Acked-by: Ye Li <ye.li@nxp.com> Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jian Li [Thu, 27 Feb 2020 01:40:10 +0000 (09:40 +0800)]
imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit
In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jian Li <jian.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sherry Sun [Mon, 20 Jan 2020 03:13:14 +0000 (11:13 +0800)]
drivers: ddr: imx8mp: Add inline ECC feature support
the DRAM Controller in i.MX8MP will support a feature called "Inline ECC".
This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and
DDR3L). When this feature is enabled by software, the DRAM Controller
reserves 12.5% of DRAM capacity for ECC information, and presents only
the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to
the rest of the SoC.
The DRAM memory can be divided into 8 regions so that if a use case only
requires ECC protection on a subset of memory, then only that subset of
memory need support inline ECC. If this occurs, then there is no
performance penalty accessing the non-ECC-protected memory (no need to
access ECC for this portion of the memory map). This is all configured
with the DRAM Controller.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jacky Bai [Mon, 10 Feb 2020 10:02:00 +0000 (18:02 +0800)]
driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m
The 'selfref_en' should be bit'0', so correct the setting to
enable the auto self-refresh.
Reviewed-by: Jian Li <jian.li@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Mon, 13 Jul 2020 15:29:51 +0000 (11:29 -0400)]
Merge tag 'efi-2020-10-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc1 (3)
Up to now UEFI variables where stored in U-Boot environment variables.
Saving UEFI variables was not possible without saving the U-Boot
environment variables. With this patch series file ubootefi.var in the
EFI system partition is used for saving UEFI variables. Furthermore the
UEFI variables are exposed for reading at runtime.
Code corrections for UEFI secure boot are provided.
mmc: omap_hsmmc: Set 3.3V for IO voltage on all places
In commit commit d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
was changed 3.0V IO voltage to 3.3V but it was not done on all places in
omap_hsmmc driver. That commit broke eMMC support on Nokia N900.
This patch fixes that problematic commit and changes 3.0V to 3.3V on all
remaining places in omap_hsmmc driver.
Fixes: d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage") Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com>
Jan Kiszka [Wed, 1 Jul 2020 18:09:40 +0000 (20:09 +0200)]
arm: k3: Consolidate and silence k3_fit_atf.sh call
Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose
about what it does. Change that by wrapping the call to k3_fit_atf.sh
into a cmd, also using that chance to reduce duplicate lines of makefile
code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Tue, 30 Jun 2020 19:02:27 +0000 (15:02 -0400)]
omap3_beagle: Finish current outstanding DM migrations
At this point in time we can now remove our legacy code and switch to
enabling DM for USB and Ethernet.
Cc: Derald D. Woods <woods.technical@gmail.com> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
Adam Ford [Mon, 29 Jun 2020 23:49:41 +0000 (18:49 -0500)]
ARM: da850-evm: Unify config options with Kconfig
There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.
CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.
This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.
Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.
Adam Ford [Mon, 29 Jun 2020 23:32:02 +0000 (18:32 -0500)]
README: davinci: Clarify when SPL is used and the target devices.
The documentation states that SPL is enabled in all config options
for the da850. This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)
This also clarifies that SPL isn't only used for booting from SPI,
because it is also used for booting from MMC and NAND for those
devices supporting those boot options.
Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.
soc: ti: k3-ringacc: Add an API to request pair of rings
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most case Rings are used with DMA channels which required
to request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.
soc: ti: k3-ringacc: Move state tracking variables under a struct
Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.
dma: ti: k3-udma: Update driver to use static endpoint Data
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.
Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible with updated driver.