]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
4 years agoMerge tag 'u-boot-imx-20200716' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Fri, 17 Jul 2020 12:04:28 +0000 (08:04 -0400)]
Merge tag 'u-boot-imx-20200716' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.10
----------------

- i.MX DDR driver fix/update for i.MX8M
- i.MX pinctrl driver fix.
- Use arm_smccc_smc to remove imx sip function
- i.MX8M clk update
- support booting aarch32 kernel on aarch64 hardware
- fused part support for i.MX8MP
- imx6: pcm058 to DM

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785

4 years agoMerge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 16 Jul 2020 20:35:15 +0000 (16:35 -0400)]
Merge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (4)

Improvements for the UEFI subsystem include:

* support for read-only TEE-backed variables
* allow to compile PK, KEK, db, dbx fixed values into U-Boot
* bug fixes

Python testing related changes comprise:

* enable 'bootefi hello' for better test coverage
* remove SKIP messages in UEFI Python tests

The fitupd command is dropped.
Build errors for the lsblk command are fixed.

4 years agomx6memcal: fix build
Stefano Babic [Thu, 16 Jul 2020 13:11:18 +0000 (15:11 +0200)]
mx6memcal: fix build

Commit 4503299 has a side effect on this board, and build is broken.
Adjust mx6memcal_defconfig to build it again.

Signed-off-by: Stefano Babic <sbabic@denx.de>
4 years agoefi_loader: simplify 'printenv -e'
Heinrich Schuchardt [Wed, 15 Jul 2020 16:00:56 +0000 (18:00 +0200)]
efi_loader: simplify 'printenv -e'

Currently default output of 'printenv -e' is restricted to variables with
GUID EFI_GLOBAL_VARIABLE. This excludes db and dbx. As the number of
variables is small there is no need for this restriction.

If no GUID is provided, print all matching variables irrespective of GUID.

Always show the numeric value of the GUID.

If the GUID provided to 'setenv -e' is invalid, return CMD_RET_USAGE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: describe EFI_VAR_FILE_MAGIC
Heinrich Schuchardt [Thu, 16 Jul 2020 05:18:40 +0000 (07:18 +0200)]
efi_loader: describe EFI_VAR_FILE_MAGIC

Add documentation for EFI_VAR_FILE_MAGIC used in the file format for UEFI
variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: pre-seed UEFI variables
Heinrich Schuchardt [Tue, 14 Jul 2020 19:25:28 +0000 (21:25 +0200)]
efi_loader: pre-seed UEFI variables

Include a file with the initial values for non-volatile UEFI variables
into the U-Boot binary. If this variable is set, changes to variable PK
will not be allowed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: identify PK, KEK, db, dbx correctly
Heinrich Schuchardt [Wed, 15 Jul 2020 10:40:35 +0000 (12:40 +0200)]
efi_loader: identify PK, KEK, db, dbx correctly

To determine if a varible is on the of the authentication variables
PK, KEK, db, dbx we have to check both the name and the GUID.

Provide a function converting the variable-name/guid pair to an enum and
use it consistently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: configuration of variables store
Heinrich Schuchardt [Tue, 14 Jul 2020 17:18:33 +0000 (19:18 +0200)]
efi_loader: configuration of variables store

The file based and the OP-TEE based UEFI variable store are mutually
exclusive. Define them as choice options in Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: provide links to Microsoft UEFI certificates
Heinrich Schuchardt [Tue, 14 Jul 2020 10:52:51 +0000 (12:52 +0200)]
doc: provide links to Microsoft UEFI certificates

Some distributions provide UEFI binaries like Shim that have been signed
using a Microsoft certificate. Provide the download paths for the public
keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: update secure state
Heinrich Schuchardt [Tue, 14 Jul 2020 06:14:08 +0000 (08:14 +0200)]
efi_loader: update secure state

Update the UEFI secure state when variable 'PK' is updated in the TEE
variables implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agoefi_loader: restructure code for TEE variables
Heinrich Schuchardt [Tue, 14 Jul 2020 06:04:49 +0000 (08:04 +0200)]
efi_loader: restructure code for TEE variables

When using secure boot functions needed both for file and TEE based UEFI
variables have to be moved to the common code module efi_var_common.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: display RO attribute with TEE-backed variables
Ilias Apalodimas [Thu, 9 Jul 2020 20:00:40 +0000 (23:00 +0300)]
efi_loader: display RO attribute with TEE-backed variables

A previous commit adds support for displaying variables RO flag.
Let's add it on the TEE backed variable storage as well.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: skip warnings for network configuration
Heinrich Schuchardt [Mon, 13 Jul 2020 10:22:23 +0000 (12:22 +0200)]
efi_loader: skip warnings for network configuration

Skip messages should only be written if the setup is not suitable for
testing.

If DHCP is enabled, we should not write a skip message if no static network
configuration is supplied.

Likewise if a static network configuration is supplied, we should not write
a skip message if DHCP is not enabled.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_selftest: enable 'bootefi hello'
Heinrich Schuchardt [Mon, 13 Jul 2020 05:33:40 +0000 (07:33 +0200)]
efi_selftest: enable 'bootefi hello'

In our Python tests we want to run 'bootefi hello'. Enable it by default
when compiling with CMD_BOOTEFI_SELFTEST.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agocmd: fix lsblk command
Heinrich Schuchardt [Mon, 13 Jul 2020 20:22:31 +0000 (22:22 +0200)]
cmd: fix lsblk command

Add missing includes.
Add CMD_LSBLK to sandbox_defconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agocmd: drop fitupd command
Heinrich Schuchardt [Wed, 17 Jun 2020 08:53:29 +0000 (10:53 +0200)]
cmd: drop fitupd command

The `fitupd' command is not used by any board. The `dfu tftp' command
provides the same capabilities.

So let's drop the `fitupd' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoimx6: Remove unneeded CONFIG_DM_MDIO
Fabio Estevam [Mon, 13 Jul 2020 14:59:36 +0000 (11:59 -0300)]
imx6: Remove unneeded CONFIG_DM_MDIO

As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:

"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."

i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.

Remove it from the i.MX6 defconfig files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agoarm: dts: imx7: Fix error in coresight TPIU graph connection
Ilko Iliev [Mon, 13 Jul 2020 13:25:10 +0000 (15:25 +0200)]
arm: dts: imx7: Fix error in coresight TPIU graph connection

OF graph endpoint connections must be bidirectional and dtc warn if they
are not. i.MX7 based DTs have an error and generate
warnings:

arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/replicator/ports/port@0/endpoint: graph connection to node
'/soc/tpiu@30087000/port/endpoint' is not bidirectional
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/soc/tpiu@30087000/port/endpoint: graph connection to node
'/replicator/ports/port@1/endpoint' is not bidirectional

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
4 years agoarm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)
Lukasz Majewski [Fri, 10 Jul 2020 07:49:32 +0000 (09:49 +0200)]
arm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)

This commit enables imx28 based XEA board's u-boot.sb (SPL) to download
u-boot proper (u-boot.img) via Ymodem protocol.

This is extremely useful in the recovery scenario where u-boot.sb is
downloaded via uuu utility to SDRAM [*], and then one can upload u-boot
proper via serial console to fully debrick the device.

Note - debricking procedure of imx28 devices:
- NXP's original USB based tools (like mxsldr or uuu) expect single
  u-boot.sb which is a relic of the old U-Boot (~2013) without SPL and
  U-Boot proper distinction.

[*] On Host:
------------
cat << EOF > imx28_xea.lst
uuu_version 1.3.0
SDPS: boot -f /srv/tftp/xea/u-boot.sb
SDPU: done
EOF

Please start picocom:
sudo picocom -b 115200 -s "sz -vv" /dev/ttyUSB1
sudo ./uuu/uuu -V imx28_xea.lst

On the U-boot console one shall see:
Trying to boot from UART
CCC

Then please press CTRL+A, S
and type u-boot.img

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx6: aristainetos: sync defconfig with 2020.10
Heiko Schocher [Wed, 8 Jul 2020 05:39:59 +0000 (07:39 +0200)]
imx6: aristainetos: sync defconfig with 2020.10

as patch
gpio: search for gpio label if gpio is not found through bank name

is now in mainline, but functionality is disabled, we
need to enable

CONFIG_DM_GPIO_LOOKUP_LABEL

for the aristainetos boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
4 years agowatchdog: imx: Support set timeout by wdt command
Mo, Yuezhang [Wed, 1 Jul 2020 09:15:28 +0000 (09:15 +0000)]
watchdog: imx: Support set timeout by wdt command

After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog
can be started by wdt command. But the imx watchdog driver only
support start with the default timeout.

This commit adds the support for setting the timeout which pass from
the wdt command into the imx watchdog. If the timeout out of the
valid range(0.5~128s), start the watchdog with a timeout within the
valid range and the timeout is the one which closest to the passed
timeout.

Signed-off-by: Yuezhang.Mo <yuezhang.mo@sony.com>
Reviewed-by: Andy.Wu <Andy.Wu@sony.com>
Reviewed-by: stefano Babic <sbabic@denx.de>
4 years agopower: pmic_pca9450: fix PCA9450A I2C address
Sébastien Szymanski [Tue, 30 Jun 2020 13:03:13 +0000 (15:03 +0200)]
power: pmic_pca9450: fix PCA9450A I2C address

Quoting Ye Li from NXP:

    "We have confirmed with PMIC team, 0x35 is used only on early chips
    and not used any more. 0x25 is the final address."

Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
4 years agoARM: mx6: make CAAM usable on the i.MX6 boards
Heinrich Schuchardt [Fri, 26 Jun 2020 17:57:55 +0000 (19:57 +0200)]
ARM: mx6: make CAAM usable on the i.MX6 boards

Even if the HAB fuse is not set we want to be able to use the Cryptographic
Accelerator and Assurance Module (CAAM) for generating random numbers. So
SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set.

arch_misc_init() has to be called to initialize the CAAM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agopico-imx6ul: Fix Quick Start Guide URL
Fabio Estevam [Mon, 22 Jun 2020 00:32:26 +0000 (21:32 -0300)]
pico-imx6ul: Fix Quick Start Guide URL

The current URL for the pico imx6ul board is not valid anymore. Change
to a different URL that works.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agogpio: mxc_gpio: Improve to use ofdata_to_platdata
Ye Li [Wed, 10 Jun 2020 03:29:51 +0000 (20:29 -0700)]
gpio: mxc_gpio: Improve to use ofdata_to_platdata

Current mxc_gpio DM driver allocates the platdata in bind function to
handle both OF_CONTROL enabled case and disabled case. This implementation
puts the devfdt_get_addr in bind, which introduces much overhead especially
in board_f phase.

Change the driver to a common way for handling the cases by using
ofdata_to_platdata and using DM framework to allocate platdata.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
4 years agomisc: scu_api: Add SCFW API to get the index of boot container set
Ye Li [Tue, 9 Jun 2020 10:34:42 +0000 (03:34 -0700)]
misc: scu_api: Add SCFW API to get the index of boot container set

Add SCFW API sc_misc_get_boot_container to get current boot container
set index.
The index value returns 1 for primary container set, 2 for secondary
container set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
4 years agospi: fsl_qspi: Support to use full AHB space on i.MX
Ye Li [Tue, 9 Jun 2020 07:59:06 +0000 (00:59 -0700)]
spi: fsl_qspi: Support to use full AHB space on i.MX

i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.

Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.

When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
4 years agospi: fsl_qspi: Add support for i.MX7ULP
Ye Li [Tue, 9 Jun 2020 07:59:05 +0000 (00:59 -0700)]
spi: fsl_qspi: Add support for i.MX7ULP

Add compatible string and driver data for i.MX7ULP.
Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should
align with 1KB, because the lowest 10 bits are reserved by the
registers definition.
For i.MX7ULP which has only 128Bytes AHB buffer, must align it
when setting the registers and selecting cs.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
4 years agoMerge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Thu, 16 Jul 2020 02:41:43 +0000 (22:41 -0400)]
Merge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

- Correct mmc_spi check condition
- Generate R1/R2/R1b response
- Read SSR for SD SPI

4 years agoMerge branch '2020-07-15-ci-updates'
Tom Rini [Wed, 15 Jul 2020 19:48:05 +0000 (15:48 -0400)]
Merge branch '2020-07-15-ci-updates'

- Make sure GRUB is copied to the right place for CI on GitLab/Azure
- Note in our GitHub PR template that you can use this to trigger Azure CI

4 years agoAzure: copy GRUB to correct build path
Heinrich Schuchardt [Mon, 13 Jul 2020 22:40:19 +0000 (00:40 +0200)]
Azure: copy GRUB to correct build path

The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years ago.gitlab-ci.yml: copy GRUB to correct build path
Heinrich Schuchardt [Mon, 13 Jul 2020 22:23:58 +0000 (00:23 +0200)]
.gitlab-ci.yml: copy GRUB to correct build path

The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agogithub: azure: Update our GitHub template to note for CI
Tom Rini [Fri, 10 Jul 2020 20:00:08 +0000 (16:00 -0400)]
github: azure: Update our GitHub template to note for CI

While the general policy of not taking changes to the project via pull
requests directly on GitHub has not changed, it can be useful to submit
a PR there in order to trigger a CI run on Azure.  These are run
automatically and the results are populated back to GitHub.  Add a note
to the template to reflect this.

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Tue, 14 Jul 2020 13:09:27 +0000 (09:09 -0400)]
Merge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Sync DMA and CPSW DT bindings for K3 devices
- Other minor fixes for mmc and other TI devices

4 years agoarm: imx6q: pcm058: Convert pcm058 to use DM with DTs
Niel Fourie [Tue, 19 May 2020 12:01:43 +0000 (14:01 +0200)]
arm: imx6q: pcm058: Convert pcm058 to use DM with DTs

Convert pcm058 support to use device trees and the driver model.
Add rudimentary boot scripts to the environment, expand README.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
4 years agoarm: imx6q: pcm058: change MAINTAINER
Niel Fourie [Tue, 19 May 2020 12:01:42 +0000 (14:01 +0200)]
arm: imx6q: pcm058: change MAINTAINER

Change the MAINTAINER of pcm058.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
4 years agoarm: dts: imx6q: Add Linux dts files for Phytec Mira
Niel Fourie [Tue, 19 May 2020 12:01:41 +0000 (14:01 +0200)]
arm: dts: imx6q: Add Linux dts files for Phytec Mira

Add Phytec Mira device tree files, for use with pcm058.
>From Linux 5.6, commit 7111951b8d49 upstream

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
4 years agodts-bindings: regulator: Add dlg,da9063-regulator
Niel Fourie [Tue, 19 May 2020 12:01:40 +0000 (14:01 +0200)]
dts-bindings: regulator: Add dlg,da9063-regulator

Add da9063-regulator bindings from Linux 5.6:
commit 7111951b8d49 upstream

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
4 years agommc_spi: generate R1b response for erase and stop transmission command
Pragnesh Patel [Mon, 29 Jun 2020 09:47:29 +0000 (15:17 +0530)]
mmc_spi: generate R1b response for erase and stop transmission command

As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.

R1b = R1 + busy signal

A non-zero value after the R1 response indicates card is ready for
next command.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: Generate R1 response for erase block start and end address
Pragnesh Patel [Mon, 29 Jun 2020 09:47:28 +0000 (15:17 +0530)]
mmc: mmc_spi: Generate R1 response for erase block start and end address

Erase block start address (CMD32) and erase block end address (CMD33)
command will generate R1 response for mmc SPI mode.

R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
for this commands.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: Read R2 response for send status command - CMD13
Pragnesh Patel [Mon, 29 Jun 2020 09:47:27 +0000 (15:17 +0530)]
mmc: mmc_spi: Read R2 response for send status command - CMD13

Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.

R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: read ssr for SD spi
Pragnesh Patel [Mon, 29 Jun 2020 09:47:26 +0000 (15:17 +0530)]
mmc: read ssr for SD spi

The content of ssr is useful only for erase operations.
This saves erase time.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: generate R1 response for different mmc SPI commands
Pragnesh Patel [Mon, 29 Jun 2020 09:47:25 +0000 (15:17 +0530)]
mmc: mmc_spi: generate R1 response for different mmc SPI commands

R1 response is 1 byte long for mmc SPI commands as per the updated
physical layer specification version 7.10.

So correct the resp and resp_size for existing commands

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: correct the while condition
Pragnesh Patel [Mon, 29 Jun 2020 09:47:24 +0000 (15:17 +0530)]
mmc: mmc_spi: correct the while condition

When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agoimx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN
Peng Fan [Fri, 10 Jul 2020 03:24:42 +0000 (11:24 +0800)]
imx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN

Enlarge CONFIG_SYS_BOOTM_LEN when booting FIT image with kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: implement armv8_el2_to_aarch32
Peng Fan [Fri, 10 Jul 2020 03:22:20 +0000 (11:22 +0800)]
imx8m: implement armv8_el2_to_aarch32

Add iMX8M specific armv8_el2_to_aarch32 to let AArch64 mode U-Boot
could boot aarch32 mode linux with FIT image as below:

/dts-v1/;

/ {
        description = "Configuration to load ARM32 Linux";

        images {
                kernel@1 {
                        description = "ARM32 Linux kernel";
                        data = /incbin/("./Image");
                        type = "kernel";
                        arch = "arm";
                        os = "linux";
                        compression = "none";
                        load = <0x40008000>;
                        entry = <0x40008000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
                fdt@1 {
                        description = "Flattened Device Tree blob";
                        data = /incbin/("./imx8mm-evk.dtb");
                        type = "flat_dt";
                        arch = "arm";
                        compression = "none";
                        load = <0x43000000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
        };
        configurations {
                default = "config@1";

                config@1 {
                        description = "fsl-imx8mm-evk";
                        kernel = "kernel@1";
                        fdt = "fdt@1";
                };
        };
};

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: Refactor the OPTEE memory removal
Peng Fan [Thu, 9 Jul 2020 07:26:06 +0000 (15:26 +0800)]
imx8m: Refactor the OPTEE memory removal

Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8m: drop clk settings
Peng Fan [Thu, 9 Jul 2020 07:36:22 +0000 (15:36 +0800)]
clk: imx8m: drop clk settings

We use non-dm code to configure the clk settings in order to simplify
dm clk driver in future, so remove the duplicated code from clk driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: disable nodes before kernel/mfgtool boot for fused part
Peng Fan [Thu, 9 Jul 2020 06:06:49 +0000 (14:06 +0800)]
imx8m: disable nodes before kernel/mfgtool boot for fused part

To fused part, we need to disable nodes of dtb to let kernel boot.

To mfgtool, USB issue when using super-speed for mfgtool, temporally
work around the problem to use high-speed only.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mn/imx8mp: override env_get_offset and env_get_location
Ye Li [Mon, 15 Jul 2019 08:16:46 +0000 (01:16 -0700)]
imx8mn/imx8mp: override env_get_offset and env_get_location

To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: power down fused cores
Peng Fan [Thu, 9 Jul 2020 05:52:41 +0000 (13:52 +0800)]
imx8m: power down fused cores

For non-Quad SoCs, the fused cpu cores could be powered down in SPL
to save power.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mp: Add fused parts support
Ye Li [Tue, 21 Apr 2020 03:12:54 +0000 (20:12 -0700)]
imx8mp: Add fused parts support

iMX8MP has 6 fused parts in each qualification tier, with core, VPU,
ISP, NPU or DSP fused respectively.

The configuration tables for enabled modules:
MIMX8ML8DVNLZAA          Quad Core, VPU, NPU, ISP, DSP
MIMX8ML7DVNLZAA          Quad Core, NPU, ISP
MIMX8ML6DVNLZAA          Quad Core, VPU, ISP
MIMX8ML5DVNLZAA          Quad Core, VPU
MIMX8ML4DVNLZAA          Quad Lite
MIMX8ML3DVNLZAA          Dual Core, VPU, NPU, ISP, DSP

Add the support in U-Boot

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: workaround ROM serror
Peng Fan [Thu, 9 Jul 2020 05:39:26 +0000 (13:39 +0800)]
imx8m: workaround ROM serror

ROM SError happens on two cases:

1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.

2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K of ROM is still protected and cause
SError.

Since ROM mask SError until ATF unmask it, so then ATF always meets the
exception. This patch works around the issue in SPL by enabling SPL
Exception vectors table and the SError exception, take the exception
to eret immediately to clear the SError.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: add eqos clk
Peng Fan [Thu, 9 Jul 2020 05:14:20 +0000 (13:14 +0800)]
imx8m: add eqos clk

Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the
weak function in driver

Add set_clk_eqos to configure eQoS clk

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: add sdhc/nand/ecspi clk api
Peng Fan [Thu, 9 Jul 2020 03:35:15 +0000 (11:35 +0800)]
imx8m: add sdhc/nand/ecspi clk api

Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: configure NoC clk
Peng Fan [Thu, 9 Jul 2020 03:18:50 +0000 (11:18 +0800)]
imx8m: configure NoC clk

Configure NoC clk for better system performance

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: configure arm clk sources from PLL
Peng Fan [Thu, 9 Jul 2020 03:06:24 +0000 (11:06 +0800)]
imx8m: configure arm clk sources from PLL

A53 CCM root max support 1GHz, to support high freq, we need
to switch ARM clk sources from ARM PLL directly.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8mp: Update imx8mp ccf clock driver
Ye Li [Wed, 22 Apr 2020 03:19:24 +0000 (20:19 -0700)]
clk: imx8mp: Update imx8mp ccf clock driver

Add clocks for FEC and flexspi, and add set parent clock callback,
so DTS can assign clocks

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8mm/8mn: Add USB clocks
Ye Li [Sun, 19 Apr 2020 09:22:09 +0000 (02:22 -0700)]
clk: imx8mm/8mn: Add USB clocks

Add USB relevant clocks to support usb clock settings for both
DM USB host and gadget drivers

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: clk-imx8mn: Update clock tree and support set parent
Ye Li [Sat, 18 Apr 2020 15:19:12 +0000 (08:19 -0700)]
clk: clk-imx8mn: Update clock tree and support set parent

Add set clock parent support.
Add ENET and flexspi related clocks to support assigned clocks

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8mm: Add qspi clock
Peng Fan [Sat, 27 Jun 2020 07:49:28 +0000 (15:49 +0800)]
clk: imx8mm: Add qspi clock

Add qspi clock

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8mm: fix clk set parent
Peng Fan [Sat, 27 Jun 2020 07:48:04 +0000 (15:48 +0800)]
clk: imx8mm: fix clk set parent

Fix clk set parent, so we could still have correct clocks after
parent changing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: remove imx sip file
Peng Fan [Mon, 11 May 2020 07:19:53 +0000 (15:19 +0800)]
imx: remove imx sip file

We have switch to use arm_smccc_smc, no need to keep i.MX specific
sip wrapper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: power-domain: use arm_smccc_smc
Peng Fan [Mon, 11 May 2020 07:16:37 +0000 (15:16 +0800)]
imx: power-domain: use arm_smccc_smc

Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: fuse: use arm_smccc_smc
Peng Fan [Mon, 11 May 2020 07:16:07 +0000 (15:16 +0800)]
imx8: fuse: use arm_smccc_smc

Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: bootaux: use arm_smccc_smc
Peng Fan [Mon, 11 May 2020 07:15:21 +0000 (15:15 +0800)]
imx: bootaux: use arm_smccc_smc

Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: soc: use arm_smccc_smc
Peng Fan [Mon, 11 May 2020 07:14:04 +0000 (15:14 +0800)]
imx8m: soc: use arm_smccc_smc

Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: misc: use arm_smccc_smc
Peng Fan [Mon, 11 May 2020 07:13:34 +0000 (15:13 +0800)]
imx8: misc: use arm_smccc_smc

Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agopinctrl: imx5: move soc info to data section
Peng Fan [Sat, 30 May 2020 08:43:20 +0000 (16:43 +0800)]
pinctrl: imx5: move soc info to data section

The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agopinctrl: imx8m: move soc info to data section
Peng Fan [Sat, 30 May 2020 08:39:14 +0000 (16:39 +0800)]
pinctrl: imx8m: move soc info to data section

The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agopinctrl: imx7: move soc info to data section
Peng Fan [Sat, 30 May 2020 08:37:39 +0000 (16:37 +0800)]
pinctrl: imx7: move soc info to data section

The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agodrivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue
Oliver Chen [Tue, 21 Apr 2020 06:48:09 +0000 (14:48 +0800)]
drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue

Add logic to automatically update umctl2's setting based
on phy training CDD value for rank to rank space issue

Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mp: Disables use of MR4 TUF flag (MR4[7]) bit
Jian Li [Thu, 27 Feb 2020 01:40:10 +0000 (09:40 +0800)]
imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit

In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mp: DDR performance tunning
Jian Li [Mon, 20 Jan 2020 07:14:42 +0000 (15:14 +0800)]
imx8mp: DDR performance tunning

1. set SCHED.rdwr_idle_gap=0
2. set SCHED.pageclose=1

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mp: enable rd_port_urgent
Jian Li [Wed, 8 Jan 2020 02:14:16 +0000 (10:14 +0800)]
imx8mp: enable rd_port_urgent

Need to enable read urgent for NoC panic signal

Signed-off-by: Jian Li <jian.li@nxp.com
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agodrivers: ddr: imx8mp: Add inline ECC feature support
Sherry Sun [Mon, 20 Jan 2020 03:13:14 +0000 (11:13 +0800)]
drivers: ddr: imx8mp: Add inline ECC feature support

the DRAM Controller in i.MX8MP will support a feature called "Inline ECC".
This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and
DDR3L). When this feature is enabled by software, the DRAM Controller
reserves 12.5% of DRAM capacity for ECC information, and presents only
the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to
the rest of the SoC.
The DRAM memory can be divided into 8 regions so that if a use case only
requires ECC protection on a subset of memory, then only that subset of
memory need support inline ECC. If this occurs, then there is no
performance penalty accessing the non-ECC-protected memory (no need to
access ECC for this portion of the memory map). This is all configured
with the DRAM Controller.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agodriver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m
Jacky Bai [Mon, 10 Feb 2020 10:02:00 +0000 (18:02 +0800)]
driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m

The 'selfref_en' should be bit'0', so correct the setting to
enable the auto self-refresh.

Reviewed-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agodriver: ddr: imx: skip ddr_ss_gpr config on imx8mn
Jacky Bai [Wed, 5 Jun 2019 03:26:12 +0000 (11:26 +0800)]
driver: ddr: imx: skip ddr_ss_gpr config on imx8mn

There is no DDR_SS_GPR0 exits on i.MX8MN, so skip setting
this register on i.MX8MN.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoMerge tag 'efi-2020-10-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 13 Jul 2020 15:29:51 +0000 (11:29 -0400)]
Merge tag 'efi-2020-10-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (3)

Up to now UEFI variables where stored in U-Boot environment variables.
Saving UEFI variables was not possible without saving the U-Boot
environment variables. With this patch series file ubootefi.var in the
EFI system partition is used for saving UEFI variables. Furthermore the
UEFI variables are exposed for reading at runtime.

Code corrections for UEFI secure boot are provided.

A buffer overrun in the RSA library is fixed.

4 years agoarm: k3: use correct weak function name spl_board_prepare_for_linux
Patrick Delaunay [Tue, 7 Jul 2020 12:25:15 +0000 (14:25 +0200)]
arm: k3: use correct weak function name spl_board_prepare_for_linux

Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agommc: omap_hsmmc: Set 3.3V for IO voltage on all places
Pali Rohár [Fri, 3 Jul 2020 20:58:23 +0000 (22:58 +0200)]
mmc: omap_hsmmc: Set 3.3V for IO voltage on all places

In commit commit d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
was changed 3.0V IO voltage to 3.3V but it was not done on all places in
omap_hsmmc driver. That commit broke eMMC support on Nokia N900.

This patch fixes that problematic commit and changes 3.0V to 3.3V on all
remaining places in omap_hsmmc driver.

Fixes: d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Faiz Abbas <faiz_abbas@ti.com>
4 years agoarm: k3: Consolidate and silence k3_fit_atf.sh call
Jan Kiszka [Wed, 1 Jul 2020 18:09:40 +0000 (20:09 +0200)]
arm: k3: Consolidate and silence k3_fit_atf.sh call

Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose
about what it does. Change that by wrapping the call to k3_fit_atf.sh
into a cmd, also using that chance to reduce duplicate lines of makefile
code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoomap3_beagle: Finish current outstanding DM migrations
Tom Rini [Tue, 30 Jun 2020 19:02:27 +0000 (15:02 -0400)]
omap3_beagle: Finish current outstanding DM migrations

At this point in time we can now remove our legacy code and switch to
enabling DM for USB and Ethernet.

Cc: Derald D. Woods <woods.technical@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
4 years agoARM: da850-evm: Unify config options with Kconfig
Adam Ford [Mon, 29 Jun 2020 23:49:41 +0000 (18:49 -0500)]
ARM: da850-evm: Unify config options with Kconfig

There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.

CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.

This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.

Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoREADME: davinci: Clarify when SPL is used and the target devices.
Adam Ford [Mon, 29 Jun 2020 23:32:02 +0000 (18:32 -0500)]
README: davinci: Clarify when SPL is used and the target devices.

The documentation states that SPL is enabled in all config options
for the da850.  This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)

This also clarifies that SPL isn't only used for booting from SPI,
because it is also used for booting from MMC and NAND for those
devices supporting those boot options.

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoarm: dts: k3-am65: Sync CPSW DT node from kernel
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:56 +0000 (13:36 +0530)]
arm: dts: k3-am65: Sync CPSW DT node from kernel

Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agoarm: dts: k3-j721e: Sync CPSW DT node from kernel
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:55 +0000 (13:36 +0530)]
arm: dts: k3-j721e: Sync CPSW DT node from kernel

Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agonet: ti: am65-cpsw-nuss: Update driver to use kernel DT
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:54 +0000 (13:36 +0530)]
net: ti: am65-cpsw-nuss: Update driver to use kernel DT

Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agonet: ti: am65-cpsw-nuss: Set ALE default thread enable
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:53 +0000 (13:36 +0530)]
net: ti: am65-cpsw-nuss: Set ALE default thread enable

Force default thread to be used for RX as ALE is anyways set to Bypass
mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agonet: ti: am65-cpsw-nuss: Remove dead code
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:52 +0000 (13:36 +0530)]
net: ti: am65-cpsw-nuss: Remove dead code

MDIO node is not referenced further, therefore drop the dead code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agodma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
Vignesh Raghavendra [Mon, 6 Jul 2020 07:56:27 +0000 (13:26 +0530)]
dma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair

We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.

As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agodma: ti: k3-udma: Move RX descriptor ring entries to rflow struct
Vignesh Raghavendra [Mon, 6 Jul 2020 07:56:26 +0000 (13:26 +0530)]
dma: ti: k3-udma: Move RX descriptor ring entries to rflow struct

In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agodma: ti: k3-udma: Introduce udma_chan_config struct
Vignesh Raghavendra [Mon, 6 Jul 2020 07:56:25 +0000 (13:26 +0530)]
dma: ti: k3-udma: Introduce udma_chan_config struct

Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agosoc: ti: k3-ringacc: Separate soc specific initialization
Vignesh Raghavendra [Mon, 6 Jul 2020 07:56:24 +0000 (13:26 +0530)]
soc: ti: k3-ringacc: Separate soc specific initialization

In preparation of adding more K3 SoCs, separate soc specific
initialization add a SoC specific initialization hook.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agosoc: ti: k3-ringacc: Add an API to request pair of rings
Vignesh Raghavendra [Mon, 6 Jul 2020 07:56:23 +0000 (13:26 +0530)]
soc: ti: k3-ringacc: Add an API to request pair of rings

Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most case Rings are used with DMA channels which required
to request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agosoc: ti: k3-ringacc: Move state tracking variables under a struct
Vignesh Raghavendra [Mon, 6 Jul 2020 07:56:22 +0000 (13:26 +0530)]
soc: ti: k3-ringacc: Move state tracking variables under a struct

Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agoarm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Vignesh Raghavendra [Tue, 7 Jul 2020 08:13:35 +0000 (13:43 +0530)]
arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT

Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
4 years agodma: ti: k3-udma: Update driver to use static endpoint Data
Vignesh Raghavendra [Tue, 7 Jul 2020 08:13:34 +0000 (13:43 +0530)]
dma: ti: k3-udma: Update driver to use static endpoint Data

Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.

Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible with updated driver.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
4 years agodma: ti: Add static PSIL endpoint information
Vignesh Raghavendra [Tue, 7 Jul 2020 08:13:33 +0000 (13:43 +0530)]
dma: ti: Add static PSIL endpoint information

Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.

Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
4 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Sat, 11 Jul 2020 21:40:00 +0000 (17:40 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- Enable DM_SPI on siemens omap boards (Jagan)
- Dropped some non-dm supported omap3 boards (Jagan)
- Dropped non-dm code in omap3 spi driver (Jagan)
- Dropped non-dm code in kirkwood spi driver (Bhargav)