Andre Przywara [Wed, 15 Mar 2017 01:19:07 +0000 (01:19 +0000)]
configs: move CMD_MD5SUM definition to defconfigs
Boards with an apparent need for the md5sum command had the connected
config symbol defined in their board header file.
Move this over to the respective defconfig files now that md5sum is
configured via Kconfig.
(This is a manual effort, which differs from moveconfig.py, not sure
who is right here. Boards except sandbox loose the md5sum command with
moveconfig.py, though it was explicitly mentioned in their config.h's)
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: migrate stih410-b2260] Signed-off-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Wed, 15 Mar 2017 01:19:06 +0000 (01:19 +0000)]
Kconfig: define MD5 dependency for FIT support
FIT images require MD5 support to verify image checksums. So far this
was expressed by defining a CPP symbol in image.h. Since MD5 is now a
first class Kconfig citizen, express that in Kconfig instead.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Wed, 15 Mar 2017 01:19:05 +0000 (01:19 +0000)]
Kconfig: introduce md5sum command selection
So far CONFIG_MD5SUM would need to be set by a board's include file.
Since the command is really generic, move it over to Kconfig to allow
it to be defined by either a board's defconfig, menuconfig or some
config snippet merged via mergeconfig.sh.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Wed, 15 Mar 2017 01:19:04 +0000 (01:19 +0000)]
kirkwood: remove get_random_hex() and MD5 dependency
Commit 19a5944fcd62 ("mvgbe: remove setting of ethaddr within the
driver") removed the usage of get_random_hex() from the mvgbe driver
about six years ago. However the prototype of that function survived
till today in some kirkwood header file.
Remove that prototype and the CONFIG_MD5 dependency triggered by that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
Masahiro Yamada [Thu, 9 Mar 2017 07:28:25 +0000 (16:28 +0900)]
arm64: booti: allow to place kernel image anywhere in physical memory
At first, the ARM64 Linux booting requirement recommended that the
kernel image be placed text_offset bytes from 2MB aligned base near
the start of usable system RAM because memory below that base address
was unusable at that time.
This requirement was relaxed by Linux commit a7f8de168ace ("arm64:
allow kernel Image to be loaded anywhere in physical memory").
Since then, the bit 3 of the flags field indicates the tolerance
of the kernel physical placement. If this bit is set, the 2MB
aligned base may be anywhere in physical memory. For details, see
Documentation/arm64/booting.txt of Linux.
The booti command should be also relaxed. If the bit 3 is set,
images->ep is respected, and the image is placed at the nearest
bootable location. Otherwise, it is relocated to the start of the
system RAM to keep the original behavior.
Another wrinkle we need to take care of is the unknown endianness of
text_offset for a kernel older than commit a2c1d73b94ed (i.e. v3.16).
We can detect this based on the image_size field. If the field is
zero, just use a fixed offset 0x80000.
Masahiro Yamada [Mon, 13 Mar 2017 08:43:16 +0000 (17:43 +0900)]
tools: fix cross-compiling tools when HOSTCC is overridden
Richard reported U-Boot tools issues in OpenEmbedded/Yocto project.
OE needs to be able to change the default compiler. If we pass in
HOSTCC through the make command, it overwrites all HOSTCC instances,
including ones in tools/Makefile and tools/env/Makefile, which breaks
"make cross_tools" and "make env", respectively.
Add "override" directives to avoid overriding HOSTCC instances that
really need to point to the cross-compiler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Richard Purdie <richard.purdie@linuxfoundation.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Ladislav Michl [Sat, 18 Feb 2017 23:24:49 +0000 (00:24 +0100)]
igep00x0: fixup FDT according to detected flash type
Leave only detected flash type enabled in FTD as otherwise GPMC CS is
claimed (and never freed) by Linux, causing 'concurent' flash type
not to be probed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Ladislav Michl [Sat, 18 Feb 2017 23:23:39 +0000 (00:23 +0100)]
igep00x0: disable environment
ISEE's U-Boot and Linux are using 1bit ECC scheme, while we
switched to 8bit ECC to fullfill flash specification requirements.
However when trying to run U-Boot on board with 1bit ECC'd data
on flash, UBI code takes several minutes to pass scan as reading
of every block ends with ecc error (which is also printed on
console).
So, until proper solution is developed, disable environment
alltogether.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:12 +0000 (13:37 +0100)]
board: Add STMicroelectronics STiH410-B2260 support
This is a 96Board compliant board based on STiH410 SoC:
- 1GB DDR
- On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
- Ethernet 1000-BaseT
- SATA
- HDMI
- 2 x USB2.0 type A
- 1 x USB2.0 type micro-AB
- SD card slot
- High speed connector (SD/I2C/USB interfaces)
- Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:09 +0000 (13:37 +0100)]
STiH410: Add STi SDHCI driver
Add SDHCI host controller found on STMicroelectronics SoCs
On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.
This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.
W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.
Patrice Chotard [Tue, 21 Feb 2017 12:37:07 +0000 (13:37 +0100)]
STiH410: Add STi serial driver
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Phil Edworthy [Fri, 17 Feb 2017 08:22:17 +0000 (08:22 +0000)]
armv7m: Add SysTick timer driver
The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.
The number of reference clock ticks that correspond to 10ms is normally
defined in the SysTick Calibration register's TENMS field. However, on some
devices this is wrong, so this driver allows the clock rate to be defined
using CONFIG_SYS_HZ_CLOCK.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Lokesh Vutla [Wed, 15 Feb 2017 13:12:54 +0000 (18:42 +0530)]
tools: omapimage: Fix size in header
The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage generates a gp header
only with size of the image as size field. Fix it
arm: omap3: Bring back ARM errata workaround 725233
The workaround for ARM errata 725233 had been lost since
commit 45bf05854bc94e (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
arm: omap3: Compile clock.c with -marm option to unbreak OMAP3530
Boards with OMAP3530 SoC fail to boot since commit bd2c4522c26d5
("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)")
because it enabled the use of Thumb2 for the SPL.
Experiments have shown that the deadlock happens in the
prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'.
This patch enforces the compilation of clock.c source file in
ARM mode and makes the deadlock disappear. We are yet to figure
out the root cause of the problem. Still this is somewhat
better than having non-bootable boards for years.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Vinitha Pillai [Wed, 1 Feb 2017 12:58:53 +0000 (18:28 +0530)]
LS1021ATWR: Modify u-boot size for sd secure boot
Raw uboot image is used in place of FIT image in secure boot.
The maximum allocated size of raw u-boot bin is 1MB in memory map.
Hence , CONFIG_SYS_MONITOR_LEN has been modified to 1 MB.
The bootscript (BS_ADDR) and its header (BS_HDR_ADDR) offset on
MMC have also been modified to accommodate the increase in uboot size.
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 19 Jan 2017 05:42:27 +0000 (11:12 +0530)]
armv8: fsl-lsch3: Update VID support
VID support in NXP layerscape Chassis-3 (lsch3) compilant SoCs like
LS2088A, LS2080A differs from existing logic.
-VDD voltage array is different
-Registers are different
-VDD calculation logic is different
Add new function adjust_vdd() for LSCH3 compliant SoCs
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Arpit Goel <arpit.goel@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Tang Yuantian [Tue, 7 Feb 2017 06:18:59 +0000 (14:18 +0800)]
armv8: fsl-lsch2: add workaround for erratum A-010635
Read DMA operations causes CRC error on armv8 chassis 2 platforms
due to the erratum A-010635.
In order to support sata on these platforms, ECC needs to be disabled.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Mon, 6 Mar 2017 17:02:34 +0000 (09:02 -0800)]
armv8: layerscape: Update early MMU for DDR after initialization
In early MMU table, DDR has to be mapped as device memory to avoid
speculative access. After DDR is initialized, it needs to be updated
to normal memory to allow code execution. To simplify the code,
dram_init() is moved into a common file as a weak function.
York Sun [Mon, 6 Mar 2017 17:02:33 +0000 (09:02 -0800)]
armv8: mmu: Add a function to change mapping attributes
Function mmu_change_region_attr() is added to change existing mapping
with updated PXN, UXN and memory type. This is a break-before-make
process during which the mapping becomes fault (invalid) before final
attributres are set.
York Sun [Mon, 6 Mar 2017 17:02:32 +0000 (09:02 -0800)]
armv8: ls2080a: Drop early MMU for SPL build
Early MMU improves performance especially on emulators. However, the
early MMU is left enabled after the first stage of SPL boot. Instead
of flushing D-cache and dealing with re-enabling MMU for the second
stage U-Boot, disabling it for SPL build simplifies the process. The
performance penalty is unnoticeable on the real hardware. As of now,
SPL boot is not supported by existing emulators. So this should have
no impact on emulators.
York Sun [Mon, 6 Mar 2017 17:02:31 +0000 (09:02 -0800)]
armv8: layerscape: Fix the sequence of changing MMU table
This patch follows the break-before-make process when making changes
to MMU table. MMU is disabled before changing TTBR to avoid any
potential race condition.
York Sun [Mon, 6 Mar 2017 17:02:29 +0000 (09:02 -0800)]
driver: net: fsl-mc: Update calculation of MC RAM
Since the reserved RAM is tracked by gd->arch.resv_ram, calculation
of MC memory blocks can be simplified. The MC RAM is guaranteed to be
aligned by the reservation process.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
York Sun [Mon, 6 Mar 2017 17:02:28 +0000 (09:02 -0800)]
armv8: layerscape: Rewrite memory reservation
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure memory is
carved out first. DDR bank size is reduced. Reserved memory is then
allocated on the top of available memory. U-Boot still has access
to reserved memory as data transferring is needed. Device tree is
fixed with reduced memory size to hide the reserved memory from OS.
The same region is reserved for efi_loader.
Masahiro Yamada [Mon, 6 Mar 2017 20:28:25 +0000 (05:28 +0900)]
ARM: uniphier: set DRAM_SPARSE flag for LD21 boards
Commit 04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from
board parameters") accidentally unset the DRAM_SPARSE flag, and
changed the physical map of the DRAM channels. Revive the original
behavior.
Fixes: 04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from board parameters") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Shunji Sato <sato.shunji@socionext.com>
arm: omap-common: Fix typo in CONFIG_OMAP54XX guard
Some initialization was unintentionally being skipped on omap5.
Fixes: f5af0827f276 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX") Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Ladislav Michl [Mon, 6 Mar 2017 12:54:30 +0000 (13:54 +0100)]
arm: OMAP2+: nandecc: propagate error to command return status
Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 7 Mar 2017 12:13:42 +0000 (07:13 -0500)]
ARM: Migrate errata to Kconfig
This moves all of the current ARM errata from various header files and in to
Kconfig. This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config. We now just select these once at the higher level in Kconfig
Tom Rini [Fri, 3 Mar 2017 20:33:30 +0000 (15:33 -0500)]
am335x_evm: Switch to using imply keyword
These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.
Tom Rini [Fri, 3 Mar 2017 20:33:29 +0000 (15:33 -0500)]
kconfiglib.py: Kludge in 'imply' support
Currently upstream does not yet understand the imply keyword. For what
we use kconfiglib.py for today, this is OK. We only need to be able to
evaluate in order to make boards.cfg and none of those choices will
depend on how imply evaluates out.
Ryan Harkin [Thu, 2 Mar 2017 17:45:16 +0000 (17:45 +0000)]
do_smhload: fix return code
do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.
Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Mon, 27 Feb 2017 06:24:45 +0000 (15:24 +0900)]
kbuild: turn of dtc unit address warnings by default
DTC 1.4.2 or later checks DT unit-address without reg property and
vice-versa, and generates lots of warnings. Fixing DT files will
take for a while. Until then, let's turn off the check unless
building with W=*.
Introduce a new helper dtc-option to check if the option is supported
in order to suppress warnings on older versions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Adam Ford [Wed, 8 Mar 2017 03:27:52 +0000 (21:27 -0600)]
omap3_logic: Move SPL Stack into SDRAM
A previous patch broke the board. This patch will add missing part
from the previous patch and also move the SPL Stack into SDRAM at
0x82000000.
Tested with GCC 4.8.2 and GCC 6.2
Fixes: 0959649dc6d9 ("omap3_logic: Switch to simple malloco in SPL") Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
- Keep CONFIG_SPL_SYS_MALLOC_SIMPLE
- Add CONFIG_SYS_MALLOC_F_LEN=0x2000 (8 MB)
Andre Przywara [Mon, 6 Mar 2017 01:13:38 +0000 (01:13 +0000)]
video: cfb_console: fix 32-bit display on 64-bit architectures
"unsigned long" is a lousy data type when it comes to match peripheral
hardware registers with a fixed size.
Just do the obvious and match a 32-bit display format with an "u32"
data type for casting.
This fixes the logo display on 64-bit architectures, which produced
a black line on the right side of the logo with non-black backgrounds.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Nathan Rossi [Sun, 5 Mar 2017 14:36:23 +0000 (00:36 +1000)]
net: zynq_gem: Fix masking of supported phydev features
When the zynq_gem driver initializes the phy it sets the supported
features that the phy can support and advertise. However instead of
masking the supported features such that it limits the available
features it sets the phy to have the exact supported features of the
zynq_gem. This is problematic as it will enable features that a phy does
not have or cannot advertise.
Specifically this appears as an issue when using a phy that is only
capable of 10/100, but the zynq_gem driver will override this and try to
enable and advertise 10/100/1000.
Reported-by: Arno Steffens <star@gmx.li> Fixes: 80243528ef ("net: gem: Fix gem driver on 1Gbps LAN") Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Tested-by: Arno Steffens <star@gmx.li> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Wenyou Yang [Tue, 14 Feb 2017 08:24:40 +0000 (16:24 +0800)]
net: macb: Fix ETH not found when clock not support
For the boards such as smartweb on which the clock driver isn't
supported, the ethernet fail to be found when booting up with
the below log.
---8<---
Net: No ethernet found.
--->8---
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Philipp Tomsich [Wed, 1 Mar 2017 20:04:15 +0000 (21:04 +0100)]
armv8: spl: Call spl_relocate_stack_gd for ARMv8
As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Mon, 27 Feb 2017 19:19:07 +0000 (20:19 +0100)]
armv5te: make 'ret lr' produce iinterworking 'bx lr'
Current ARM assembler helper for the 'return to caller' pseudo-instruction
turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain
in its current ARM state even when the routine doing the 'ret' was called
from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1
instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus
correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Andrew F. Davis [Wed, 22 Feb 2017 23:46:39 +0000 (17:46 -0600)]
arm: mach-omap2: Flush cache after FIT post-processing image
After we authenticate/decrypt an image we need to flush the caches
as they may still contain bits of the encrypted image. This will
cause failures if we attempt to jump to this image.
Reported-by: Yogesh Siraswar<yogeshs@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Jonathan Golder [Fri, 24 Feb 2017 16:46:10 +0000 (17:46 +0100)]
splash: Prevent splash_load_fs from writing to 0x0
Passing NULL to fs_read() for actread value results in hanging U-Boot
at least on our ARM plattform (TI AM335x). Since fs_read() and
following functions do not catch nullpointers, writing to 0x0 occurs.
Passing a local dummy var instead of NULL solves this issue.
Signed-off-by: Jonathan Golder <jonathan.golder@kurz-elektronik.de> Cc: Anatolij Gustschin <agust@denx.de>
Tom Rini [Sun, 26 Feb 2017 20:23:18 +0000 (15:23 -0500)]
travis-ci: Temporarily disable using a newer device tree compiler
For a long while dtc has warned about various constructs. This is now
leading to log file size being exceeded in travis, and as the majority
of these errors need to be fixed in the kernel, switch to using the
stock device-tree-compiler package.
Felipe Balbi [Wed, 22 Feb 2017 09:22:37 +0000 (11:22 +0200)]
usb: gadget: g_dnl: fix g_dnl_set_serialnumber()
instead of only copying if strlen(s) is less than 32 characters, let's
just copy at most 31 characters regardless of the size of
serial#. This will guarantee that we always have a serial number if
serial# environment variable is set to anything.
Note that without a proper serial number, USB Command Verifier fails
our test of Device Descriptor since we will claim to have a serial
number without really providing one when requested.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Felipe Balbi [Fri, 10 Feb 2017 16:32:31 +0000 (19:32 +0300)]
usb: gadget: f_dfu: write req->actual bytes
If last packet is short, we shouldn't write req->length bytes to
non-volatile media, we should write only what's available to us, which
is held in req->actual.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Patrick Delaunay [Fri, 16 Dec 2016 17:41:31 +0000 (18:41 +0100)]
usb: gadget: dfu: correct size for USB_REQ_DFU_GETSTATE result
return the correct size for DFU_GETSTATE result (1 byte in DFU 1.1 spec)
to avoid issue in USB protocol and the variable "value" is propagated
to req->lenght as all the in the other request with answer
- DFU_GETSTATUS
- DFU_DNLOAD
- DFU_UPLOAD
Then the buffer is correctly treated in USB driver
NB: it was the only request witch directly change "req->actual"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
usb: gadget: dfu: add functional descriptor in descriptor set
The "DFU descriptor set" must contain the "DFU functional descriptor"
but it is missing today in U-Boot code
(cf: DFU spec 1.1, chapter 4.2 DFU Mode Descriptor Set)
This patch only allocate buffer and copy DFU functional descriptor
after interfaces.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Masahiro Yamada [Mon, 20 Feb 2017 09:34:20 +0000 (18:34 +0900)]
ARM: uniphier: add simple eMMC load APIs instead of ROM API
Re-use of routines embedded in the Boot ROM requires a function
pointer table for each SoC. This is not nice in terms of the
maintainability in a long run.
Implement simple eMMC load APIs that are commonly used for LD11,
LD20, and hopefully future SoCs.
Masahiro Yamada [Fri, 17 Feb 2017 07:17:22 +0000 (16:17 +0900)]
ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20
For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.
Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now. This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.
Kotaro Hayashi [Tue, 14 Feb 2017 02:39:14 +0000 (11:39 +0900)]
ARM: uniphier: add DRAM PHY clock duty adjustment for LD20 SoC
If the DRAM clock duty does not meet the allowable tolerance,
it is marked in an efuse register. If the register is fused,
the boot code should compensate for the DRAM clock duty error.
projects / u-boot.git / log