Robert Marko [Wed, 5 Jan 2022 15:01:00 +0000 (16:01 +0100)]
mtd: nand: pxa3xx: set mtd->dev
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.
So simply set the mtd->dev to the driver udevice.
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Mon, 17 Jan 2022 16:24:43 +0000 (11:24 -0500)]
Merge branch '2022-01-15-TI-platform-updates'
- Let am335x_evm use the CPSW or PRUSS ethernet.
- Implement timer_get_boot_us in the omap timer driver
- gpmc bitflip, QSPI clock calculation on am437x, da8xx_gpio bugfixes
- Assorted K3 updates
Tom Rini [Mon, 17 Jan 2022 13:36:12 +0000 (08:36 -0500)]
Merge tag 'u-boot-at91-2022.04-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.04 cycle:
This small feature set includes few changes for sama7g5 and sama7g5ek:
turn blue led on at boot, changes required for the Rev4 of the board,
better sync with the Linux DT with regards to the new DT nodes.
CONFIG_PHANDLE_CHECK_SEQ will allow different sequence number for nodes
that have the same name, but they are different.
In sama7g5ek case, there are multiple 'i2c@600' nodes which are child
nodes of different parent 'flexcom' nodes.
These are different i2c busses even if the node is the same, and have to be
differentiated.
Without this config, the sequence number 0 is reused for two i2c busses, and
this is something that we have to avoid:
Looking for 'i2c' at 4704, name i2c@600
- serial0, /ahb/apb/serial@e1824200
- i2c0, /ahb/apb/flexcom@e181c000/i2c@600
Found seq 0
i2c_post_bind: i2c@600, seq=0
Looking for 'i2c' at 6236, name i2c@600
- serial0, /ahb/apb/serial@e1824200
- i2c0, /ahb/apb/flexcom@e181c000/i2c@600
Found seq 0
i2c_post_bind: i2c@600, seq=0
After this patch:
Looking for 'i2c' at 4704, name i2c@600
- serial0, /ahb/apb/serial@e1824200
- i2c0, /ahb/apb/flexcom@e181c000/i2c@600
- i2c1, /ahb/apb/flexcom@e2818000/i2c@600
Found seq 1
Before the patch:
=> i2c bus
Bus 0: i2c@600
Bus 0: i2c@600 (active 0)
52: eeprom@52, offset len 1, flags 0
53: eeprom@53, offset len 1, flags 0
=>
After the patch:
=> i2c bus
Bus 0: i2c@600
Bus 1: i2c@600 (active 1)
52: eeprom@52, offset len 1, flags 0
53: eeprom@53, offset len 1, flags 0
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 4 Jan 2022 16:23:36 +0000 (18:23 +0200)]
ARM: dts: at91: sama7g5ek: move eeproms to flexcom8
The rev4 of the board sama7g5ek has the eeproms on flexcom8 instead of
flexcom1.
Initialize flexcom8 with required pincontrol and move the eeproms accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 4 Jan 2022 16:21:54 +0000 (18:21 +0200)]
ARM: dts: at91: sama7g5: add flx8 and required nodes
Add Flexcom8 node with required referenced nodes as phandles.
Since Flexcom8 is present in Linux, take the node exactly as-is from Linux.
Some nodes are referenced in Linux as phandles, the dma and the gic.
Add them as well to the file, even if they are unused by Uboot.
This is a step towards having the U-boot DT equivalent with the DT in Linux.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Mark Kettenis [Mon, 10 Jan 2022 19:58:42 +0000 (20:58 +0100)]
arm: dts: apple: Update Apple M1 device trees
This synchronizes the device trees with those that are in the
process of being upstreamed into Linux. This is mostly the
current state of the device trees on the asahilinux branch
with a few extra bits used by OpenBSD. This includes device
trees for machines that were still missing.
There are still some differences that will hopefully be resolved
soon.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
board: ti: am335x: Choose CPSW or PRUSS configuration based on jumper setting
The am335x-ice-v2 board's Ethernet ports can be configured
in 'MII' or 'RMII' mode to be connected to 'PRUSS' or 'CPSW'
Ethernet subsystems.
This patch sets the environment variable 'ice_mii' to
'mii' or 'rmii' accordingly. Based on that we choose the
appropriate board devicetree i.e. 'am335x-ice-v2.dtb' or
'am335x-ice-v2-prueth.dtb'.
Since there are 2 Ethernet ports with 2 modes, there can be 4
configurations but for now we consider both ports in different modes
to be an invalid configuration and prevent boot in that case.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[Amjad: use overlay instead of using new am335x-ice-v2-prueth.dtb] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Make prueth_is_mii be marked __maybe_unused] Signed-off-by: Tom Rini <trini@konsulko.com>
David Rivshin [Thu, 18 Nov 2021 18:25:24 +0000 (13:25 -0500)]
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine
In the case of an erased (sub)page both the data and ECC are all 0xFF
bytes. This fails the normal ECC verification, as the computed ECC of
all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect
erased pages by checking that the ECC bytes are all-0xFF, but this had
two problems:
1) bitflips in the data were not corrected, so the data looked not-erased
2) bitflips in the ECC bytes were reported as uncorrectable ECC errors
The equivalent Linux driver [1] correctly handles this by counting the
number of 0-bits in the combination of data and ECC bytes. If the number
of 0-bits is less than the amount of bits correctable by the selected
ECC algorithm, then it is treated as an erased page with correctable
bitflips.
Implement similar, though simplified, logic in omap_correct_data_bch().
[1] see omap_elm_correct_data() in omap2.c
Signed-off-by: David Rivshin <drivshin@allworx.com>
Stefan Mätje [Tue, 30 Nov 2021 00:06:56 +0000 (01:06 +0100)]
Fix wrong QSPI clock calculation for AM4372
On AM4372 the SPI_GCLK input gets its clock from the PRCM module which
divides the PER_CLKOUTM2 frequency (192MHz) by a fixed factor of 4.
See AM437x Reference Manual in section 27 QSPI >> 27.2 Integration.
The QSPI_FCLK therefore needs to take this factor into account and
becomes (192000000 / 4).
Signed-off-by: Stefan Mätje <stefan.maetje@esd.eu>
The fastboot protocol uses per default the UDP port 5554. In some cases
it might be needed to change the used port. The fastboot utility provides
a way to specifiy an other port number to use already.
Markus Koch [Tue, 11 Jan 2022 18:22:54 +0000 (19:22 +0100)]
net: fsl: Fix busy flag polling register
NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG/STAT
register to wait until a transaction has finished, not bit 31 in the
data register.
In the Linux kernel, this has already been fixed in commit 26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").
This patch changes the register in the fman_mdio and fsl_ls_mdio
drivers.
As the MDIO_DATA_BSY define is no longer in use, this patch also removes
its definition from the fsl_memac header.
Signed-off-by: Markus Koch <markus@notsyncing.net> Reviewed-by: Camelia Groza <camelia.groza@nxp.com>
Marek Vasut [Sat, 1 Jan 2022 19:12:23 +0000 (20:12 +0100)]
net: eth-phy: Demote missing phy-handle log message to debug
Reduce the missing phy-handle log message to debug message. It is
possible for ethernet DT node to have no phy-handle e.g. in case
of a fixed-link connection. Furthermore, drop the FEC: prefix,
which is a copy-paste error and rather print the ethernet device
name.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Sat, 4 Dec 2021 23:00:35 +0000 (01:00 +0200)]
net: dsa: sja1105: fix device id detection
The sja1105_check_device_id() function contains logic to work without
changing the device tree on reworked boards, one of which I have (the
NXP LS1021A-TSN normally has a SJA1105T, but I have a version with a
resoldered SJA1105Q which is pin compatible). This logic is taken from
the Linux driver.
However this logic gets shortcircuited in U-Boot by an earlier check for
the exact device ID specified in the device tree. So the reworked board
does not probe the SJA1105Q switch. Remove this duplicated logic and let
the automatic device ID detection do its job.
Fixes: f24b666b2204 ("net: dsa: add driver for NXP SJA1105 L2 switch") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Sat, 4 Dec 2021 23:00:34 +0000 (01:00 +0200)]
net: dsa: fix phydev->speed being uninitialized for the CPU port fixed PHY
If the DSA API is going to allow drivers to do things such as:
- phy_config in dsa_ops :: port_probe
- phy_startup in dsa_ops :: port_enable
then it would actually be good if the ->port_probe() method would
actually be called in all cases before the ->port_enable() is.
Currently this is true for user ports, but not true for the CPU port,
because the CPU port does not have a udevice registered for it (this is
all part of DSA's design). So the current issue is that after
phy_startup has finished for the CPU port, its phydev->speed is an
uninitialized value, because phy_config() was never called for the
priv->cpu_port_fixed_phy, and it is precisely phy_config() who copies
the speed into the phydev in the case of the fixed PHY driver.
So we need to simulate a probing event for the CPU port by manually
calling the driver's ->port_probe() method for the CPU port.
Fixes: 8a2982574854 ("net: dsa: introduce a .port_probe() method in struct dsa_ops") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
cmd: pxe_utils: sysboot: add label override support
This will allow consumers to choose a pxe label at runtime instead of
having to prompt the user. One good use-case for this, is choosing
whether or not to apply a dtbo depending on the hardware configuration.
e.g: for TI's AM335x EVM, it would be convenient to apply a particular
dtbo only when the J9 jumper is on PRUSS mode. To achieve this, the
pxe menu should have 2 labels, one with the dtbo and the other without,
then the "pxe_label_override" env variable should point to the label with
the dtbo at runtime only when the jumper is on PRUSS mode.
This change can be used for different use-cases and bring more
flexibilty to consumers who use sysboot/pxe_utils.
if "pxe_label_override" is set but does not exist in the pxe menu,
the code should fallback to the default label if given, and no failure
is returned but rather a warning message.
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Artem Lapkin <email2tema@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Call dram_init_banksize() from spl_board_init() otherwise TFTP download
fails due to lmb_get_free_size() not able to find unreserved region due
to lack of DRAM size info. Required to support Ethernet boot on AM64x.
net: ti: am65-cpsw: Add support for multi port independent MAC mode
On certain TI SoC, like AM64x there is a CPSW3G which supports 2
external independent MAC ports for single CPSW instance.
It is not possible for Ethernet driver to register more than one port
for given instance.
This patch modifies top level CPSW NUSS as UCLASS_MISC and binds
UCLASS_ETH to individual ports so as to support bring up more than one
Ethernet interface in U-Boot.
Note that there is no isolation in the since, CPSW NUSS is in promisc
mode and forwards all packets to host.
Since top level driver is now UCLASS_MISC, board files would need to
instantiate this driver explicitly.
Probe toplevel AM65 CPSW NUSS driver from misc_init_r() when driver
is enabled. Since driver is modeled as UCLASS_MISC, we need to
explicitly probe the driver. Use common misc_init_r() that entire
K3 family of SoCs.
dma: ti: k3-udma: Fix rflow reservation for PKTDMA
Driver has a bug in that it uses rflow_in_use bitmap when setting up free rflow range
from TISCI but use rflow_map for reservation in __udma_reserve_rflow()
Fix this by dropping rflow_in_use bitmap array and use rflow_map for
PKTDMA. BCDMA does not need rflow_in_use either.
This fixes CPSW3g not able to get DMA channels at R5 SPL on AM64x
ARM: mach-k3: sysfw-loader: Copy sysfw.itb to OCRAM in OSPI/SPI bootmode
In case of xSPI bootmode OSPI flash is in DDR mode and needs to be accessed
in multiple of 16bit accesses Hence we cannot parse sysfw.itb FIT image
directly on OSPI flash via MMIO window. So, copy the image to internal
on-chip RAM before parsing the image.
Moreover, board cfg data maybe modified by ROM/TIFS in case of HS platform
and thus cannot reside in OSPI/xSPI and needs to be copied over to
internal OCRAM.
Michael Liebert [Wed, 15 Dec 2021 15:14:28 +0000 (16:14 +0100)]
arm: mach-k3: am642_init: Unlock MCU PADCFG regs
Currently only the PADCFG registers of the main domain are unlocked.
Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured by u-boot or Linux.
Signed-off-by: Michael Liebert <liebert@ibv-augsburg.de> Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Nishanth Menon <nm@ti.com>
Tom Rini [Sat, 15 Jan 2022 12:39:09 +0000 (07:39 -0500)]
Merge tag 'efi-2022-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc1
Documentation:
* Fix building HTML documentation of readthedocs.io
* Add ARM Juno board documentation
* Build requirements for Alpine Linux
* Include DM headers in API documentation
UEFI:
* Fix section alignment of EFI binaries
* Fix header length of RISC-V EFI binaries allowing to run them on EDK II
* Remove kaslr-seed from device tree if the EFI_RNG_PROTOCOL is provided
Tom Rini [Sat, 15 Jan 2022 12:34:46 +0000 (07:34 -0500)]
Merge branch '2022-01-14-assorted-fixes'
- A number of fixes in various subsystems. This includes having the phy
uclass track power-on and init counts as this should resolve some
tricky functional problems on a number of platforms.
Simon Glass [Tue, 4 Jan 2022 10:51:13 +0000 (03:51 -0700)]
x86: efi: Tweak the code used for the 64-bit EFI app
Add an empty CPU init function to avoid fiddling with low-level CPU
features in the app. Set up the C runtime correctly for 64-bit use
and avoid clearing BSS, since this is done by EFI when U-Boot is loaded.
Simon Glass [Tue, 4 Jan 2022 10:51:11 +0000 (03:51 -0700)]
x86: efi: Update efi_get_next_mem_desc() to avoid needing a map
At present this function requires a pointer to struct efi_entry_memmap
but the only field used in there is the desc_size. We want to be able
to use it from the app, so update it to use desc_size directly.
Simon Glass [Tue, 4 Jan 2022 10:51:10 +0000 (03:51 -0700)]
efi: Move exit_boot_services into a function
At present this code is inline in the app and stub. But they do the same
thing. The difference is that the stub does it immediately and the app
doesn't want to do it until the end (when it boots a kernel) or not at
all, if returning to UEFI.
Move it into a function so it can be called as needed.
Add a comment showing how to store the memory map so that it can be
accessed within the app if needed, for debugging purposes only. The map
can change without notice.
efidebug: avoid 'dfu_alt_info not defined' message
If variable dfu_alt_info is not defined duplicate messages are displayed.
=> efidebug boot dump
Scanning disk mmc2.blk...
Scanning disk mmc1.blk...
Scanning disk mmc0.blk...
Found 3 disks
No EFI system partition
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
Remove the 'Probably dfu_alt_info not defined' message.
Instead write a warning if the variable contains no entities.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
efi_loader: Get rid of kaslr-seed if EFI_RNG_PROTOCOL is installed
U-Boot, in some occasions, injects a 'kaslr-seed' property on the /chosen
node. That would be problematic in case we want to measure the DTB we
install in the configuration table, since it would change across reboots.
The Linux kernel EFI-stub completely ignores it and only relies on
EFI_RNG_PROTOCOL for it's own randomness needs (i.e the randomization
of the physical placement of the kernel). In fact it (blindly) overwrites
the existing seed if the protocol is installed. However it still uses it
for randomizing it's virtual placement.
So let's get rid of it in the presence of the RNG protocol.
It's worth noting that TPMs also provide an RNG. So if we tweak our
EFI_RNG_PROTOCOL slightly and install the protocol when a TPM device
is present the 'kaslr-seed' property will always be removed, allowing
us to reliably measure our DTB.
The alignment of sections in the EFI binaries generated by U-Boot is
incorrect.
According to the PE-COFF specification [1] the minimum value for
FileAlignment is 512. If the value of SectionAlignment is
less then the page size, it must equal FileAlignment.
Let's set both values to 512 for the ARM and RISC-V architectures.
EDK II refuses to load the EFI binaries created by U-Boot.
The reason is an incorrect PE-COFF header. The number of
data directories does not match NumberOfRvaAndSizes.
This leads to a failed consistency check in
PeCoffLoaderGetPeHeader():
Patrick Delaunay [Wed, 12 Jan 2022 09:55:41 +0000 (10:55 +0100)]
doc: add include/dm/fdtaddr.h to the HTML documentation
Correct Sphinx style comments in include/dm/fdtaddr.h
and add the devfdt API to the HTML documentation;
these functions are NOT compatible with live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:49 +0000 (10:53 +0100)]
doc: add include/dm/of*.h to the HTML documentation
Correct Sphinx style comments in include/dm/ofnode.h
and add the device tree node API to the HTML documentation;
the ofnode functions are compatible with Live tree or with flat
device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Andre Przywara [Mon, 20 Dec 2021 18:12:04 +0000 (18:12 +0000)]
doc: add Arm Juno board documentation
The Juno Arm development board is an open, vendor-neutral, Armv8-A
development platform.
Add documentation that briefly outlines the hardware, and describes
building and installation of U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Eugen Hristev [Tue, 4 Jan 2022 16:20:19 +0000 (18:20 +0200)]
lib: Kconfig: fix PHANDLE_CHECK_SEQ position outside of menu
CONFIG_PHANDLE_CHECK_SEQ is outside of the menu 'Library routines'
thus it's invisible in menuconfig and cannot be selected.
Fix this by moving the 'endmenu' after the PHANDLE_CHECK_SEQ definition
Fixes: c589132a1d ("fdt: Use phandle to distinguish DT nodes with same name") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Peter Robinson [Sun, 2 Jan 2022 11:38:35 +0000 (11:38 +0000)]
env: fat: Add new lines at the end of print statements
Add some new line feeds at the end of print messages to make things
easier to read on the console. The other env options do this so
this is just an omission for FAT env.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share
the same PHY device instance. While these controllers are being stopped
they both attempt to power-off and deinitialize it, but trying to
power-off the deinitialized PHY device results in a hang. This usually
happens just before booting an OS, and can be explicitly triggered by
running "usb start; usb stop" in the U-Boot shell.
Implement a uclass-wide counting mechanism for PHY initialization and
power state change requests, so that we don't power-off/deinitialize a
PHY instance until all of its users want it done. The Allwinner A10 USB
PHY driver does this counting in-driver, remove those parts in favour of
this in-uclass implementation.
The sandbox PHY operations test needs some changes since the uclass will
no longer call into the drivers for actions matching its tracked state
(e.g. powering-off a powered-off PHY). Update that test, and add a new
one which simulates multiple users of a single PHY.
The major complication here is that PHY handles aren't deduplicated per
instance, so the obvious idea of putting the counts in the PHY handles
don't immediately work. It seems possible to bind a child udevice per
PHY instance to the PHY provider and deduplicate the handles in each
child's uclass-private areas, like in the CLK framework. An alternative
approach could be to use those bound child udevices themselves as the
PHY handles. Instead, to avoid the architectural changes those would
require, this patch solves things by dynamically allocating a list of
structs (one per instance) in the provider's uclass-private area.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> - Rock960
Mark Kettenis [Tue, 21 Dec 2021 16:31:50 +0000 (17:31 +0100)]
armv8: apple: Disable PSCI reset
Apple's ARMv8 cores don't implement EL3 and therefore don't
provide a PSCI implementation. So don't attempt to use
PSCI to reset on machines using Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
This happens when nvme_print_info() tries to return to the caller. It
looks like this error is caused by trying to allocate 8 KiB of memory
on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER().
Use malloc_cache_aligned() to allocate this memory dynamically instead.
This fixes 'nvme detail' on Turris Omnia.
Note that similar change was applied to file drivers/nvme/nvme.c in past by
commit 2f83481dff9c ("nvme: use page-aligned buffer for identify command").
Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz>
Attempt to handle cases with a downstream port of a PCIe switch where
link training never completes and the link continues switching between
speeds indefinitely with the data link layer never reaching the active
state.
It has been observed with a downstream port of the ASMedia ASM2824 Gen 3
switch wired to the upstream port of the Pericom PI7C9X2G304 Gen 2
switch, using a Delock Riser Card PCI Express x1 > 2 x PCIe x1 device,
P/N 41433, wired to a SiFive HiFive Unmatched board. In this setup the
switches are supposed to negotiate the link speed of preferably 5.0GT/s,
falling back to 2.5GT/s.
However the link continues oscillating between the two speeds, at the
rate of 34-35 times per second, with link training reported repeatedly
active ~84% of the time, e.g.:
Make use of this observation then and attempt to detect the inability to
negotiate the link speed automatically, and then handle it by hand. Use
the Data Link Layer Link Active status flag as the primary indicator of
successful link speed negotiation, but given that the flag is optional
by hardware to implement (the ASM2824 does have it though), resort to
checking for the mandatory Link Bandwidth Management Status flag showing
that the link speed or width has been changed in an attempt to correct
unreliable link operation (the ASM2824 does set it too).
If these checks indicate that link may not operate correctly, then poll
the Data Link Layer Link Active status flag along with the Link Training
flag for the duration of 200ms to see if the link has stabilised, that
is either that the Data Link Layer Link Active status flag has been set
or that Link Training has been inactive during at least the second half
of the interval.
If that has indicated failure, restrict the target speed to 2.5GT/s,
request a link retrain and check again if the link has stabilised. If
that does not work either, then restore the original speed setting and
claim defeat, otherwise we are done.
NB interestingly enough with the ASM2824 vs PI7C9X2G304 configuration
referred above asking the ASM2824 to retrain with a higher target link
speed once the 2.5GT/s speed has been negotiated makes the two devices
successfully negotiate 5.0GT/s. Lifting the 2.5GT/s speed restriction
would however prevent our workaround from working with an OS that issues
a reset and that is unaware of the problem. This is because the devices
would then try to negotiate a higher link speed from scratch and fail,
while the sticky property of the Target Link Speed setting will keep the
2.5GT/s speed restriction across a reset.
Keep the 2.5GT/s speed restriction then, conservatively, if functional
once applied.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Reviewed-by: Stefan Roese <sr@denx.de>
qianfan Zhao [Tue, 16 Nov 2021 01:35:38 +0000 (09:35 +0800)]
lib: sparse: Make CHUNK_TYPE_RAW buffer aligned
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Misaligned operation at range [84000028, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]
Fix it
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Pali Rohár [Wed, 12 Jan 2022 17:32:08 +0000 (18:32 +0100)]
arm: mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation
These hardcoded values were calculated from CONFIG_SPL_TEXT_BASE macro. Now
this macro is configurable via Kconfig, so calculate values 0x0030/0x4030
at compile time via CONFIG_SPL_TEXT_BASE option. Values 0x0030/0x4030
represents offset of CONFIG_SPL_TEXT_BASE from address 0x40000000.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:30:09 +0000 (18:30 +0100)]
arm: mvebu: db-88f6720: Fix CONFIG_SPL_TEXT_BASE and remove wrong memory layout
Memory layout in the comment is from Armada XP platform which uses load
address 0x40004030. DB-88f6720 is Armada 375 platform which uses same load
address as Armada 38x which is 0x40000030.
Currently SPL support for Armada 375 is unfinished and does not work. There
is missing Serdes initialization and DDR3 training code. So nobody noticed
that CONFIG_SPL_* options are not correct.
Fix at least CONFIG_SPL_TEXT_BASE constant and remove incorrect comments
about memory layout. So it is not misleading.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Do not check for kwbimage configuration file when just showing information
about existing kwbimage file.
The check for kwbimage configuration file is required only when creating
kwbimage, not when showing information about image or when extracting data
from image.
With this change, it is possible to call mkimage -l and dumpimage -l also
for existing kwbimage file.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:53 +0000 (18:20 +0100)]
tools: kwbimage: Extract main data image without -p arg for dumpimage
When there is no -p argument for dumpimage tool specified, extract the main
data image from kwbimage file. This makes dumpimage consistent with other
image formats.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:52 +0000 (18:20 +0100)]
tools: kwbimage/kwboot: Check ext field for non-zero value
Despite the official specification, BootROM does not look at the lowest bit
of ext field but rather checks if ext field is non-zero.
Moreover original Marvell doimage tool puts into the mhdr->ext field the
number of extended headers, so basically it sets ext filed to non-zero
value if some extended header is present.
Fix U-Boot dumpimage and kwboot tools to parse correctly also kwbimage
files created by Marvell doimage tool, in the same way as the BootROM is
doing it when booting these images.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:50 +0000 (18:20 +0100)]
tools: kwbimage: Dump kwbimage config file on '-p -1' option
To regenerate kwbimage from existing image, it is needed to have kwbimage
config file. Add a new option to generate kwbimage config file from
existing kwbimage when '-p 1' option is given.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:49 +0000 (18:20 +0100)]
tools: kwbimage: Show binary image offset in mkimage -l, in addition to size
For debugging purposes it is good to know where the binary image would be
loaded and also it is needed to know if printed size is image size or the
size of header together with image.
Make it unambiguous by showing that printed size is not the size of the
whole header, but only the size of executable code, and print also the
executable offset of this binary image. Load/execute address is the offset
relative to the base address (either 0x40004000 or 0x40000000).
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:47 +0000 (18:20 +0100)]
arm: mvebu: Enable BootROM output on A38x
BootROMs on pre-A38x SoCs enabled its output on UART by default, but A38x'
BootROM has its output on UART disabled by default.
To enable BootROM output on A38x SoC, it is required to set DEBUG flag
(which only enables BootROM output and nothing more) in kwbimage. For UART
images this DEBUG flag is ignored by BootROM.
Enable kwbimage DEBUG flag for all A38x boards.
With this change BootROM prints the following (success) information on UART
before booting U-Boot kwbimage:
BootROM - 1.73
Booting from SPI flash
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:46 +0000 (18:20 +0100)]
tools: kwbimage: Enforce 128-bit boundary alignment only for Sheeva CPU
This alignment is required only for platforms based on Sheeva CPU core
which are A370 and AXP. Now when U-Boot build system correctly propagates
LOAD_ADDRESS there is no need to have enabled 128-bit boundary alignment on
platforms which do not need it. Previously it was required because load
address was implicitly rounded to 128-bit boundary and U-Boot build system
expected it and misused it. Now with explicit setting of LOAD_ADDRESS there
is no guessing for load address anymore.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:45 +0000 (18:20 +0100)]
arm: mvebu: Correctly set LOAD_ADDRESS for U-Boot SPL binary in kwbimage
U-Boot SPL for mvebu platform is not compiled as position independent.
Therefore it is required to instruct BootROM to load U-Boot SPL at the
correct address. Loading of kwbimage binary code at specific address can be
now achieved by the new LOAD_ADDRESS token as part of BINARY command in
kwbimage config file.
Update mvebu Makefile to put value of $(CONFIG_SPL_TEXT_BASE) into
LOAD_ADDRESS token when generating kwbimage.cfg from kwbimage.cfg.in.
It is required to update regex for sed to find replacement tokens at any
position on a line in kwbimage config file and not only at the beginning of
the line. This is because LOAD_ADDRESS is specified at the end of line
containing the BINARY command.
It looks like all Armada boards set CONFIG_SPL_TEXT_BASE to value
0x40004030 or 0x40000030. Why this value? It is because main kwbimage
header is at address 0x40004030 or 0x40000000 and it is 32 bytes long.
After the main header there is the binary header, which consist of 1 byte
for type, 3 bytes for size, 1 byte for number of arguments, 3 reserved
bytes and then 4 bytes for each argument. After these arguments comes the
executable code.
So arguments start at address 0x40004028 or 0x40000028. Before commit e6571f38c943 ("arm: mvebu: Remove dummy BIN header arguments for SPL
binary") there were two (dummy) arguments, which resulted in load address
of 0x40004030 or 0x40000030, always. After that commit (which removed dummy
arguments), load address stayed same due to the 128-bit alignment done by
mkimage.
This patch now reflects the dependency between $(CONFIG_SPL_TEXT_BASE),
load address and dummy kwbimage arguments, and allows the user to adjust
$(CONFIG_SPL_TEXT_BASE) config option to some other value.
For unsupported values, when mkimage/kwbimage cannot set chosen load address
as specified by $(CONFIG_SPL_TEXT_BASE), the build process now fails,
instead of silently generating non-working kwbimage.
Removal of this alignment between $(CONFIG_SPL_TEXT_BASE) and LOAD_ADDRESS
can only be done by compiling U-Boot SPL as position independent. But this
currently is not possible for 32-bit ARM version of U-Boot SPL.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:41 +0000 (18:20 +0100)]
tools: kwbimage: Add support for specifying LOAD_ADDRESS for BINARY command
ARM executable code included in kwbimage binary header, which is not
position independent, needs to be loaded and executed by BootROM at the
correct fixed address.
Armada BootROMs load kwbimage header (in which the executable code is also
stored) at fixed address 0x40004000 or 0x40000000 which is mapped to
L2-SRAM (L2 Cache as SRAM). Address 0x40004000 is used on Armada platforms
with Sheeva CPU core (A370 and AXP) where BootROM uses MMU with 0x4000
bytes for MMU translation table. Address 0x40000000 is used on all other
platforms.
Thus the only way to specify load and execute address of this executable
code in binary kwbimage header is by filling dummy arguments into the
binary header, using the same mechanism we already have for achieving
128-bit boundary alignment on A370 and AXP SoCs.
Extend kwbimage config file parser to allow to specify load address as
part of BINARY command with syntax:
If the specified load address is invalid or cannot be used, mkimage will
throw fatal error and exit. This will prevent generating kwbimage with
invalid load address for non-position independent binary code.
If no load address is specified, kwbimage will not fill any the dummy
arguments, thus it will behave the same as before this change.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:39 +0000 (18:20 +0100)]
arm: mvebu: Generate kwbimage.cfg with $(call cmd, ...)
Usage of $(call cmd,...) is standard way to call other commands which
generate things.
It also has the advantage of printing build information in the form
KWBCFG arch/arm/mach-mvebu/kwbimage.cfg
if verbosity is disabled, and printing the build command otherwise.
Note that the '#' character needs to be escaped in Makefile when used as
value for make variable assignment.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 12 Jan 2022 17:20:37 +0000 (18:20 +0100)]
tools: kwbimage: Fix generating image with multiple DATA_DELAY commands
Register set header consists of sequence of DATA commands followed by
exactly one DATA_DELAY command. Thus if we are generating image with
multiple DATA_DELAY commands, we need to create more register set headers.
Fix calculation of image size with multiple DATA_DELAY commands and
correctly set pointer to struct register_set_hdr_v1 when initializing new
register set header.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Wed, 12 Jan 2022 16:06:59 +0000 (17:06 +0100)]
ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision
This is a cleaned up and fixed version of a patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
in each pattern cycle the bus state can be changed
in order to avoide it, need to back to the same bus state on each
pattern cycle
by
Moti Boskula <motib@marvell.com>
The original patch is not in Marvell's mv-ddr-marvell repository. It was
gives to us by Marvell to fix an issues with DDR training on some
boards, but it cannot be applied as is to mv-ddr-marvell, because it is
a very dirty draft patch that would certainly break other things, mainly
DDR4 training code in mv-ddr-marvell, since it changes common functions.
I have cleaned up the patch and removed stuff that seemed unnecessary
(when removed, it still fixed things). Note that I don't understand
completely what the code does exactly, since I haven't studied the DDR
training code extensively (and I suspect that no one besides some few
people in Marvell understand the code completely).
Anyway after the cleanup the patch still fixes isssues with DDR training
on the failing boards.
There was also a problem with the original patch on some of the Allied
Telesis' x530 boards, reported by Chris Packham. I have asked Chris to
send me some logs, and managed to fix it:
- if you look at the change, you'll notice that it introduces
subtraction of cur_start_win[] and cur_end_win[] members, depending on
a bit set in the current_byte_status variable
- the original patch subtracted cur_start_win[] if either
BYTE_SPLIT_OUT_MIX or BYTE_HOMOGENEOUS_SPLIT_OUT bits were set, but
subtracted cur_end_win[] only if the first one (BYTE_SPLIT_OUT_MIX)
was set
- from Chris Packham logs I discovered that the x530 board where the
original patch introduced DDR training failure, only the
BYTE_HOMOGENEOUS_SPLIT_OUT bit was set, and on our boards where the
patch is needed only the BYTE_SPLIT_OUT_MIX is set in the
current_byte_status variable
- this led me to the hypothesis that both cur_start_win[] and
cur_end_win[] should be subtracted only if BYTE_SPLIT_OUT_MIX bit is
set, the BYTE_HOMOGENEOUS_SPLIT_OUT bit shouldn't be considered at all
- this hypothesis also gains credibility when considering the commit
title ("fix SPLIT_OUT_MIX state decision")
Hopefully this will fix things without breaking anything else.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Chris Packham <judge.packham@gmail.com>
projects / u-boot.git / log