Christian Hewitt [Sun, 26 Mar 2023 06:06:25 +0000 (06:06 +0000)]
boards: amlogic: switch LibreTech-CC v2 and WeTek Core2 to EE powerdomain
The LibreTech-CC (LePotato) v2 and WeTek Core2 boards are still using
the older GX VPU powerdomain driver. Update their configs to use the
newer EE driver like other Amlogic boards [0].
Christian Hewitt [Thu, 23 Mar 2023 14:31:40 +0000 (14:31 +0000)]
ARM: dts: add support for WeTek Hub and WeTek Play2
Import the dts files from linux-amlogic/for-next (Linux 6.4-rc1) and
add the old PHY reset bindings for dwmac to the u-boot.dtsi until we
support the new bindings in the PHY node. Without this the PHY is not
functional in u-boot or Linux.
Christian Hewitt [Thu, 23 Mar 2023 14:31:34 +0000 (14:31 +0000)]
ARM: dts: add support for BananaPi M2S
Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1)
and omit the NPU node from the A311D board variant dts as this is
not supported under U-Boot.
Christian Hewitt [Thu, 23 Mar 2023 14:31:31 +0000 (14:31 +0000)]
ARM: dts: add support for BananaPi M2-Pro
Import the board dts from the linux-amlogic/for-next (6.4-rc1)
branch. This involves spliting the BPI-M5 dts into a dtsi and
then reusing this for the M2-Pro.
Christian Hewitt [Mon, 20 Mar 2023 11:46:09 +0000 (11:46 +0000)]
doc: boards: amlogic: add documentation for ODROID-HC4
Add separate documentation for the ODROID-HC4 board to ensure
users build U-Boot using the HC4 defconfig that enables PCIe
SATA boot. This avoids user frustration trying to boot after
using the C4 recipe which only works from SD card.
Christian Hewitt [Mon, 20 Mar 2023 11:45:52 +0000 (11:45 +0000)]
doc: boards: amlogic: update documentation for ODROID-C4
Improve documentation. Notably drop references to the ODROID-HC4 board
as its support has evolved and we will add an HC4 specific document in
a later patch.
Christian Hewitt [Mon, 20 Mar 2023 11:45:37 +0000 (11:45 +0000)]
doc: boards: amlogic: update documentation for index page
Improve documentation. Notably we remove all the board names from the
feature matrix to reduce table width. SoC types have been added to the
titles in individual board documents so readers can still correlate a
board against the features. This makes it easier to add new boards to
to the document in the future.
Neil Armstrong [Tue, 7 Mar 2023 08:20:25 +0000 (09:20 +0100)]
ARM: meson: Add initial support for BPI-CM4 module with BPI-CM4IO baseboard
Add support for both the BananaPi BPI-CM4 module and the BananaPi
baseboard which is compatible with the RaspberryPi CM4IO baseboard.
The BananaPi BPI-CM4 module follows the CM4 specifications at [1],
but with a single HDMI port and a single DSI output.
The current CM4IO baseboard DT should work fine on the Raspberry CM4
baseboard and other derivatives baseboards, but proper DT should
be written for other baseboards.
Neil Armstrong [Tue, 7 Mar 2023 08:20:24 +0000 (09:20 +0100)]
ARM: dts: import initial DT for BPI-CM4 module with BPI-CM4IO baseboard
Import initial support for BPI-CM4 module with BPI-CM4IO baseboard
from the Linux submission applied at [1].
The BananaPi BPI-CM4 module follows the CM4 specifications at [2],
but with a single HDMI port and a single DSI output.
The current CM4IO baseboard DT should work fine on the Raspberry CM4
baseboard and other derivatives baseboards, but proper DT should
be written for other baseboards.
Tom Rini [Fri, 14 Apr 2023 14:50:04 +0000 (10:50 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
The biggest change is some refactoring of the H616 DRAM driver, which
allows better fine-tuning for each board, and is the base for pending
LPDDR3 and LPDDR4 support, needed by new boards. The sun8i-emac
Ethernet driver sees some refactoring that enables it for the Allwinner
D1 EMAC IP. The sunxi HDMI driver is now using more DT properties. Also
the early SPL code now supports some odd H616 SoC variant.
There are some more patches pending, that require the final review
touches and some testing, I will send a separate PR for them later.
The gitlab CI completed successfully, and I boot tested a few boards
with different SoCs, via FEL and SD card, into Linux.
Tony Dinh [Mon, 3 Apr 2023 04:42:33 +0000 (21:42 -0700)]
ddr: marvell: a38x: Perform DDR training sequence again for 2nd boot
- DDR Training sequence happens very fast. The speedup in boot time is
negligible by skipping the training sequence during 2nd boot or after.
So remove the check and skip.
- This change improves the robustness of DDR training. If u-boot crashed
during DDR training, the training could be left in a limbo state, where
the BootROM has recorded that it is already in a 2nd boot. The training
must be repeated in this scenario to get out of this limbo state, but due
to the check it cannot be performed.
Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 29 Mar 2023 19:25:58 +0000 (21:25 +0200)]
arm: mvebu: spl: Allow to build SATA kwbimage for 4K Native disks
Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block
size of SATA disk. This information is used during building of SATA
kwbimage and must be correctly set, otherwise BootROM does not load SPL.
For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096.
Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Pali Rohár [Wed, 29 Mar 2023 19:25:57 +0000 (21:25 +0200)]
tools: kwboot: Add support for parsing SATA images with non-512 block size
Currently kwboot expected that sector size for SATA image is always 512
bytes. If SATA image cannot be parsed with sector size of 512 bytes, try
larger sector sizes which are power of two and up to the 32 kB. Maximal
theoretical value is 32 kB because ATA IDENTIFY command returns sector size
as 16-bit number.
Pali Rohár [Wed, 29 Mar 2023 19:25:56 +0000 (21:25 +0200)]
tools: kwbimage: Add support for SATA images with non-512 byte block size
SATA kwbimage contains offsets in block size unit, not in bytes.
Until now kwbimage expected that SATA disk always have block size of 512
bytes. But there are 4K Native SATA disks with block size of 4096 bytes.
New SATA_BLKSZ command allows to specify different block size than 512
bytes and therefore allows to generate kwbimage for disks with different
block sizes.
This change add support for generating SATA images with different block
size. Also it add support for verifying and dumping such images.
Because block size itself is not stored in SATA kwbimage, image
verification is done by checking every possible block size (it is any
power of two value between 512 and 32 kB).
cmd: mvebu/bubt: a38x: Do not hardcode SATA block size to 512
Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk. In case of error, fallback
back to 512 bytes.
Andre Przywara [Thu, 8 Dec 2022 20:38:54 +0000 (20:38 +0000)]
sunxi: A64: drop boot0 header reservation
In the early days of the Allwinner A64 U-Boot support, we relied on a
vendor provided "boot0" binary to perform the DRAM initialisation. This
replaced the SPL, and required to equip the U-Boot (proper) binary with
a vendor specific header to be recognised as a valid boot0 payload.
Fortunately these days are long gone (we gained SPL and DRAM support in
early 2017!), and we never needed to use that hack on any later 64-bit
Allwinner SoC.
Since this is highly obsolete by now, remove that option from the
defconfigs of all A64 boards. We leave the code still in here for now,
since some people expressed their interest in this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Wed, 5 Apr 2023 20:30:11 +0000 (21:30 +0100)]
sunxi: arm64: boot0.h: runtime check for RVBAR address
Some SoCs of the H616 family use a die variant, that puts some CPU power
and reset control registers at a different address. There are examples
of two instances of the same board, using different die revisions of the
otherwise same H313 SoC. We need to write to a register in that block
*very* early in the SPL boot, to switch the core to AArch64.
Since the devices are otherwise indistinguishable, let the SPL code read
that die variant and use the respective RVBAR address based on that.
That is a bit tricky, since we need to do that in hand-coded AArch32
machine language, shared by all 64-bit SoCs. To avoid build dependencies
in this mess, we always provide two addresses to choose from, and just
give identical values for all other SoCs. This allows the same code to
run on all 64-bit SoCs, and controls this switch behaviour purely from
Kconfig.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
to program the 64-bit start code address into an MMIO mapped register
that shadows the architectural RVBAR register.
This address is SoC specific, with just two versions out there so far.
Now a third address emerged, on a *variant* of an existing SoC (H616).
Change the boot0.h start code to make this address a Kconfig
selectable option, to allow easier maintenance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Currently twr2rd, trd2wr and twtp are constants, but according to
vendor driver they are calculated from other values. Do that here too,
in preparation for later introduction of new parameter.
While at it, introduce constant for t_wr_lat, which was incorrectly
calculated from tcl before.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
sunxi: Parameterize bit delay code in H616 DRAM driver
These values are highly board specific and thus make sense to add
parameter for them. To ease adding support for new boards, let's make
them same as in vendor DRAM settings.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
sunxi: Convert H616 DRAM options to single setting
Vendor DRAM settings use TPR10 parameter to enable various features.
There are many mores features that just those that are currently
mentioned. Since new will be added later and most are not known, let's
reuse value from vendor DRAM driver as-is. This will also help adding
support for new boards.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
While ODT values for same memory type are similar, they are not
necessary the same. Let's parameterize them and make parameter same as
in vendor DRAM settings. That way it will be easy to introduce new board
support.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.
Update the device tree here because it does not exist in Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:06 +0000 (16:51 -0600)]
net: sun8i-emac: Remove the SoC variant ID
Now that all differences in functionality are covered by individual
flags, remove the enumeration of SoC variants.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:05 +0000 (16:51 -0600)]
net: sun8i-emac: Use common syscon setup for R40
While R40 puts the EMAC syscon register at a different address from
other variants, the relevant portion of the register's layout is the
same. Factor out the register offset so the same code can be shared
by all variants. This matches what the Linux driver does.
This change provides two benefits beyond the simplification:
- R40 boards now respect the RX delays from the devicetree
- This resolves a warning on architectures where readl/writel
expect the address to have a pointer type, not phys_addr_t.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:04 +0000 (16:51 -0600)]
net: sun8i-emac: Add a flag for the internal PHY switch
Describe this feature instead of using the SoC ID.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:03 +0000 (16:51 -0600)]
net: sun8i-emac: Add a flag for RMII support
Describe this feature instead of using the SoC ID.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:02 +0000 (16:51 -0600)]
net: sun8i-emac: Add a structure for variant data
Currently, EMAC variants are distinguished by their identity, but this
gets unwieldy as more overlapping variants are added. Add a structure so
we can describe the individual feature differences between the variants.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Mon, 28 Nov 2022 07:02:28 +0000 (01:02 -0600)]
video: sunxi: dw-hdmi: Use DM for HVCC regulator
The HDMI PHY depends on the HVCC supply being enabled. So far we have
relied on it being enabled by an earlier firmware stage (SPL or TF-A).
Attempt to enable the regulator here, so we can remove that dependency.
Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Samuel Holland [Mon, 28 Nov 2022 07:02:27 +0000 (01:02 -0600)]
video: sunxi: dw-hdmi: Use DM for clock gates and resets
This abstracts away the CCU register layout, which is necessary for
supporting new SoCs like H6 with a reorganized CCU. One of the resets is
referenced from the PHY node instead of the controller node, so it will
have to wait until the PHY code is factored out to a separate driver.
Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This driver is actually used for powerpc and m68k/ColdFire.
On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6,
interrupt enabled) is not set appropriately before each transfert.
As a result, the transfert hangs forever waiting for IIEN.
This patch set IIEN before each transfert, while considering this fix
as not harming powerpc arch.
Ye Li [Thu, 6 Apr 2023 10:26:35 +0000 (18:26 +0800)]
i2c: imx_lpi2c: Fix misuse the IS_ENABLED for DM clock
The IS_ENABLED, which does not consider SPL build, should be replaced
by CONFIG_IS_ENABLED.
For the case that we only enable DM CLK for u-boot but not in SPL, the
IS_ENABLED(CONFIG_CLK) still returns true, then cause clock failure.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Haibo Chen [Mon, 27 Mar 2023 11:21:43 +0000 (19:21 +0800)]
i2c: correct I2C deblock logic
Current code use dm_gpio_get_value() to get SDA and SCL value, and the
value depends on whether DTS file config the GPIO_ACTIVE_LOW. In ususal
case for i2c GPIO, DTS need to set GPIO_ACTIVE_LOW for SCL/SDA pins. So
here the logic is not correct.
And we must not use GPIOD_ACTIVE_LOW in client code include the
dm_gpio_set_dir_flags(), it is DTS's responsibility for this flag. So
remove GPIOD_ACTIVE_LOW here.
This code first figures out if there is an i2c,speeds property, if so
its size in u32s, and then reads the value into the local speeds[]
array. Both 'size' and 'speeds' are completely unused thereafter.
It's not at all clear what this is supposed to do. Of course, it could
be seen as a sanity check that the DT node does have an i2c,speeds
property with an appropriate number of elements, but for that one
wouldn't actually need to read it into speeds[]. Also, I can't find
anywhere else in the U-Boot code which makes use of values from that
property (this is is the only C code referencing "i2c,speeds"), so it
seems pointless to insist that it's there.
Pali Rohár [Sat, 11 Mar 2023 10:44:27 +0000 (11:44 +0100)]
mmc: Use EXT_CSD_EXTRACT_BOOT_PART() macro for extracting boot part
Mask macro PART_ACCESS_MASK filter out access bits of emmc register and
macro EXT_CSD_EXTRACT_BOOT_PART() extracts boot part bits of emmc register.
So use EXT_CSD_EXTRACT_BOOT_PART() when extracting boot partition.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Fri, 10 Feb 2023 12:23:50 +0000 (13:23 +0100)]
mmc: mv_sdhci: Simplify call to sdhci_mvebu_mbus_config()
This driver already depends on CONFIG_ARCH_MVEBU, so there is no need
to have some checks for this Kconfig symbol in the driver itself. Let's
remove these superfluous checks.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
projects / u-boot.git / log