Simon Glass [Tue, 21 Oct 2014 01:48:32 +0000 (19:48 -0600)]
dm: exynos: dts: Adjust device tree files for U-Boot
The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.
Simon Glass [Tue, 21 Oct 2014 01:48:29 +0000 (19:48 -0600)]
dm: exynos: dts: Convert /include/ to #include
We should be consistent about this. The kernel has moved to #include
which breaks error reporting to some extent but does allow us to include
binding files.
Masahiro Yamada [Tue, 7 Oct 2014 05:51:31 +0000 (14:51 +0900)]
dm: add of_match_ptr() macro
The driver model supports two ways for passing device parameters;
Device Tree and platform_data (board file).
Each driver should generally support both of them because some
popular IPs are used on various platforms.
Assume the following scenario:
- The driver Foo is used on SoC Bar and SoC Baz
- The SoC Bar uses Device Tree control (CONFIG_OF_CONTROL=y)
- The SoC Baz does not support Device Tree; uses a board file
In this situation, the device driver Foo should work with/without
the device tree control. The driver should have .of_match and
.ofdata_to_platdata members for SoC Bar, while they are meaningless
for SoC Baz; therefore those device-tree control code should go
inside #ifdef CONFIG_OF_CONTROL.
Ruchika Gupta [Tue, 7 Oct 2014 10:16:20 +0000 (15:46 +0530)]
crypto/fsl: Add command for encapsulating/decapsulating blobs
Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.
Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.
During decapsulation, the reverse process is performed to get back
the original data.
Commands added
--------------
blob enc - encapsulating data as a cryptgraphic blob
blob dec - decapsulating cryptgraphic blob to get the data
Commands Syntax
---------------
blob enc src dst len km
Encapsulate and create blob of data $len bytes long
at address $src and store the result at address $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.
blob dec src dst len km
Decapsulate the blob of data at address $src and
store result of $len byte at addr $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:09:06 +0000 (11:39 +0530)]
ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:05:31 +0000 (11:35 +0530)]
mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:05:30 +0000 (11:35 +0530)]
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
fsl_sec : Move SEC CCSR definition to common include
Freescale SEC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
SEC to common include
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:15 +0000 (20:37 +0200)]
video: ipu_disp: remove pixclk fixup
The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.
Hans de Goede [Mon, 13 Oct 2014 12:51:40 +0000 (14:51 +0200)]
sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step
Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tom Rini [Mon, 13 Oct 2014 12:38:55 +0000 (08:38 -0400)]
Makefile: drop "tools-only" from no-dot-config-targets
With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).
Reported-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Tom Rini <trini@ti.com>
Marek Vasut [Thu, 9 Oct 2014 23:50:23 +0000 (01:50 +0200)]
arm: socfpga: Use EMAC1 on SoCDK
The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
Pavel Machek [Thu, 9 Oct 2014 23:50:22 +0000 (01:50 +0200)]
arm: socfpga: add MAINTAINERS entry
Add MAINTAINERS entry.
Signed-off-by: Pavel Machek <pavel@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
Jeroen Hofstee [Tue, 7 Oct 2014 20:42:27 +0000 (22:42 +0200)]
tools: compiler.h: Fix build on FreeBSD
Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include <sys/endian.h> for FreeBSD.
Cc: Marek Vasut <marex@denx.de> CC: Tom Rini <trini@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
ks2_evm: readme: align according to actual sources
Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
The K2HK and K2E boards support SPL by default, so add
CONFIG_SPL option. Also export CONFIG_ARM, CONFIG_ARCH_KEYSTONE
and TARGET_K2*_EVM options to spl/.config as they are the same.
So now it's convinient to build gph images using only two commands:
The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: Tom Rini <trini@ti.com>
Jeroen Hofstee [Wed, 1 Oct 2014 15:22:58 +0000 (17:22 +0200)]
multiconfig.sh: replace GNU sed specific match
A SPL/TPL enabled target would was not recognized as
such by BSD sed, since it relies on a GNU extension.
Instead of or-ing just spell out both matches.
Wolfgang Denk [Tue, 30 Sep 2014 08:44:01 +0000 (10:44 +0200)]
SPDX License cleanup for LiMon imported files
A number of network related files were imported from the LiMon
project; these contain a somewhat unclear license statement:
Copyright 1994 - 2000 Neil Russell.
(See License)
I analyzed the source code of LiMon v1.4.2 which was used for this
import. It does not contain any "License" file, but the top level
directory contains a file "COPYING", which turns out to be GPL v2
of June 1991. So it is legitimate to conclude that the LiMon derived
files are also to be released under GPLv2. Mark them as such.
Roger Quadros [Tue, 23 Sep 2014 15:07:01 +0000 (18:07 +0300)]
ahci: Don't start command DMA engine before buffers are set
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)
This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358() 44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access
Commit 12cc54376768461533b55ada1b0b6d4979f40579 'omap3: overo: Select
fdtfile for expansion board' wrongly missed the operator in the fdtfile
test. Update the test to only overwrite an empty fdtfile environment
variable.
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
York Sun [Thu, 2 Oct 2014 22:20:10 +0000 (15:20 -0700)]
common/board_r: Fix booting issue on T4240QDS
Commit 294b91a5817147d4b7f47be2ac69bac2a1f26491 moved initr_malloc
earlier than initr_unlock_ram_in_cache. This causes issue on T4240.
It may be related to locked L1 d-cache and unlocked L2 cache. D-
cache could and should be unlock earlier for normal operation.
This patch moves initr_unlock_ram_in_cache before initr_malloc. It
has been verified on the following boards, in which only T4240QDS
suffered and has been since fixed: T4240QDS, T2080QDS, P5040DS,
P4080DS, MPC8572DS, MPC8536DS, MPC8641HPCN, B4860QDS.
Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Ian Campbell [Fri, 3 Oct 2014 13:29:01 +0000 (14:29 +0100)]
pxe: Ensure we don't overflow bootargs
On a couple of platforms I've tripped over long PXE append lines overflowing
this array, due to having CONFIG_SYS_CBSIZE == 256. When doing preseeded Debian
installs it's pretty trivial to exceed that.
Since the symptom can be a silent hang or a crash add a check. Of course the
affected boards would also need an increased CBSIZE to actually work.
Note that due to the printing of the final bootargs string CONFIG_SYS_PBSIZE
also needs to be sufficiently large.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
[trini: Use %zd not %d in printf for all args] Signed-off-by: Tom Rini <trini@ti.com>
Masahiro Yamada [Fri, 3 Oct 2014 11:03:04 +0000 (20:03 +0900)]
mtd: denali: support NAND_CMD_RNDOUT command
The function nand_flash_detect_ext_param_page() requires
NAND_CMD_RNDOUT command supported. It is necessary to detect some
types of ONFi-compliant devices. Without it, the error message
"unsupported command received 0x5" is shown.
Let's support this command on the Denali NAND controller driver.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Chin Liang See <clsee@altera.com>
Masahiro Yamada [Fri, 3 Oct 2014 11:03:03 +0000 (20:03 +0900)]
mtd: denali: fix NAND_CMD_PARAM command
NAND_CMD_PARAM (0xEC) command is not working on the Denali
NAND controller driver.
Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command
is followed by an address cycle, the target device goes busy.
(R/B# is deasserted)
Wait until the parameter data are ready.
In addition, unnecessary clear_interrupts() should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Chin Liang See <clsee@altera.com>
rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of
rmobile SoCs. The initialize L2 cache in lowlevel_init_ca15.S only needed
for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15.
This adds Skip to initialize L2 cache when r8a7794.
rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of
rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5].
This adds fix to set L2CTLR [5] only when the r8a7790.
Hans de Goede [Tue, 30 Sep 2014 16:45:32 +0000 (18:45 +0200)]
sunxi: Fix gmac not working reliable on the Bananapi
In order for the gmac nic to work reliable on the Bananapi, we need to set
bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" of the GMAC clk register
(0x01c20164) to 3.
Without this about 9 out of 10 ethernet packets get lost, with this setting
there is no packet loss.
So far setting these bits is only necessary on the Bananapi, so this commit
solves this with a bit of #ifdef CONFIG_BANANAPI code. If in the future we
need to do something similar for other boards, we can create a specific
CONFIG_FOO option for this then.
Reported-by: Karsten Merker <merker@debian.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Karsten Merker <merker@debian.org> Tested-by: Zoltan HERPAI <wigyori@openwrt.org> Tested-by: Tony Zhang <tony.zhang@lemaker.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Simon Glass [Wed, 8 Oct 2014 04:01:49 +0000 (22:01 -0600)]
config: Move smdkv310 to use common exynos4 file
Most of the smdkv310 features are common with other exynos4 boards. To
permit easier addition of driver model support, use the common file and
add a device tree file.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Wed, 8 Oct 2014 04:01:47 +0000 (22:01 -0600)]
exynos: config: Move cros_ec and tps65090 out of smdk boards
These boards do not in fact have a Chrome OS EC, nor a TPS565090 PMIC, so
move the settings into a separate common file to be used by those that need
it.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Wed, 8 Oct 2014 04:01:45 +0000 (22:01 -0600)]
exynos: Move common exynos settings into a common file
Since exynos4 and exyno5 share many settings, we should move these into
a common file to avoid duplication.
In effect the changes are that all exynos boards now have EXT4 and FAT
write support. This affects exynos5250 and exynos5420 which previously
did not. This also disables the ext2 commands which are equivalent to
ext4 anyway.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
projects / u-boot.git / log