Stephan Gerhold [Mon, 5 Jul 2021 12:18:47 +0000 (14:18 +0200)]
arm: mach-snapdragon: pinctrl: Place pin_name in .data section
According to arch/arm/lib/crt0_64.S, the BSS section is "UNAVAILABLE"
and uninitialized before relocation. Also, it overlaps with the
appended DTB before relocation, so writing data into a variable
in the BSS section might corrupt the appended DTB.
Unfortunately, pinctrl-apq8016.c and pinctrl-apq8096.c do place the
"pin_name" variable in the BSS section (since it's uninitialized).
It's also used before relocation, when setting up the pinctrl for
the serial driver.
On DB410c this causes "GPIO_5" to be written into some part of an
appended DTB, e.g.:
Depending on the part of the DTB that is corrupted this might not
cause any problems, but it can also result in strange reboots
without any serial output.
Fortunately, in practice this does not cause issues on DB410c yet
because board_fdt_blob_setup() in dragonboard410c.c currently
overrides the appended DTB with the one passed by the previous
bootloader (LK) (which does not get corrupted).
DB820c does not have board_fdt_blob_setup() so I would expect it to
be affected by this problem. Perhaps everyone was just fortunate to
not compile an U-Boot configuration where the pin_name corrupts an
important part of the DTB.
Make sure "pin_name" is explicitly placed in the .data section
instead of .bss to fix this.
Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Marek Vasut [Sun, 4 Jul 2021 19:32:05 +0000 (21:32 +0200)]
board-info: Call sysinfo_detect() before sysinfo_get_str()
The sysinfo_get_str() implementation checks whether the sysinfo was even
detected. In U-Boot proper, sysinfo_detect() is not called anywhere but
on one specific board. Call sysinfo_detect() before sysinfo_get_str() to
make sure the sysinfo is detected and sysinfo_get_str() returns valid
value instead of -EPERM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 4 Jul 2021 19:32:04 +0000 (21:32 +0200)]
board-info: Use sysinfo_get()
Replace uclass_first_device_err(UCLASS_SYSINFO, &dev) with sysinfo_get(&dev).
The board_info code may use sysinfo to print board information, so use the
sysinfo functions consistently. The sysinfo_get() is internally implemented
as return uclass_first_device_err(UCLASS_SYSINFO, &dev) anyway, so there is
no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 4 Jul 2021 19:31:18 +0000 (21:31 +0200)]
misc: i2c_eeprom: Add atmel,24c01 to the list
Linux kernel binding is using atmel,24c01 compatible string. On the
other hand there is atmel,24c01a which is not listed in the kernel.
Add compatible string without "a" suffix to be compatible with Linux
kernel binding.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Stephan Gerhold [Fri, 2 Jul 2021 15:06:18 +0000 (17:06 +0200)]
gpio: Add driver for Nomadik GPIO
Nomadik GPIO is a fairly simple GPIO module used in the ST-Ericsson
Ux500 SoCs (and some older Nomadik SoCs). It uses registers where
each GPIO is represented as a single bit, plus "set" and "clear"
registers that allow updating the state without having to read the
existing state.
The driver implements support for it for use together with DM_GPIO
and the existing ste-dbx5x0.dtsi device tree.
Stephan Gerhold [Fri, 2 Jul 2021 15:06:17 +0000 (17:06 +0200)]
gpio: Drop long unused DB8500 GPIO driver
The original U-Boot port for the ST-Ericsson U8500 SoC was dropped
in commit 68282f55b846 ("arm: Remove unused ST-Ericsson u8500 arch").
Most of the drivers related to the old port were removed, but the
db8500_gpio.c driver was forgotten for some reason. There is no way
to select it and it does not compile anymore because of missing
headers, so let's just remove it.
The new port for U8500 introduced in commit 689088f9dae8
("arm: Add support for ST-Ericsson U8500 SoC") fully embraces the
new Driver Model and device trees where possible, so this is
preparation to add a new, simplified GPIO driver based on DM_GPIO.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
efi_loader: Fix to set bootdev_root correctly if bootdev found
Fix find_boot_device() to set bootdev_root if it finds the
bootdev from BootNext. Currently it sets the bootdev_root only
when it finds bootdev from BootOrder.
If multiple capsules are applied, the FMP drivers for the individual
capsules can expect the value of CapsuleLast to be accurate. Hence
CapsuleLast must be updated after each capsule.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Sat, 10 Jul 2021 01:08:52 +0000 (21:08 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Aside from the usual fixes and updates one visible change is the
MMC update, which fixes some lingering bugs and gives a decent speed
increase on some boards (9->19 MB/s on H6, 21->43 MB/s on A64 eMMC).
I am keeping an watchful eye on bug reports here, to spot any correctness
regressions.
Another change is finally the enablement of the first USB host port on
many boards without micro-USB (data) sockets, like the Pine64 family.
That doubles the number of usable USB ports from 1 to 2 on those boards.
Some smaller fixes, 4GB DRAM support (on the H616) and a new board (ZeroPi)
conclude this first round of changes.
Compile-tested for all 157 sunxi boards, boot-tested on Pine H64,
Pine64-LTS, OrangePi Zero 2 and BananaPi M2 Berry.
Summary:
- DT update for H3/H5/H6
- Enable first USB port on boards without micro-USB
- ZeroPi board support
- 4GB DRAM support for H616 boards
- MMC fixes and speed improvement
- some fixes
Andre Przywara [Wed, 21 Apr 2021 08:33:04 +0000 (09:33 +0100)]
mmc: sunxi: Use mmc_of_parse()
At the moment the Allwinner MMC driver parses the bus-width and
non-removable DT properties itself, in the probe() routine.
There is actually a generic function provided by the MMC framework doing
this job, also it parses more generic properties like broken-cd and
advanced transfer modes.
Drop our own code and call mmc_of_parse() instead, to get all new
features for free.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Andre Przywara [Wed, 5 May 2021 10:33:40 +0000 (11:33 +0100)]
mmc: sunxi: Increase MMIO FIFO read performance
To avoid the complexity of DMA operations (with chained descriptors), we
use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us
to drain or fill the MMC data buffer FIFO very easily.
However those MMIO accesses are somewhat costly, so this limits our MMC
performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6
(partly due to the lower AHB1 frequency).
As it turns out we read the FIFO status register after *every* word we
read or write, which effectively doubles the number of MMIO accesses,
thus effectively more than halving our performance.
To avoid this overhead, we can make use of the FIFO level bits, which are
in the very same FIFO status registers.
So for a read request, we now can collect as many words as the FIFO
level originally indicated, and only then need to update the status
register.
We don't know for sure the size of the FIFO (and it seems to differ
across SoCs anyway), so writing is more fragile, which is why we still
use the old method for that. If we find a minimum FIFO size available on
all SoCs, we could use that, in a later optimisation.
This patch increases the eMMC read speed on a Pine64-LTS from about
22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s
we now reach the practical limit for 3.3V SD cards.
On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Wed, 5 May 2021 08:57:47 +0000 (09:57 +0100)]
mmc: sunxi: Fix MMC clock parent selection
Most Allwinner SoCs which use the so called "new timing mode" in their
MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their
parent input clock. This is interestingly enough compensated by a hidden
"by 2" post-divider in the mod clock, so the divider and actual output
rate stay the same.
Even though for the H6 and H616 (but only for them!) we use the doubled
input clock for the divider computation, we never accounted for the
implicit post-divider, so the clock was only half the speed on those SoCs.
This didn't really matter so far, as our slow MMIO routine limits the
transfer speed anyway, but we will fix this soon.
Clean up the code around that selection, to always use the normal PLL6
(PERIPH0(1x)) clock as an input. As the rate and divider are the same,
that makes no difference.
Explain the hardware differences in a comment.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 29 Apr 2021 08:31:58 +0000 (09:31 +0100)]
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT
When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about
pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which
are always below 1GB on all Allwinner SoCs, so there is no problem with
anything having more than 32 bits.
Add the proper casts to make it compile cleanly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Andre Przywara [Fri, 18 Dec 2020 22:02:11 +0000 (22:02 +0000)]
mmc: sunxi: Avoid #ifdefs in delay and width setup
The delay and bus-width setup are slightly different across the
Allwinner SoC generations, and we covered this so far with some
preprocessor conditionals.
Use the more readable IS_ENABLE() instead.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Andre Przywara [Wed, 28 Apr 2021 20:29:55 +0000 (21:29 +0100)]
sunxi: H616: Enable full 4GB of DRAM
The H616 is our first supported Allwinner SoC which goes beyond the 4GB
address space "barrier", by having more than 32 address bits.
Lift the preliminary 3GB DRAM limit for the H616, and update the page
table setup on the way, to actually map that last GB as well.
As not all devices are actually capable of dealing with more than 32
bits (the DMA in the EMAC for instance), we also limit U-Boot's own
DRAM usage to 4GB on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Sun, 25 Apr 2021 23:38:04 +0000 (00:38 +0100)]
sunxi: board: Add H616 MMC2 pins
We hardcode the pinctrl setting for the MMC controllers in boards.c,
since we need them also in the SPL, where there is no DT yet.
Add the respective setting for the H616 SoC, to enable eMMC on boards
with this SoC as well.
Also to make diagnosing this problem easier, print a warning if a board
tries to setup MMC2 pins without a respective SoC setting being defined.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan at amarulasolutions.com> Reviewed-by: Jernej Skrabec <jernej.skrabec at siol.net>
Jernej Skrabec [Mon, 7 Jun 2021 17:42:45 +0000 (19:42 +0200)]
configs: OrangePi PC2: Update defaults
OrangePi PC2 board has DRAM with ODT, so enable it.
H5 SoC is also connected to voltage regulator. It's default value is
reasonable at reset, but might be too low when rebooting with a lower
voltage programmed. In order to avoid instability, enable driver for it
and set it to appropriate voltage.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Andre Przywara <andre.przywara@arm.com>
[Andre: remove original ZQ value change, adjust commit message] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Most clock factors and dividers in the H6 PLLs use a "+1 encoding",
which we were missing on two occasions.
This fixes the MMC clock setup on the H6, which could be slightly off due
to the wrong parent frequency:
mmc 2 set mod-clk req 52000000 parent 1176000000 n 2 m 12 rate 49000000
Also the CPU frequency (PLL1) was a tad too high before.
For PLL5 (DRAM) we already accounted for this +1, but in the DRAM code
itself, not in the bit field macro. Move this there to be aligned with
what the other SoCs and other PLLs do.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
phy: sun4i-usb: Fix PHY0 routing and passby configuration for MUSB
Recent Allwinner platforms (starting with the H3) only use the MUSB
controller for peripheral mode and use HCI for host mode. As a result,
extra steps need to be taken to properly route USB signals to one or
the other. More precisely, the following is required:
* Routing the pins to either HCI/MUSB (controlled by PHY);
* Enabling USB PHY passby in HCI mode (controlled by PMU).
The current code will enable passby for each PHY and reroute PHY0 to
MUSB, which is inconsistent and results in broken USB peripheral support.
Passby on PHY0 must only be enabled when we want to use HCI. Since
host/device mode detection is not available from the PHY code and
because U-Boot does not support changing the mode dynamically anyway,
we can just mux the controller to MUSB if it is enabled and mux it to
HCI otherwise.
This fixes USB peripheral support for platforms with PHY0 dual-route,
especially H3/H5 and V3s.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 25 May 2021 00:20:25 +0000 (01:20 +0100)]
arm: dts: sunxi: h6: Update DT files
Update the H6 DT files from the Linux 5.12 release.
The changes are minimal (many LED node renames), but also help to enable
USB port 0 in U-Boot (later), enable the RSB device (not yet used in
U-Boot), and also introduce an MMC frequency limit.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Marek Vasut [Sat, 29 May 2021 11:34:32 +0000 (13:34 +0200)]
arm: bootm: Disable LMB reservation for command line and board info on arm64
On arm64, board info is not applicable and kernel command line patched into
the DT, so the LMB reservation here makes no sense anymore. On legacy arm32,
this might still be necessary on systems which do not use DT or use legacy
ATAGS. Disable this LMB reservation on arm64.
This also permits Linux DT to specify reserved memory node at address close
to the end of DRAM bank, i.e. overlaping with U-Boot location. Since after
boot, U-Boot will be no more, this is OK.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Rini <trini@konsulko.com>
Mark Kettenis [Wed, 10 Feb 2021 19:14:55 +0000 (20:14 +0100)]
armv8: Handle EL2 Host mode
On implementations that support VHE, the layout of the CPTR_EL2
register depends on whether HCR_EL2.E2H is set. If the bit is
set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact
be accessed through that register. In that case, jump to the
EL1 code to enable access to the FP/SIMD registers. This allows
U-Boot to run on systems that pass control to U-Boot in EL2 with
EL2 Host mode enabled such as machines using Apple's M1 SoC.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Marc Zyngier <maz@kernel.org>
Tim Harvey [Thu, 17 Jun 2021 23:31:07 +0000 (16:31 -0700)]
octeontx: do not require cavium BDK node to be present
The cavium,bdk node is a non-standard dt node used by the BDK and
therefore it is removed from the dt before booting Linux. Do not
require this node to exist as it won't for standard dt's.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 25 May 2021 17:42:42 +0000 (19:42 +0200)]
arm: mvebu: a37xx: Enable more baudrates
Extend CONFIG_SYS_BAUDRATE_TABLE and include all standard baudrates and
also nonstandard up to the 6 MBaud. U-Boot's A3720 UART driver can use
baudrates from 300 Baud to 6 MBaud.
This changes all A3720 boards, since all of them include either
mvebu_armada-37xx.h or turris_mox.h config file.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 25 May 2021 17:42:41 +0000 (19:42 +0200)]
serial: a37xx: Switch to XTAL clock when booting Linux kernel
Unfortunately the UART driver in current Linux for Armada 3700 expects
UART's parent clock to be XTAL and calculats baudrate divisor according
to XTAL clock. Therefore we must switch back to XTAL clock before
booting kernel.
Implement .remove method for this driver with DM_FLAG_OS_PREPARE flag
set.
If current baudrate is unsuitable for XTAL clock then we do not change
anything. This can only happen if the user either configured unsupported
settings or knows what they are doing and has kernel patches which allow
usage of non-XTAL parent clock.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 25 May 2021 17:42:40 +0000 (19:42 +0200)]
serial: a37xx: Use TBG as parent clock
Using TBG clock as parent clock for UART allows us using higher
baudrates than 230400.
Turris MOX with external FT232RL USB-UART works fine up to 3 MBaud
(which is maximum for this USB-UART controller), while EspressoBIN with
integrated pl2303 USB-UART also works fine up to 6 MBaud.
Slower baudrates with TBG as a parent clock can be achieved by
increasing TBG dividers and oversampling divider. When using the slowest
TBG clock, minimal working baudrate is 300.
Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 25 May 2021 17:42:39 +0000 (19:42 +0200)]
clk: armada-37xx: Set DM_FLAG_PRE_RELOC
Setting DM_FLAG_PRE_RELOC for Armada 3720 clock drivers (TBG and
peripheral clocks) makes it possible for serial driver to retrieve clock
rates via clk API.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 25 May 2021 17:42:38 +0000 (19:42 +0200)]
serial: a37xx: Fix parent clock rate value and divider calculation
UART parent clock is by default the platform's xtal clock, which is
25 MHz.
The value defined in the driver, though, is 25.8048 MHz. This is a hack
for the suboptimal divisor calculation
Divisor = UART clock / (16 * baudrate)
which does not use rounding division, resulting in a suboptimal value
for divisor if the correct parent clock rate was used.
Change the code for divisor calculation to round to closest value, i.e.
Divisor = Round(UART clock / (16 * baudrate))
and change the parent clock rate value to that returned by
get_ref_clk().
This makes A3720 UART stable at standard UART baudrates between 1800 and
230400.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
- Remove a large number of platforms that did not migrate to DM_PCI or
DM_USB by 2 years past the migration deadline and do not have a
migration imminent.
Tom Rini [Sat, 22 May 2021 12:47:14 +0000 (08:47 -0400)]
arm: Remove spear600 boards and the rest of SPEAr support
These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM. Remove them. As this is
the last of the SPEAr platforms, so remove the rest of the remaining
support as well.
Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 22 May 2021 12:47:13 +0000 (08:47 -0400)]
arm: Remove spear320 boards
These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM. Remove them. As this is
also the last SPEAR3XX platform, remove that symbol as well.
Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 22 May 2021 12:47:06 +0000 (08:47 -0400)]
mx6memcal: Disable USB GADGET in SPL
As this board does not use CONFIG_OF_CONTROL and the DM_USB migration
deadline has passed, disable USB_GADGET support.
Cc: Eric Nelson <eric@nelint.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Eric Nelson <eric@nelint.com>
Tom Rini [Sun, 23 May 2021 14:58:05 +0000 (10:58 -0400)]
ppc: Remove T4160RDB board
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the last
ARCH_T4160 platform, remove that support as well.
Tom Rini [Sat, 15 May 2021 01:34:27 +0000 (21:34 -0400)]
ppc: Remove MPC8315ERDB board
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the last
ARCH_MPC8315 platform, remove that support as well.
Tom Rini [Sat, 15 May 2021 01:34:26 +0000 (21:34 -0400)]
ppc: Remove sbc8641d board
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. This is also the last
of the ARCH_MPC8641/MPC8610 platforms, so remove that support as well.
Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 15 May 2021 01:34:25 +0000 (21:34 -0400)]
ppc: Remove xpedite boards
These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove them. As this includes
the last ARCH_MPC8572 platform, remove that as well.
Cc: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tom Rini [Sat, 15 May 2021 01:34:23 +0000 (21:34 -0400)]
ppc: Remove MPC8568MDS board
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the last
ARCH_MPC8568 platform, remove that support as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 15 May 2021 01:34:22 +0000 (21:34 -0400)]
ppc: Remove T1023RBD boards and T1024RDB_SECURE_BOOT
These boards have not been converted to CONFIG_DM_PCI by the deadline
and is also missing conversion to CONFIG_DM. Remove them. As this is
the only ARCH_T1023 platform left, remove that support as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 15 May 2021 01:34:21 +0000 (21:34 -0400)]
ppc: Remove MPC8555CDS boards
These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove them. As this is the only
ARCH_MPC8555 platform left, remove that support as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 15 May 2021 01:34:20 +0000 (21:34 -0400)]
ppc: Remove MPC8541CDS board
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the only
MPC8541 target left, remove that architecture support as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 15 May 2021 01:34:10 +0000 (21:34 -0400)]
m68k: Remove M5475x boards
These board has not been converted to CONFIG_DM_PCI by the deadline.
Remove them. As this is the last of the mcf547x_8x family of boards,
remove that support as well.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 15 May 2021 01:34:09 +0000 (21:34 -0400)]
m68k: Remove M5485 boards
These board has not been converted to CONFIG_DM_PCI by the deadline.
Remove them. As this is all of the CONFIG_M548x platforms as well,
remove that code.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 2 Jul 2021 14:41:58 +0000 (10:41 -0400)]
Azure/GitLab: Move to gcc-11.1.0 and LLVM-11
- Move to gcc-11.1.0 builds from kernel.org for supported platforms and
LLVM-11 for those tests.
- As Heinrich has noted, the RISC-V platform specification has a profile
OS-A for running rich operating systems like Linux and BSD. This profile
requires 64bit and UEFI conforming to the EBBR. Only the 'embedded'
profile may use 32bit. Given this, drop grub for 32bit RISC-V as it no
longer compiles with gcc-11.1 and upstream is unlikely to fix it:
https://www.mail-archive.com/grub-devel@gnu.org/msg30736.html
- Update to grub-2.06 release to address other issues of building with
gcc-11.1.
- Update to newer Xtensa (gcc-9.2.0) and ARC (gcc-10.2) toolchains
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Rick Chen <rick@andestech.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Wed, 7 Jul 2021 07:36:26 +0000 (15:36 +0800)]
x86: Drop _X86EMU_env definition when CONFIG_BIOSEMU is used
With x86 we can execute an option ROM either natively or using the
x86 emulator (if enabled with CONFIG_BIOSEMU). Both of these share
the _X86EMU_env variable, with the native code using it to hold
register state during interrupt processing.
At present, in 32-bit U-Boot, the variable is declared twice, once
in common code and once in code only compiled with CONFIG_BIOSEMU.
With GCC 11 this causes a 'multiple definitions' error on boards
with CONFIG_BIOSEMU.
Drop the emulator definition when CONFIG_BIOSEMU is used.
projects / u-boot.git / log