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11 years agoREADME: qspi usecase and testing documentation.
Poddar, Sourav [Mon, 7 Oct 2013 10:23:04 +0000 (15:53 +0530)]
README: qspi usecase and testing documentation.

Contains documentation and testing details for qspi flash
interface.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
11 years agodra7xx_evm: add SPL API, QSPI, and serial flash support
Matt Porter [Mon, 7 Oct 2013 10:23:03 +0000 (15:53 +0530)]
dra7xx_evm: add SPL API, QSPI, and serial flash support

Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
11 years agospi: add TI QSPI driver
Matt Porter [Mon, 7 Oct 2013 10:23:02 +0000 (15:53 +0530)]
spi: add TI QSPI driver

Adds a SPI master driver for the TI QSPI peripheral.
- Added quad read support.
- Added memory mapped support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Add memory mapped read support
Poddar, Sourav [Mon, 7 Oct 2013 10:23:01 +0000 (15:53 +0530)]
sf: Add memory mapped read support

Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.

This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
 transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".

This will enable the spi controller to do memory mapped configurations
if required.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
11 years agoarmv7: hw_data: change clock divider setting.
Poddar, Sourav [Mon, 7 Oct 2013 10:23:00 +0000 (15:53 +0530)]
armv7: hw_data: change clock divider setting.

Clock requirement for qspi clk is 192 Mhz.
According to the below formulae,

f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)

fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz
For clockoutx2_Hmn to be 768, hmn + 1 should be 4.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
11 years agoomap5: add qspi support
Matt Porter [Mon, 7 Oct 2013 10:22:59 +0000 (15:52 +0530)]
omap5: add qspi support

Add QSPI definitions and clock configuration support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
11 years agosf: probe: Add support for EN25S64
Priyanka Jain [Thu, 3 Oct 2013 15:37:00 +0000 (21:07 +0530)]
sf: probe: Add support for EN25S64

Add support for EON EN25S64 SPI flash.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agodoc: SPI: Add status.txt for tracking SPI subsys status
Jagannadha Sutradharudu Teki [Thu, 26 Sep 2013 10:25:52 +0000 (15:55 +0530)]
doc: SPI: Add status.txt for tracking SPI subsys status

doc/SPI/status.txt added to track the u-boot SPI subsystem status.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Rename spi_flash files
Jagannadha Sutradharudu Teki [Thu, 26 Sep 2013 10:30:15 +0000 (16:00 +0530)]
sf: Rename spi_flash files

Renamed:
spi_flash.c -> sf.c
spi_flash_internal.h -> sf_internal.h
spi_flash_ops.c -> sf_ops.c
spi_flash_probe.c -> sf_probe.c

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agospi: spi cleanups
Jagannadha Sutradharudu Teki [Wed, 25 Sep 2013 10:17:36 +0000 (15:47 +0530)]
spi: spi cleanups

- Rearranged multi-line comment style.
- Add tabs.
- Add spaces.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: spi_flash cleanups
Jagannadha Sutradharudu Teki [Wed, 2 Oct 2013 14:08:49 +0000 (19:38 +0530)]
sf: spi_flash cleanups

More cleanups on spi_flash side:
- Removed unneeded comments.
- Rearranged macros in proper location.
- Rearranged func declerations
- Renamed few function names.
- Added License headers.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Remove spi_flash_do_alloc references
Jagannadha Sutradharudu Teki [Wed, 7 Aug 2013 16:06:25 +0000 (21:36 +0530)]
sf: Remove spi_flash_do_alloc references

Added a support for common probe, hence removed removed
spi_flash_do_alloc reference.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for MX25L51235F
Jagannadha Sutradharudu Teki [Wed, 28 Aug 2013 09:19:13 +0000 (14:49 +0530)]
sf: probe: Add support for MX25L51235F

Add support for Macronix MX25L51235F SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for MX25L25635F
Jagannadha Sutradharudu Teki [Wed, 28 Aug 2013 09:16:49 +0000 (14:46 +0530)]
sf: probe: Add support for MX25L25635F

Add support for Macronix MX25L25635F SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: ops: Add static qualifier to spi_flash_cmd_bankaddr_write
Jagannadha Sutradharudu Teki [Wed, 28 Aug 2013 09:27:03 +0000 (14:57 +0530)]
sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_write

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Print erase_size while printing flash details
Jagannadha Sutradharudu Teki [Sun, 15 Sep 2013 17:36:12 +0000 (23:06 +0530)]
sf: probe: Print erase_size while printing flash details

Included erase_size while printing probed flash details.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Use print_size arg as page_size
Jagannadha Sutradharudu Teki [Sun, 15 Sep 2013 17:34:16 +0000 (23:04 +0530)]
sf: probe: Use print_size arg as page_size

Use flash->page_size arg in print_size() instead of
flash->sector_size while printing detected flas part details.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for S25FL512S_256K
Jagannadha Sutradharudu Teki [Wed, 28 Aug 2013 06:48:56 +0000 (12:18 +0530)]
sf: probe: Add support for S25FL512S_256K

Add support for Spansion S25FL512S_256K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for S25FL256S_256K
Jagannadha Sutradharudu Teki [Wed, 28 Aug 2013 06:47:56 +0000 (12:17 +0530)]
sf: probe: Add support for S25FL256S_256K

Add support for Spansion S25FL256S_256K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for EN25Q64
Jagannadha Sutradharudu Teki [Tue, 6 Aug 2013 10:50:23 +0000 (16:20 +0530)]
sf: probe: Add support for EN25Q64

Add support for EON EN25Q64 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Remove unneeded flash drivers files
Jagannadha Sutradharudu Teki [Thu, 29 Aug 2013 13:58:09 +0000 (19:28 +0530)]
sf: Remove unneeded flash drivers files

Now the common probing is handled in spi_flash_probe.c
hence removed the unneeded flash drivers.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: ramtron: Add support for separate flash driver
Jagannadha Sutradharudu Teki [Tue, 24 Sep 2013 10:33:45 +0000 (16:03 +0530)]
sf: ramtron: Add support for separate flash driver

Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Add proper comment style on spi_flash structure
Jagannadha Sutradharudu Teki [Sat, 28 Sep 2013 12:40:43 +0000 (18:10 +0530)]
sf: Add proper comment style on spi_flash structure

Added proper comment style on spi_flash structure to make
more readable.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Simply the BAR configuration logic
Jagannadha Sutradharudu Teki [Thu, 26 Sep 2013 08:54:58 +0000 (14:24 +0530)]
sf: probe: Simply the BAR configuration logic

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for flag status polling
Jagannadha Sutradharudu Teki [Wed, 2 Oct 2013 14:07:43 +0000 (19:37 +0530)]
sf: probe: Add support for flag status polling

From Micron, 512MB onwards, flash requires to poll flag status
instead of read status- hence added E_FSR flag on spectific
flash parts.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for erase sector selection flag
Jagannadha Sutradharudu Teki [Wed, 2 Oct 2013 14:06:58 +0000 (19:36 +0530)]
sf: probe: Add support for erase sector selection flag

SECT_4K, SECT_32K and SECT_64K opeartions are performed to
to specific flash by adding a SECT* flag on respective
spi_flash_params.flag param.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support to clear flash BP# bits
Jagannadha Sutradharudu Teki [Thu, 26 Sep 2013 07:46:45 +0000 (13:16 +0530)]
sf: probe: Add support to clear flash BP# bits

Few of the flashes(Atmel, Macronix and SST) require to
clear BP# bits in flash power ups.

So clear these BP# bits at probe time, so-that the flash
is ready for user operations.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for SST_WP
Jagannadha Sutradharudu Teki [Wed, 2 Oct 2013 14:04:53 +0000 (19:34 +0530)]
sf: probe: Add support for SST_WP

Most of the SST flashes needs to write up using SST_WP, AAI
Word Program, so added a flag param on spi_flash_params table.

SST flashes, which supports SST_WP need to use a WP write
sst_write_wp instead of common flash write.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Give proper spacing on flash table params
Jagannadha Sutradharudu Teki [Sat, 28 Sep 2013 11:36:03 +0000 (17:06 +0530)]
sf: probe: Give proper spacing on flash table params

Given proper spacing between flash table params.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for AT45DB* flash parts
Jagannadha Sutradharudu Teki [Tue, 6 Aug 2013 14:31:08 +0000 (20:01 +0530)]
sf: probe: Add support for AT45DB* flash parts

Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for SST25* flash parts
Jagannadha Sutradharudu Teki [Mon, 5 Aug 2013 12:06:02 +0000 (17:36 +0530)]
sf: probe: Add support for SST25* flash parts

Added SST25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
11 years agosf: probe: Add support for S25FL* flash parts
Jagannadha Sutradharudu Teki [Sat, 28 Sep 2013 11:19:37 +0000 (16:49 +0530)]
sf: probe: Add support for S25FL* flash parts

Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for W25* flash parts
Jagannadha Sutradharudu Teki [Sat, 28 Sep 2013 11:27:56 +0000 (16:57 +0530)]
sf: probe: Add support for W25* flash parts

Added W25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for MX25L* flash parts
Jagannadha Sutradharudu Teki [Mon, 5 Aug 2013 11:56:16 +0000 (17:26 +0530)]
sf: probe: Add support for MX25L* flash parts

Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for GD25* flash parts
Jagannadha Sutradharudu Teki [Mon, 5 Aug 2013 10:50:27 +0000 (16:20 +0530)]
sf: probe: Add support for GD25* flash parts

Added GD25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for EN25Q* flash parts
Jagannadha Sutradharudu Teki [Tue, 6 Aug 2013 14:30:00 +0000 (20:00 +0530)]
sf: probe: Add support for EN25Q* flash parts

Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add support for M25P* flash parts
Jagannadha Sutradharudu Teki [Mon, 5 Aug 2013 10:47:37 +0000 (16:17 +0530)]
sf: probe: Add support for M25P* flash parts

Added M25P* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: probe: Add new spi_flash_probe support
Jagannadha Sutradharudu Teki [Tue, 24 Sep 2013 10:31:23 +0000 (16:01 +0530)]
sf: probe: Add new spi_flash_probe support

Added new spi_flash_probe support, currently added N25Q*
flash part attributes support.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Divide spi_flash into multiple parts
Jagannadha Sutradharudu Teki [Thu, 29 Aug 2013 13:31:56 +0000 (19:01 +0530)]
sf: Divide spi_flash into multiple parts

Divided the spi_flash framework into mutiple parts for
- spi_flash.c:
        spi flash core file, interaction for spi/qspi driver to
        spi_flash framework.
- spi_flash_ops.c
        spi flash preffered operations, erase,write and read.
- spi_flash_probe.c
        spi flash probing, easy to extend probing functionality.

This change will support to extend the functionality in a
proper manner.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Fri, 4 Oct 2013 17:17:48 +0000 (13:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

11 years agoARM: VExpress: enable ARMv7 virt support for VExpress A15
Andre Przywara [Thu, 19 Sep 2013 16:06:46 +0000 (18:06 +0200)]
ARM: VExpress: enable ARMv7 virt support for VExpress A15

To enable hypervisors utilizing the ARMv7 virtualization extension
on the Versatile Express board with the A15 core tile, we add the
required configuration variable.
Also we define the board specific smp_set_cpu_boot_addr() function to
set the start address for secondary cores in the VExpress specific
manner.
There is no need to provide a custom smp_waitloop() function here.

This also serves as an example for what to do when adding support for
new boards.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: extend non-secure switch to also go into HYP mode
Andre Przywara [Thu, 19 Sep 2013 16:06:45 +0000 (18:06 +0200)]
ARM: extend non-secure switch to also go into HYP mode

For the KVM and XEN hypervisors to be usable, we need to enter the
kernel in HYP mode. Now that we already are in non-secure state,
HYP mode switching is within short reach.

While doing the non-secure switch, we have to enable the HVC
instruction and setup the HYP mode HVBAR (while still secure).

The actual switch is done by dropping back from a HYP mode handler
without actually leaving HYP mode, so we introduce a new handler
routine in our new secure exception vector table.

In the assembly switching routine we save and restore the banked LR
and SP registers around the hypercall to do the actual HYP mode
switch.

The C routine first checks whether we are in HYP mode already and
also whether the virtualization extensions are available. It also
checks whether the HYP mode switch was finally successful.
The bootm command part only calls the new function after the
non-secure switch.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: add SMP support for non-secure switch
Andre Przywara [Thu, 19 Sep 2013 16:06:44 +0000 (18:06 +0200)]
ARM: add SMP support for non-secure switch

Currently the non-secure switch is only done for the boot processor.
To enable full SMP support, we have to switch all secondary cores
into non-secure state also.

So we add an entry point for secondary CPUs coming out of low-power
state and make sure we put them into WFI again after having switched
to non-secure state.
For this we acknowledge and EOI the wake-up IPI, then go into WFI.
Once being kicked out of it later, we sanity check that the start
address has actually been changed (since another attempt to switch
to non-secure would block the core) and jump to the new address.

The actual CPU kick is done by sending an inter-processor interrupt
via the GIC to all CPU interfaces except the requesting processor.
The secondary cores will then setup their respective GIC CPU
interface.
While this approach is pretty universal across several ARMv7 boards,
we make this function weak in case someone needs to tweak this for
a specific board.

The way of setting the secondary's start address is board specific,
but mostly different only in the actual SMP pen address, so we also
provide a weak default implementation and just depend on the proper
address to be set in the config file.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: trigger non-secure state switch during bootm execution
Andre Przywara [Thu, 19 Sep 2013 16:06:43 +0000 (18:06 +0200)]
ARM: trigger non-secure state switch during bootm execution

To actually trigger the non-secure switch we just implemented, call
the switching routine from within the bootm command implementation.
This way we automatically enable this feature without further user
intervention.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: add C function to switch to non-secure state
Andre Przywara [Thu, 19 Sep 2013 16:06:42 +0000 (18:06 +0200)]
ARM: add C function to switch to non-secure state

The core specific part of the work is done in the assembly routine
in nonsec_virt.S, introduced with the previous patch, but for the full
glory we need to setup the GIC distributor interface once for the
whole system, which is done in C here.
The routine is placed in arch/arm/cpu/armv7 to allow easy access from
other ARMv7 boards.

We check the availability of the security extensions first.

Since we need a safe way to access the GIC, we use the PERIPHBASE
registers on Cortex-A15 and A7 CPUs and do some sanity checks.
Boards not implementing the CBAR can override this value via a
configuration file variable.

Then we actually do the GIC enablement:
a) enable the GIC distributor, both for non-secure and secure state
   (GICD_CTLR[1:0] = 11b)
b) allow all interrupts to be handled from non-secure state
   (GICD_IGROUPRn = 0xFFFFFFFF)

The core specific GIC setup is then done in the assembly routine.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: add assembly routine to switch to non-secure state
Andre Przywara [Thu, 19 Sep 2013 16:06:41 +0000 (18:06 +0200)]
ARM: add assembly routine to switch to non-secure state

While actually switching to non-secure state is one thing, another
part of this process is to make sure that we still have full access
to the interrupt controller (GIC).
The GIC is fully aware of secure vs. non-secure state, some
registers are banked, others may be configured to be accessible from
secure state only.
To be as generic as possible, we get the GIC memory mapped address
based on the PERIPHBASE value in the CBAR register. Since this
register is not architecturally defined, we check the MIDR before to
be from an A15 or A7.
For CPUs not having the CBAR or boards with wrong information herein
we allow providing the base address as a configuration variable.

Now that we know the GIC address, we:
a) allow private interrupts to be delivered to the core
   (GICD_IGROUPR0 = 0xFFFFFFFF)
b) enable the CPU interface (GICC_CTLR[0] = 1)
c) set the priority filter to allow non-secure interrupts
   (GICC_PMR = 0xFF)

Also we allow access to all coprocessor interfaces from non-secure
state by writing the appropriate bits in the NSACR register.

The generic timer base frequency register is only accessible from
secure state, so we have to program it now. Actually this should be
done from primary firmware before, but some boards seems to omit
this, so if needed we do this here with a board specific value.
The Versatile Express board does not need this, so we remove the
frequency from the configuration file here.

After having switched to non-secure state, we also enable the
non-secure GIC CPU interface, since this register is banked.

Since we need to call this routine also directly from the smp_pen
later (where we don't have any stack), we can only use caller saved
registers r0-r3 and r12 to not mess with the compiler.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: add secure monitor handler to switch to non-secure state
Andre Przywara [Thu, 19 Sep 2013 16:06:40 +0000 (18:06 +0200)]
ARM: add secure monitor handler to switch to non-secure state

A prerequisite for using virtualization is to be in HYP mode, which
requires the CPU to be in non-secure state first.
Add a new file in arch/arm/cpu/armv7 to hold a monitor handler routine
which switches the CPU to non-secure state by setting the NS and
associated bits.
According to the ARM architecture reference manual this should not be
done in SVC mode, so we have to setup a SMC handler for this.
We create a new vector table to avoid interference with other boards.
The MVBAR register will be programmed later just before the smc call.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoARM: prepare armv7.h to be included from assembly source
Andre Przywara [Thu, 19 Sep 2013 16:06:39 +0000 (18:06 +0200)]
ARM: prepare armv7.h to be included from assembly source

armv7.h contains some useful constants, but also C prototypes.
To include it also in assembly files, protect the non-assembly
part appropriately.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
11 years agoPrepare v2013.04-rc4
Tom Rini [Wed, 2 Oct 2013 18:42:08 +0000 (14:42 -0400)]
Prepare v2013.04-rc4

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Wed, 2 Oct 2013 15:45:22 +0000 (11:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

11 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 2 Oct 2013 12:53:27 +0000 (14:53 +0200)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

11 years agoMerge branch 'buildman' of git://git.denx.de/u-boot-x86
Tom Rini [Wed, 2 Oct 2013 12:26:23 +0000 (08:26 -0400)]
Merge branch 'buildman' of git://git.denx.de/u-boot-x86

11 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 2 Oct 2013 06:10:36 +0000 (08:10 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

11 years agobuildman: Allow make flags to be specified for each board
Simon Glass [Mon, 23 Sep 2013 23:35:17 +0000 (17:35 -0600)]
buildman: Allow make flags to be specified for each board

There are a few make options such as BUILD_TAG which can be provided when
building U-Boot. Provide a way for buildman to pass these flags to make
also.

The flags should be in a [make-flags] section and arranged by target name
(the 'target' column in boards.cfg. See the README for more details.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agobuildman: Adjust tests for new boards.cfg format
Simon Glass [Mon, 23 Sep 2013 23:35:16 +0000 (17:35 -0600)]
buildman: Adjust tests for new boards.cfg format

Commit 27af930e9a5c91365ca639ada580b338eabe4989 changed the boards.cfg format
but missed to change the parsing in buildman. A follow-on commit
03c1bb242548e4e9d267d784861ccd69a1887aa0 fixed this but missed fixing the
tests.

This patch updates the tests to fit the new Board constructor.

./tools/buildman/buildman -t
<unittest.result.TestResult run=1 errors=0 failures=0>

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agousb: ehci: Fix test mode for connected ports
Julius Werner [Tue, 24 Sep 2013 17:53:07 +0000 (10:53 -0700)]
usb: ehci: Fix test mode for connected ports

The EHCI controller has some very specific requirements for the USB 2.0
port test modes, which were not closely followed in the initial test
mode commit. It demands that the host controller is completely shut down
(all ports suspended, Run/Stop bit unset) when activating test mode, and
will not work on an already enumerated port.

This patch fixes that by introducing a new ehci_shutdown() function that
closely follows the procedure listed in EHCI 4.14. Also, when we have
such a function anyway, we might as well also use it in
usb_lowlevel_stop() to make the normal host controller shutdown cleaner.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoi.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID
Eric Nelson [Wed, 25 Sep 2013 15:37:44 +0000 (08:37 -0700)]
i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID

This patch adds the pad to i.MX6DQ and changes the i.MX6DLS
declaration to match the Linux kernel declaration.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
11 years agomx6: Fix use of improper value in enable_ipu_clock
Pierre Aubert [Mon, 23 Sep 2013 11:37:20 +0000 (13:37 +0200)]
mx6: Fix use of improper value in enable_ipu_clock

The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize
the CCGR3 register caused an undefined value for CG0.

Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
11 years agomx35pdk: Fix error handling in board_late_init()
Fabio Estevam [Fri, 20 Sep 2013 19:30:50 +0000 (16:30 -0300)]
mx35pdk: Fix error handling in board_late_init()

If smc911x_initialize() fails we should return the error immediately.

While at it, also check the error from cpu_eth_init().

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agomx28evk: Propagate the error if cpu_eth_init() fails
Fabio Estevam [Fri, 20 Sep 2013 19:30:49 +0000 (16:30 -0300)]
mx28evk: Propagate the error if cpu_eth_init() fails

If cpu_eth_init() fails we should return the error immediately.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
11 years agomx28evk: Propagate the error if cpu_eth_init() fails
Fabio Estevam [Fri, 20 Sep 2013 19:30:48 +0000 (16:30 -0300)]
mx28evk: Propagate the error if cpu_eth_init() fails

If cpu_eth_init() fails we should return the error immediately.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agotools/imximage.c: Fix compiling warning
York Sun [Fri, 20 Sep 2013 19:24:44 +0000 (12:24 -0700)]
tools/imximage.c: Fix compiling warning

Convert set_hdr_func(struct imx_header *imxhdr) to set_hdr_func(void)
to get rid of the warning

warning: ‘imxhdr’ is used uninitialized in this function

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agoUSB: gadget: atmel: disconnect before unbind
Bo Shen [Tue, 24 Sep 2013 05:19:24 +0000 (13:19 +0800)]
USB: gadget: atmel: disconnect before unbind

When unbind the gadget driver, need call disconnect first.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
11 years agousb:g_dnl:dfu: Download gadget and DFU function code clean up
Lukasz Majewski [Tue, 17 Sep 2013 13:58:23 +0000 (15:58 +0200)]
usb:g_dnl:dfu: Download gadget and DFU function code clean up

The download gadget code and DFU function lacks of proper declarations
for the case when a target board wants to use only one of available usb
functions.

Moreover the relevant declarations have been moved to consistent
localization (like <dfu.h>).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
11 years agousb:gadget:Remove redundant #includes for USB composite gadget and its functions
Lukasz Majewski [Tue, 17 Sep 2013 13:58:22 +0000 (15:58 +0200)]
usb:gadget:Remove redundant #includes for USB composite gadget and its functions

Only the <linux/usb/gadget.h> requires error.h include. Hence, several
includes of error.h at USB gadget functions are not needed.

Moreover unnecessary malloc.h includes were also removed.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
11 years agousb:g_dnl:ums: Conditional compilation for mass storage function (f_mass_storage)
Lukasz Majewski [Tue, 17 Sep 2013 13:58:21 +0000 (15:58 +0200)]
usb:g_dnl:ums: Conditional compilation for mass storage function (f_mass_storage)

The mass storage composite function is now compiled in only when
CONFIG_USB_GADGET_MASS_STORAGE is defined.
Such change provides binary size reduction for boards which use USB
download gadget (like am335x_evm) with DFU, but don't use UMS.

For example at am335x_evm board reduction is more than 2KiB for
text and around 120B for data.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
11 years agoam335x_evm: enable DFU RAM
Afzal Mohammed [Tue, 17 Sep 2013 19:45:48 +0000 (01:15 +0530)]
am335x_evm: enable DFU RAM

Enable DFU for RAM, provide example dfu_alt_info

Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
11 years agodfu: ram support
Afzal Mohammed [Tue, 17 Sep 2013 19:45:24 +0000 (01:15 +0530)]
dfu: ram support

DFU spec mentions it as a method to upgrade firmware (software stored
in writable non-volatile memory). It also says other potential uses of
DFU is beyond scope of the spec.

Here such a beyond the scope use is being attempted - directly pumping
binary images from host via USB to RAM. This facility is a developer
centric one in that it gives advantage over upgrading non-volatile
memory for testing new images every time during development and/or
testing.

Directly putting image onto RAM would speed up upgrade process. This and
convenience was the initial thoughts that led to doing this, speed
improvement over MMC was only 1 second though - 6 sec on RAM as opposed
to 7 sec on MMC in beagle bone, perhaps enabling cache and/or optimizing
DFU framework to avoid multiple copy for ram (if worth) may help, and
on other platforms and other boot media like NAND maybe improvement
would be higher.

And for a platform that doesn't yet have proper DFU suppport for
non-volatile media's, DFU to RAM can be used.

Another minor advantage would be to increase life of mmc/nand as it
would be less used during development/testing.

usage: <image name> ram <start address> <size>
eg. kernel ram 0x81000000 0x1000000

Downloading images to RAM using DFU is not something new, this is
acheived in openmoko also.

DFU on RAM can be used for extracting RAM contents to host using dfu
upload. Perhaps this can be extended to io for squeezing out register
dump through usb, if it is worth.

Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Gerhard Sittig <gsi@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Heiko Schocher <hs@denx.de>
11 years agodfu: unify mmc/nand read/write ops enum
Afzal Mohammed [Tue, 17 Sep 2013 19:44:50 +0000 (01:14 +0530)]
dfu: unify mmc/nand read/write ops enum

MMC and NAND independently defines same enumerators for read/write.
Unify them by defining enum in dfu header. RAM support that is being
added newly also can make use of it.

Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
11 years agodfu: Extract common DFU code to handle "dfu_alt_info" environment variable
Lukasz Majewski [Wed, 11 Sep 2013 12:53:35 +0000 (14:53 +0200)]
dfu: Extract common DFU code to handle "dfu_alt_info" environment variable

New dfu_init_env_entities() function has been extracted from cmd_dfu.c and
stored at dfu core.

This is a dfu centric code, so it shall be processed in the core.

Change-Id: I756c5de922fa31399d8804eaadc004ee98844ec2
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Heiko Schocher <hs@denx.de>
11 years agoARM: atmel: add RNDIS gadget support
Bo Shen [Wed, 11 Sep 2013 10:24:51 +0000 (18:24 +0800)]
ARM: atmel: add RNDIS gadget support

Add RNDIS gadget support to test atmel usba udc driver

Signed-off-by: Bo Shen <voice.shen@atmel.com>
11 years agoARM: atmel: correct UDPHS name
Bo Shen [Wed, 11 Sep 2013 10:24:50 +0000 (18:24 +0800)]
ARM: atmel: correct UDPHS name

Correct the UDPHS name from UDHPS

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Marek Vasut <marex@denx.de>
11 years agoUSB: gadget: add atmel usba udc driver
Bo Shen [Wed, 11 Sep 2013 10:24:49 +0000 (18:24 +0800)]
USB: gadget: add atmel usba udc driver

Add atmel usba udc driver support, porting from Linux kernel

The original code in Linux Kernel information is as following

commit e01ee9f509a927158f670408b41127d4166db1c7
Author: Jingoo Han <jg1.han@samsung.com>
Date:   Tue Jul 30 17:00:51 2013 +0900

    usb: gadget: use dev_get_platdata()

    Use the wrapper function for retrieving the platform data instead of
    accessing dev->platform_data directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
11 years agousb: gadget: config: fix unaligned access issues
Troy Kisky [Wed, 11 Sep 2013 10:24:48 +0000 (18:24 +0800)]
usb: gadget: config: fix unaligned access issues

As seen with codesourcery compiler 2010q1, the buf pointer in
usb_request structure is not aligned on 4 bytes boundary causing
data aborts in eth_setup -> conf_buf -> usb_gadget_config_buf.
Make it as align access to fix this issue.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
[voice.shen@atmel.com: add commit message]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
11 years agodfu: Make maximum DFU file size equal to default DFU data buffer
Lukasz Majewski [Tue, 10 Sep 2013 13:29:23 +0000 (15:29 +0200)]
dfu: Make maximum DFU file size equal to default DFU data buffer

Up till now the DFU maximum file size (to be written to e.g. eMMC)
was different from the DFU data buffer size. It caused errors when
one buffer was smaller than data to be written.

Now, the maximum DFU file size is equal to default DFU buffer size.
In spite of this, user is still able to manually adjust those default
values.

Change-Id: Ied75d0f7b59588ebd79dae9a22af801d36622216
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
11 years agodfu:cosmetic: Fix printf text for buffer overflow condition
Lukasz Majewski [Tue, 10 Sep 2013 13:29:22 +0000 (15:29 +0200)]
dfu:cosmetic: Fix printf text for buffer overflow condition

Correct error message if overflow is detected.

Change-Id: I8a915c7353d49822c046fbc36241237b370e6c98
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
11 years agousb: gadget: Fix data aborts during USB ethernet boot
Joel Fernandes [Wed, 4 Sep 2013 23:55:14 +0000 (18:55 -0500)]
usb: gadget: Fix data aborts during USB ethernet boot

As seen on GCC 4.6 Linaro compiler, control_req buffer is not aligned
on 4 byte boundaray causing data aborts in eth_setup -> conf_buf
during dhcp boot over usb_ether. Fix the issue my aligning control_req
buffer using DEFINE_CACHE_ALIGN_BUFFER.

Tested on am335x_evm platform (beaglebone).
Applies on 2013.10-rc1 branch.

Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Joel Fernandes <joelf@ti.com>
11 years agoSound: MAX98095: Support I2S0 channel
Dani Krishna Mohan [Wed, 11 Sep 2013 11:08:50 +0000 (16:38 +0530)]
Sound: MAX98095: Support I2S0 channel

This patch modifies the MAX98095 audio codec to support
 I2S0 channel in codec slave mode.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
11 years agoSound: I2S: Replacing I2S1 with I2S0 channel.
Dani Krishna Mohan [Wed, 11 Sep 2013 11:08:49 +0000 (16:38 +0530)]
Sound: I2S: Replacing I2S1 with I2S0 channel.

This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
11 years agoARM: Added I2S0 clocks for audio
Dani Krishna Mohan [Wed, 11 Sep 2013 11:08:48 +0000 (16:38 +0530)]
ARM: Added I2S0 clocks for audio

This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
11 years agoDTS: Addition of I2S0 channel and replacing I2S1
Dani Krishna Mohan [Wed, 11 Sep 2013 11:08:47 +0000 (16:38 +0530)]
DTS: Addition of I2S0 channel and replacing I2S1

This patch enables default I2S0 channel.And I2S platform
parameter has been moved to a common file viz exynos5.dtsi.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
11 years agoSound: WM8994: Support I2S0 channel
Dani Krishna Mohan [Wed, 11 Sep 2013 11:08:46 +0000 (16:38 +0530)]
Sound: WM8994: Support I2S0 channel

This patch modifies the WM8994 codec to support I2S0 channel
in codec slave mode

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
11 years agocmd_pxe.c: Pass along 'cmdtp' to do_bootm()/do_bootz()
Tom Rini [Tue, 24 Sep 2013 13:05:08 +0000 (09:05 -0400)]
cmd_pxe.c: Pass along 'cmdtp' to do_bootm()/do_bootz()

When we call do_bootm() with a vmlinuz, this would lead to a NULL
pointer dereference, and after talking with Wolfgang the right thing to
do here for now is to make sure that we pass cmdtp to these functions
rather than NULL.

Reported-by: Steven A. Falco <stevenfalco@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agocmd_bootm.c: Only pass BOOTM_STATE_OS_CMDLINE on PowerPC/MIPS
Tom Rini [Mon, 23 Sep 2013 18:20:37 +0000 (14:20 -0400)]
cmd_bootm.c: Only pass BOOTM_STATE_OS_CMDLINE on PowerPC/MIPS

In 5c427e4 we pass BOOTM_STATE_OS_CMDLINE as part of the bootm states to
run, on all arches.  However, this is only valid / useful on PowerPC and
MIPS, and causes a problem on ARM where we specifically do not use it.
Rather than make this state fake pass like we do for GO on some arches
(which need updating to use the GO state), we should just not pass
CMDLINE except when it may be used, like before.

Tested-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoREADME: update ARM register usage
Jeroen Hofstee [Sat, 21 Sep 2013 12:04:42 +0000 (14:04 +0200)]
README: update ARM register usage

Besides the change of this patchset it also updates the
README to reflect that GOT-generated relocations are no
longer supported on ARM.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
11 years agoARM: use r9 for gd
Jeroen Hofstee [Sat, 21 Sep 2013 12:04:41 +0000 (14:04 +0200)]
ARM: use r9 for gd

To be more EABI compliant and as a preparation for building
with clang, use the platform-specific r9 register for gd
instead of r8.

note: The FIQ is not updated since it is not used in u-boot,
and under discussion for the time being.

The following checkpatch warning is ignored:
WARNING: Use of volatile is usually wrong: see
Documentation/volatile-considered-harmful.txt

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

11 years agoARM,relocate: do not use r9
Jeroen Hofstee [Sat, 21 Sep 2013 12:04:40 +0000 (14:04 +0200)]
ARM,relocate: do not use r9

r9 is a platform-specific register in ARM EABI and not per
definition a general purpose register. Do not use it while
relocating so it can be used for gd.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
11 years agoARM: refactor compiler options in config.mk
Masahiro Yamada [Sat, 7 Sep 2013 08:42:37 +0000 (17:42 +0900)]
ARM: refactor compiler options in config.mk

Every ARM cpu config.mk (arch/arm/cpu/{CPUDIR}/config.mk) defines:

PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float

So, this patch moves the common compiler options to arch/arm/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
11 years agoarm: zynq: Fix timer loadaddress
Michal Simek [Wed, 28 Aug 2013 05:36:31 +0000 (07:36 +0200)]
arm: zynq: Fix timer loadaddress

Reload address was written to the counter register
instead of load register.
The problem happens when timer expires but never
reload to ~0UL (it is downcount timer).

Reported-by: Stephen MacMahon <stephenm@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agoarm: prevent using movt/movw address loads
Jeroen Hofstee [Sat, 24 Aug 2013 11:55:38 +0000 (13:55 +0200)]
arm: prevent using movt/movw address loads

The movt/movw instruction can be used to hardcode an
memory location in the instruction itself. The linker
starts complaining about this if the compiler decides
to do so: "relocation R_ARM_MOVW_ABS_NC against `a local
symbol' can not be used" and it is not support by U-boot
as well. Prevent their use by requiring word relocations.
This allows u-boot to be build at other optimalization
levels then -Os.

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: TigerLiu@viatech.com.cn
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoam335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot.
Robert P. J. Day [Mon, 9 Sep 2013 16:27:25 +0000 (12:27 -0400)]
am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot.

If, in CONFIG_BOOTCOMMAND, the environment switches both the mmcdev
and bootpart variables to refer to MMC device 1, it would make sense
that the mmcroot env variable should switch to that device as well.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
11 years agonet, phy, cpsw: fix NULL pointer deference
Heiko Schocher [Thu, 5 Sep 2013 09:50:41 +0000 (11:50 +0200)]
net, phy, cpsw: fix NULL pointer deference

if phy_connect() did not find a phy, phydev is NULL and
following code in cpsw_phy_init() crashes. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agoARM: OMAP5: Avoid writing into LDO SRAM bits
Lokesh Vutla [Fri, 23 Aug 2013 12:04:17 +0000 (17:34 +0530)]
ARM: OMAP5: Avoid writing into LDO SRAM bits

Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten as they are loaded from EFUSE. So avoid
writing into these registers.

Boot tested on OMAP5432 ES2.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
11 years agoARM: DRA7: Enable saveenv command
Lokesh Vutla [Fri, 23 Aug 2013 11:57:04 +0000 (17:27 +0530)]
ARM: DRA7: Enable saveenv command

dra7xx_evm has eMMC and the default environment can be stored in it.
So enabling saveenv command and the configs to store environment in eMMC.

Tested on DRA752 ES1.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
11 years agoam335x:Handle worst case scenario for Errata 1.0.24
Steve Kipisz [Wed, 14 Aug 2013 14:51:31 +0000 (10:51 -0400)]
am335x:Handle worst case scenario for Errata 1.0.24

In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.

Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Adapt to current framework]
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam335x_evm: am33xx_spl_board_init function and scale core frequency
Tom Rini [Fri, 30 Aug 2013 20:28:46 +0000 (16:28 -0400)]
am335x_evm: am33xx_spl_board_init function and scale core frequency

Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on.  In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed.  In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later than rev A1, and then we can ramp up to the PG1.0 maximum
of 720Mhz.  In the case of Beaglebone Black, we are either on PG2.0 that
supports 1GHz or PG2.1.  As PG2.0 may or may not have efuse_sma set, we
cannot rely on this probe.  In the case of the GP EVM, EVM SK and IDK we
need to rely on the efuse_sma if we are on PG2.1, and the defaults for
PG1.0/2.0.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Fri, 20 Sep 2013 18:06:10 +0000 (14:06 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

11 years agoFix wrong sdhci host control register read and write
Juhyun \(Justin\) Oh [Fri, 13 Sep 2013 18:06:00 +0000 (18:06 +0000)]
Fix wrong sdhci host control register read and write

The patch fixes the improper read and write of sdhci
host control register for sdma transfer.

The problem comes when reading and writing 1 byte long
host control register with the sdhci_readl() and
sdhci_writel(). The misuse of these functions overwrite
the value of the next registers which are in 4 bytes boundary.

This patch replaces four byte register read/write functions
with one byte read/write ones. Beside, it eliminates
unnecessary bit operation. i.e. or-ing zero against a variable.

Signed-off-by: Juhyun (Justin) Oh <Juhyun_Oh@sigmadesigns.com>
11 years agoAdd parentheses to ALLOC_ALIGN_BUFFER macro's
Mischa Jonker [Fri, 26 Jul 2013 14:18:41 +0000 (16:18 +0200)]
Add parentheses to ALLOC_ALIGN_BUFFER macro's

Without those it's very easy to make mistakes when for instance
the 'size' field is more than just a constant.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Anton Staaf <robotboy@chromium.org>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
11 years agommc/dw_mmc: Allocate the correct amount of descriptors
Mischa Jonker [Fri, 26 Jul 2013 14:18:40 +0000 (16:18 +0200)]
mmc/dw_mmc: Allocate the correct amount of descriptors

This fixes two issues:
 * a descriptor was allocated for every block, while a descriptor can
   take 8 blocks
 * there was an off-by-one error in the descriptor preparation: there
   were two last descriptors, one with length==0

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>