Christophe Leroy [Sat, 28 Jan 2023 12:53:10 +0000 (13:53 +0100)]
powerpc/mpc8xx: Zero boot_flags arg for calling board_init_f()
Copied from e83a7e94532 ("powerpc/mpc83xx: Zero boot_flags arg for
calling board_init_f()")
The argument boot_flags of board_init_f() is not used at all in the
powerpc specific board.c init sequence. Now with the generic init
sequence, this boot_flags arg is used by board_init_f().
This patch sets the r3 register that is used to pass the boot_flags
argument from the start.S board_init_f() call to 0 prior to the function
call to avoid unknown content to end up in gd->flags.
[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.
Marking TPL build makes it not able to build u-boot.itb on
RK356x targets so revert this so that it can build an SPL build
that would support all across Rockchip platforms.
Tom Rini [Fri, 27 Jan 2023 19:48:22 +0000 (14:48 -0500)]
Merge branch '2023-01-27-apple-soc-updates'
First, to quote the author:
This series adds support for the PCIe controller found on Apple M1 and
M2 machines and enables support for PCIe XHCI controllers. This makes
the type-A USB ports on the M1 Mac mini work. Since the use of Apples
DART IOMMU is mandatory (these PCIe DARTs don't support bypass mode),
this adds DMA mapping operations to the IOMMU uclass and implements
them for the Apple DART. It modifies the XHCI driver code to go map
DMA buffers through the IOMMU if there is one. Since the M1 Mac mini
now has two types of XHCI controllers with different number of ports
(2 for the DWC3 controllers, 8 for the Fresco Logic PCIe controller)
this uncovered an issue in with the way the hub descriptor is
implemented in the XHCI driver.
Second, Mark also fixes some Apple-specific instances of
CONFIG_IS_ENABLED that should be IS_ENABLED.
Tom Rini [Fri, 27 Jan 2023 19:48:14 +0000 (14:48 -0500)]
Merge tag 'efi-2023-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2023-04-rc1-3
Documentation:
* Improve the sl-mx8mm documenation
* Clean up README, move some section to HTML
* Man-pages for the mtime and sleep command
* Description of reducible builds
* Document dynamic event handlers
Mark Kettenis [Sat, 21 Jan 2023 19:28:00 +0000 (20:28 +0100)]
usb: xhci: Fix root hub descriptor
When a system has multiple XHCI controllers, some of the
properties described in the descriptor of the root hub (such as
the number of ports) might differ between controllers. Fix this
by switching from a single global hub descriptor to a hub
descriptor per controller.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Marek Vasut <marex@denx.de>
Mark Kettenis [Sat, 21 Jan 2023 19:27:59 +0000 (20:27 +0100)]
arm: apple: Enable PCIe USB controller
Some Apple Silicon machines have a PCIe XHCI controller in additon
to the DWC3 controllers integrated on the SoC. On the Mac mini
the Type-A ports are handled by this PCIe controller. Enabling
it allows the use of these ports in U-Boot.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Sat, 21 Jan 2023 19:27:56 +0000 (20:27 +0100)]
iommu: Implement mapping IOMMUs for PCI devices
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port. In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree. Parse this property
and use it to find the right IOMMU device for PCI devices.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Sat, 21 Jan 2023 19:27:55 +0000 (20:27 +0100)]
usb: xhci: Implement DMA mapping
An XHCI controller that sits behind an IOMMU needs to map and unmap
its memory buffers to do DMA. Implement this by inroducing new
xhci_dma_map() and xhci_dma_unmap() helper functions. The
xhci_dma_map() function replaces the existing xhci_virt_to_bus()
function in the sense that it returns the bus address in the case
of simple address translation in the absence of an IOMMU. The
xhci_bus_to_virt() function is eliminated by storing the CPU
address of the allocated scratchpad memory in struct xhci_ctrl.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Marek Vasut <marex@denx.de>
Mark Kettenis [Sat, 21 Jan 2023 19:27:52 +0000 (20:27 +0100)]
iommu: Add DMA mapping operations
In order to support IOMMUs in non-bypass mode we need device ops
to map and unmap DMA memory. The map operation enters a mapping
for a region specified by CPU address and size into the translation
table of the IOMMU and returns a DMA address suitable for
programming the device to do DMA. The unmap operation removes
this mapping from the translation table of the IOMMU.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Massimo Pegorer [Thu, 5 Jan 2023 09:31:09 +0000 (10:31 +0100)]
mkimage: fit: Support signed configurations in 'auto' FITs
Extend support for signing in auto-generated (-f auto) FIT. Previously,
it was possible to get signed 'images' subnodes in the FIT using
options -g and -o together with -f auto. This patch allows signing
'configurations' subnodes instead of 'images' ones (which are hashed),
using option -f auto-conf instead of -f auto. Adding also -K <dtb> and
-r options, will add public key to <dtb> file with required = "conf"
property.
Summary:
-f auto => FIT with crc32 images
-f auto -g ... -o ... => FIT with signed images
-f auto-conf -g ... -o ... => FIT with sha1 images and signed confs
Example: FIT with kernel, two device tree files, and signed
configurations; public key (needed to verify signatures) is
added to u-boot.dtb with required = "conf" property.
mkimage -f auto-conf -A arm -O linux -T kernel -C none -a 43e00000 \
-e 0 -d vmlinuz -b /path/to/first.dtb -b /path/to/second.dtb \
-k /folder/with/key-files -g keyname -o sha256,rsa4096 \
-K u-boot.dtb -r kernel.itb
Example: Add public key with required = "conf" property to u-boot.dtb
without needing to sign anything. This will also create a useless FIT
named unused.itb.
Sinthu Raja [Tue, 10 Jan 2023 15:47:58 +0000 (21:17 +0530)]
include: configs: Update env for selecting right dtb
Now that single defconfig shall be used for booting J721S2 EVM and
AM68 SK, the default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Sinthu Raja [Tue, 10 Jan 2023 15:47:56 +0000 (21:17 +0530)]
arm: dts: Add support for A72 specific AM68 Starter Kit Base Board
The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.
Sinthu Raja [Tue, 10 Jan 2023 15:47:55 +0000 (21:17 +0530)]
arm: dts: Add initial support for AM68 Starter Kit System on Module
AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.
AM68 SK supports the following interfaces:
* 16 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.1 Type-C port
* x2 USB 3.1 Type-A ports
* x1 PCIe M.2 M Key
* 512 Mbit OSPI flash
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi GPIO header
SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.
Sinthu Raja [Tue, 10 Jan 2023 15:47:54 +0000 (21:17 +0530)]
board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM
Add the board_init_f API for SPL and run the platform-required SoC
initialization.
Add the functionality for board name-based DTB selection from FIT
within SPL. This will make it easier to utilise one defconfig for
both the EVM and the SK.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Sinthu Raja [Tue, 10 Jan 2023 15:47:53 +0000 (21:17 +0530)]
arch: mach-k3: Update board specific API name to K3 generic API name
Although the board_init_f API initialises the SoC, the API name is
incorrectly specified and misleads the functionality. This file should
only include k3-specific functionality. Change the API's name to something
more K3-specific and separate the function to make it more modular.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Sinthu Raja [Tue, 10 Jan 2023 15:47:51 +0000 (21:17 +0530)]
board: ti: j721s2: Enable support for reading EEPROM at next alternate address
J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Sinthu Raja [Tue, 10 Jan 2023 15:47:49 +0000 (21:17 +0530)]
configs: j721s2_evm: Enable configs to store env in MMC FAT partition
J721S2 EVM used to store env on eMMC, since EVM and SK uses same
defconfig and there is no eMMC on SK, we need to keep env in an
interface which available on both EVM and SK. So, save env in FAT
partition of MMC SD Card.
Enable defconfigs relevant for storing env on FAT partition of MMC.
Sinthu Raja [Tue, 10 Jan 2023 15:47:48 +0000 (21:17 +0530)]
configs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. Add k3-am68-sk-base-board
dtb along with evm dtb inside DTB FIT image. This helps to use same
defconfig for both EVM and SK
Sinthu Raja [Tue, 10 Jan 2023 15:47:47 +0000 (21:17 +0530)]
configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both EVM and SK.
Simon Glass [Wed, 18 Jan 2023 20:13:17 +0000 (13:13 -0700)]
ifwitool: Fix member access
On a second and third look, a recent patch seems to be writing to the
wrong place - updating offsets from the address of the pointer instead
of what the pointer points to.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 2d1b2ac13fe ("tool: ifwitool: Fix buffer overflow") Acked-by: Sean Anderson <seanga2@gmail.com>
Michael Walle [Wed, 18 Jan 2023 12:12:23 +0000 (13:12 +0100)]
pinctrl: get rid of some ifdeffery
Don't define an empty version for pinconfig_post_bind(). Just guard the
call and let the linker garbage collection do the rest. This way, we
also don't have to do any guesswork.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Marek Vasut <marex@denx.de>
Michael Walle [Wed, 18 Jan 2023 12:12:22 +0000 (13:12 +0100)]
pinctrl: don't fall back to pinctrl_select_state_simple()
If CONFIG_PINCTRL_FULL is enabled, never fall back to the simple
implementation. pinctrl_select_state() is called for each device and it
is expected to fail. A fallback to the simple imeplementation doesn't
make much sense.
To keep the return code consistent, we need to change the -EINVAL (which
was ignored before) to -ENOSYS.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
HandleProtocol() is deprecrated. According to the UEFI specification it
should be implemented as a call to OpenProtocolInterface() with a hard
coded agent handle. This implies that we would have to call
CloseProtocolInterfaces() after usage with the same handle.
Getting rid of an EFI_CALL() is also appreciated.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Tue, 24 Jan 2023 06:56:16 +0000 (15:56 +0900)]
eficonfig: increase the number of menu entries
Current eficonfig has the maximum number of menu entries and
it is 99. If there are more EFI load options and files in the
system, eficonfig can not handle it.
This commit increases this maximum number of menu entries
to INT_MAX.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Tue, 24 Jan 2023 06:56:15 +0000 (15:56 +0900)]
eficonfig: add vertical scroll support
The current eficonfig menu does not support vertical scroll,
so it can not display the menu entries greater than
the console row size.
This commit add the vertial scroll support.
The console size is retrieved by
SIMPLE_TEXT_OUTPUT_PROTOCOL.QueryMode() service, then
calculates the row size for menu entry by subtracting
menu header and description row size from the console row size.
"start" and "end" are added in the efimenu structure.
"start" keeps the menu entry index at the top, "end" keeps
the bottom menu entry index. item_data_print() menu function
only draws the menu entry between "start" and "end".
This commit also fixes the issue that "Save" and "Quit"
entries can be moved by BKEY_PLUS in change boot order menu.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Tue, 24 Jan 2023 06:56:14 +0000 (15:56 +0900)]
eficonfig: refactor change boot order implementation
This commit removes the change boot order specific
menu implementation. The change boot order implementation
calls eficonfig_process_common() same as other menus.
The change boot order menu requires own item_data_print
and item_choice implementation, but display_statusline
function can be a same function as other menus.
Masahisa Kojima [Tue, 24 Jan 2023 06:56:13 +0000 (15:56 +0900)]
eficonfig: refactor eficonfig_process_common function
Current change boot order implementation does not call
eficonfig_process_common() and call own menu functions
for display_statusline, item_data_print and item_choice.
Change boot order functionality should call
eficonfig_process_common() to improve maintenanceability.
This commit is a preparation to remove the change boot
order specific implementation. The menu functions
(display_statusline, item_data_print and item_choice) are
added as argument of eficonfig_process_common().
The menu description string displayed at the bottom of
the menu is also added as argument.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Move section 'Directory hierarchy' from file README to the HTML
documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The information is already maintained in doc/develop/release_cycle.rst.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Move the README section to the HTML documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Board configurations are in configs/ and not in the Makefile.
git log is the adequate way to identify who contributed to our source.
scripts/get_maintainer.pl is the correct way to identify maintainers.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Remove description of coding standards and patch submission process.
Link to the relevant HTML documentation instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Fixes: 2851cc94f301 ("dm: Add documentation for host command and implementation") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Use 16 digits on 64 bit systems.
* Use 64 bit patterns on 64 bit systems.
* Expect the sign bit in bit 63 on 64 bit systems.
* Adjust the formatting of a constant.
* Always print result on new line
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Stefan Roese <sr@denx.de>
fru: ops: Display FRU fields properly for 0xc1 fields
FRU data is not displayed properly in case of 0xc1 fields.
The 0xC1 can be used in two cases.
1. Char record type 8-bit ASCII + Latin 1 with length of 1.
(For example board revision 'A')
2. C1h (type/length byte encoded to indicate no more info fields).
which can follow by 00h to fill all remaining unused space
Hence removed the check end-of-the field c1 to allow c1 fields.
"ASCII+LATIN1" is defined as the printable characters from the
first set of 256 characters of Unicode 6.2 (U+0000h through U+00FFh,
inclusive) expressed as an eight-bit value. (Unicode follows ISO/IEC
8859-1 in the layout of printable characters up to U+00FFh).
So, print only printable chars and limit range from 0x20 ' ' to 0x7e '-'
which will be also indication if 0xc1 behaves as record with one char or
end of record.
Michal Simek [Tue, 24 Jan 2023 15:19:28 +0000 (16:19 +0100)]
xilinx: board: Update logic in xilinx_read_eeprom_legacy
When eeprom has random content printing random chars can stuck U-Boot.
That's why update legacy eeprom format decoding algorithm to copy only
maximum amount of chars allocated for fields.
And also print them directly from desc structure.
Previous algorithm was printing strings first directly from eeprom content
and then copy them to desc structure.
Michal Simek [Tue, 24 Jan 2023 15:19:27 +0000 (16:19 +0100)]
xilinx: board: Fix xilinx_eeprom_legacy_cleanup()
When ethernet mac address contains 0x20 or 0xff MAC address is changed and
bytes are converted to zeros. That's why fix decoding algorithm to ignore
fields where MAC address is stored and all non printable chars (including
space) are zeroed.
Stefan Roese [Wed, 25 Jan 2023 07:09:08 +0000 (08:09 +0100)]
net: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()
In our system using ZynqMP with an external SGMII PHY it's necessary
to wait for the PCS link and auto negotiation to finish before the xfer
starts. Otherwise the first packet(s) might get dropped, resulting in a
delay at the start of the ethernet transfers.
This is only done when the PHY link is already up, which is done in
phy_startup(). As waiting for the PHY link bits via pcsstatus does not
make much sense, when the link is not available in general (e.g. no
cable connected).
This patch adds the necessary code including a minimal delay of 1 ms
which fixes problems of dropped first packages.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Michal Simek <michal.simek@amd.com> Cc: Katakam Harini <harini.katakam@amd.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Sean Anderson <sean.anderson@seco.com> Link: https://lore.kernel.org/r/20230125070908.1343256-1-sr@denx.de Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers: mmc: Change datatype of tuning_loop_counter to int
tuning_loop_counter is of char type, which is not capable of handling
the entire data range of this variable. This is pointed by below sparse
warning. Change datatype to int to fix this.
warning: comparison is always false due to limited range of data type.
There is a unused variable ret, due to which we are getting sparse warning
as below.
warning: variable 'ret' set but not used [-Wunused-but-set-variable].
Michal Simek [Thu, 19 Jan 2023 09:46:59 +0000 (10:46 +0100)]
arm64: versal-net: Enable remaking ELF from bin
U-Boot is composing u-boot.bin from u-boot-nodtb.bin with appended
dts/dt.dtb. It means U-Boot doesn't have DTB inside. When REMAKE_ELF is
enabled make will also create u-boot.elf which is recreated from
u-boot.bin. Below is build output for mini configuration how ELF is
recreated.
It is useful to have u-boot.elf present because Xilinx XSDB debugger can
load ELF file and user doesn't need to specify loading address for
u-boot.bin.
Ovidiu Panait [Wed, 25 Jan 2023 16:41:56 +0000 (18:41 +0200)]
microblaze: spl: drop boot_linux
Drop boot_linux variable as it is not assigned anywhere. Now that there is
no variable controlling linux boot in spl_start_uboot(), make this
function always return false when falcon mode is enabled.
Samuel Holland [Sat, 21 Jan 2023 23:25:16 +0000 (17:25 -0600)]
binman: Add 'min-size' entry property
This property sets the minimum size of an entry, including padding but
not alignment. It can be used to reserve space for growth of an entry,
or to enforce a minimum offset for later entries in the section.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sat, 21 Jan 2023 19:02:26 +0000 (19:02 +0000)]
rockchip: Use atf as firmware and move u-boot to loadables in FIT
The FIT generated after the switch to using binman is using different
values for firmware and loadables properties compared to the old script.
With the old script:
firmware = "atf-1";
loadables = "u-boot", "atf-2", ...;
After switch to binman:
firmware = "u-boot";
loadables = "atf-1", "atf-2", ...;
This change result in SPL jumping directly into U-Boot proper instead of
initializing TF-A.
With this patch the properties change back to:
firmware = "atf-1";
loatables = "u-boot", "atf-2", ...;
Fixes: e0c0efff2a02 ("rockchip: Support building the all output files in binman") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sat, 21 Jan 2023 19:02:12 +0000 (19:02 +0000)]
binman: Add support for selecting firmware to use with split-elf
In some cases it is desired for SPL to start TF-A instead of U-Boot
proper. Add support for a new property fit,firmware that picks a
valid entry and prepends the remaining valid entries to the
loadables list generated by the split-elf generator.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sat, 21 Jan 2023 19:01:39 +0000 (19:01 +0000)]
rockchip: Align FIT image data to SD/MMC block length
SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.
This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.
However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.
Aligning the FIT and its external data to MMC block length to work
around such issue.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Takahiro Kuwano [Mon, 19 Dec 2022 01:28:21 +0000 (10:28 +0900)]
mtd: spi-nor: Add support for Infineon s25fs256t
Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
- 4-byte address mode by factory default
- Quad mode is enabled by factory default
- Supports mixture of 128KB and 64KB sectors by OTP configuration
(this patch supports uniform 128KB only)
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If the offset or the size passed to the 'sf erase' command exceeds
the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.
Use the CMD_RET_* constants instead of 0, 1, -1.
Simplify a logical expression in the final return statement.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If the offset or the size passed to the 'sf write' or 'sf read' command
exceeds the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.
Use the CMD_RET_* constants instead of 0, 1, -1.
Simplify a logical expression in the final return statement.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Dhruva Gole [Tue, 3 Jan 2023 06:31:12 +0000 (12:01 +0530)]
spi: cadence_qspi: use STIG mode for small reads
Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.
For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
which provides access to external Flash devices.
The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for
OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit
mode enabled by default.
Thus, by default controller operates in 32 bit mode causing it to always
align all data to 4 bytes from a 4byte aligned address. In some flash
chips like cypress for example if we try to read some regs in DAC mode
then it keeps sending the value of the first register that was requested
and inorder to read the next reg, we have to stop and re-initiate a new
transaction.
This causes wrong register values to be read than what is desired when
registers are read in DAC mode. Hence if the data.nbytes is very less
then prefer STIG mode for such small reads.
Dhruva Gole [Tue, 3 Jan 2023 06:31:11 +0000 (12:01 +0530)]
spi: cadence_qspi: setup ADDR Bits in cmd reads
Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read correct data from flash register that maybe requested by flash
driver because the controller doesn't even specify which address of the
flash register the read is being requested from.
Takahiro Kuwano [Fri, 20 Jan 2023 03:28:22 +0000 (12:28 +0900)]
mtd: spi-nor-core: Make CFRx reg fields generic
Cypress defines two flavors of configuration registers, volatile and
non volatile, and both use the same bit fields. Rename the bitfields in
the configuration registers so that they can be used for both flavors.
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