Simon Glass [Sun, 10 May 2020 20:16:29 +0000 (14:16 -0600)]
bdinfo: mips: Use the generic bd command
MIPS currently has a few extra things which are generally useful. Add them
to the generic function and move MIPS over to use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:28 +0000 (14:16 -0600)]
bdinfo: xtensa: Create a generic do_bdinfo for xtensa
This arch uses only the generic function. It would be nice if all the
archs did the same. As a first step, create a new generic function for the
'bd' command and make xtensa use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 25 Jun 2020 13:33:39 +0000 (09:33 -0400)]
Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2020.10
Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default
ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform
Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board
mmc:
- minor GD pointer removal
net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver
spi:
- Cleanup global macros for xilinx spi drivers
firmware:
- Add support for pmufw reloading
fpga:
- Improve error status reporting
common:
- Remove 4kB addition space for FDT allocation
common: fdt: Remove additional 4k space for fdt allocation
There is no technical reason to add additional 4k space for FDT. This space
is completely unused and just increase memory requirements. This is
problematic on systems with limited memory resources as Xilinx Zynq
CSE/ZynqMP mini and Versal mini configurations.
The patch is removing additional 4k space.
EFI code is using copy_fdt() which copy FDT to different location.
And all boot commands in case of using U-Boot's FDT pointed by
$fdtcontroladdr are copying FDT to different locations by
image_setup_libfdt().
That's why in proper flow none should modified DTB used by U-Boot that's
why there is no need for additional space.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Michal Simek [Mon, 27 Apr 2020 09:26:31 +0000 (11:26 +0200)]
xilinx: zynqmp: Enable pmufw config reloading
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.
For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize
The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.
Here is example of PMUFW config fragment which enables config reloading.
/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID, /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Thu, 6 Jun 2019 07:47:41 +0000 (09:47 +0200)]
topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.
Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.
There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Fri, 18 Oct 2019 05:34:13 +0000 (07:34 +0200)]
board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Wed, 22 Apr 2020 14:27:19 +0000 (16:27 +0200)]
board: topic-miami: Set FCLK1 to 150MHz
In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.
Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 May 2020 14:05:01 +0000 (08:05 -0600)]
net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.
Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 27 Apr 2020 09:51:40 +0000 (11:51 +0200)]
firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Rajan Vaja [Tue, 5 May 2020 05:53:56 +0000 (22:53 -0700)]
clk: versal: Remove alt_ref_clk from clock sources
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 5 May 2020 14:17:57 +0000 (16:17 +0200)]
arm64: versal: Let U-Boot to update memory node by default
There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Walter Lozano [Tue, 19 May 2020 18:24:22 +0000 (15:24 -0300)]
mx6cuboxi: customize board_boot_order to access eMMC
In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.
This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, handle
IO mux for the desired boot device.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Ye Li [Wed, 10 Jun 2020 03:28:03 +0000 (20:28 -0700)]
arm: dts: imx: fsl-imx8qm.dtsi: fix gpio aliases
Current aliases missed gpio0 node, and this node shoud be
aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we
will get below message when running "gpio status" command, and
see the reason by "dm uclass".
Marek Vasut [Thu, 21 May 2020 23:13:54 +0000 (01:13 +0200)]
ARM: imx: soc: Select default TEXT_BASE for MX7
Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot
text base is picked as the one used by various MX7 boards. The SPL
text base however is different.
The SPL text base is set to 0x912000 instead of the usual 0x911000,
that is because the 0x911000 value cannot work. Using 0x911000 as a
SPL text base will result in the DCD header being placed below the
0x911000 address, which is a reserved SRAM area which must not be
used. This will actually trigger eMMC boot failure on MX7D at least.
Hence the increment.
Update all boards affected by this SPL problem to the new SPL_TEXT_BASE.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 21 May 2020 23:13:00 +0000 (01:13 +0200)]
ARM: imx: soc: Switch BOARD_EARLY_INIT_F to imply on MX7
There are systems where board_early_init_f() is plain empty. Switch
the config option from "select" to "imply", to permit user to unset
the BOARD_EARLY_INIT_F if it were to be empty.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 21 May 2020 23:12:39 +0000 (01:12 +0200)]
ARM: imx: ddr: Fill in missing DDRC ZQCTLx on i.MX7
The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without programming these registers before are
now setting those registers to 0, which is the default value, so no
functional change there.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 14 May 2020 16:49:10 +0000 (18:49 +0200)]
ARM: imx6: Fetch MAC address in board_init_late() on DH iMX6 PDK2
This is needed to obtain the MAC from EEPROM/OTP only after the final
env is populated, otherwise the ethaddr might be overriden.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Claudius Heine <ch@denx.de> Cc: Harald Seiler <hws@denx.de> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de>
Igor Opaniuk [Tue, 16 Jun 2020 19:20:08 +0000 (22:20 +0300)]
toradex: imx: enable BOOTCOUNT feature
This introduces automatic boot counter that increases after every
reset.After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it's
disabled if bootlimit isn't set.
To enable this feature you have set bootcount limit ("bootlimit"),
alternate boot action ("altbootcmd") that will be performed if
the new value of bootcount exceeds the value of bootlimit, and
"upgrade_available" to let U-Boot automatically increase and save
the counter value after every reset:
Igor Opaniuk [Tue, 16 Jun 2020 19:20:06 +0000 (22:20 +0300)]
apalis-tk1: enable distroboot
1. Use distro_bootcmd as default boot command instead of
legacy emmcboot wrapper.
2. Drop emmcboot and sdboot wrappers.
3. Provide proper boot order for Distro Boot.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Max Krummenacher [Tue, 16 Jun 2020 19:20:05 +0000 (22:20 +0300)]
configs/colibri_vf.h: drop sdboot in favour of distro_bootcmd
The distro bootscript uses kernel_image to get the file name of
the kernel, so change that variable name.
UBI boot has precedence in the default boot command. If one wants
to boot from SD with a working NAND installation stop in U-Boot
and enter:
setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Stefan Agner [Tue, 16 Jun 2020 19:20:03 +0000 (22:20 +0300)]
colibri-imx6ull/imx7: define bootubipart for distro boot
When using distro boot to boot from UBI volumes the boot partition
has been hardcoded to "UBI" (capital letters). However, our default
MTD layout uses "ubi" (lower case letter). Define "ubi" as the
default UBI partition for distro boot for Toradex. This allows to
use distro boot without having to redefine the MTD partition layout
which is useful for TorizonCore.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Fabio Estevam [Wed, 17 Jun 2020 17:33:16 +0000 (14:33 -0300)]
ARM: dts: imx6qdl-sabresd: Fix AR8031 phy-mode
As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Fri, 19 Jun 2020 01:14:42 +0000 (22:14 -0300)]
ARM: dts: imx6qdl-sabreauto: Fix AR8031 phy-mode
As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix the phy-mode accordingly to fix the regression.
Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY. The RGMII delay is
already set correctly.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
, which passes the 'qca,clk-out-frequency' property and it is important
to specify the correct frequency generated by the AR8035.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Tom Rini <trini@konsulko.com>
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
for the values that comprise the fields, not zero-bits-set.
This patch fixes the clock frequency configuration for ATH8030 and
ATH8035 Atheros PHYs by removing the erroneous "~".
To reproduce this bug, configure the PHY with the device tree binding
"qca,clk-out-frequency" and remove the machine specific PHY fixups.
Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Apply the same fix in the U-Boot driver.
Tested on a i.MX6 Hummingboard.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Fri, 19 Jun 2020 09:19:45 +0000 (11:19 +0200)]
ARM: dts: stm32: Reinstate card detect behavior on ST boards
The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
unsupported, reinstate the old cd-gpios behavior until this handling
is fully implemented. This avoid potential issue for SDCard boot:
the card detect fails with floating gpio.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 18 Jun 2020 18:35:17 +0000 (20:35 +0200)]
ARM: dts: stm32: Reinstate card detect behavior on DHSOM
The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
unsupported, reinstate the old cd-gpios behavior until this handling
is fully implemented. This permits the DHSOM to boot from SD again,
without this patch the card detect fails.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Atish Patra [Fri, 19 Jun 2020 01:51:50 +0000 (18:51 -0700)]
cmd: bootefi: Honor the address & size cells properties correctly
fdtdec_get_addr_size reads the uses a fixed value for address & size
cell properties which may not be correct always.
Use the auto variant of the function which automatically reads
#address-cells & #size-cells from parent and uses to read the "reg"
property.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
On 32 bit systems fdt_addr_t may be 4 bytes long but size is defined as
u64. Avoid filling the upper 4 bytes of the sizep parameter of
fdtdec_get_addr_size_auto_parent() with random bytes from the stack by
defining a separate variable fdt_size.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Warren [Mon, 11 May 2020 23:38:58 +0000 (16:38 -0700)]
t210: Nano: Add NVME support
This allows Nano to use the key M.2 on the CVB to connect and use a M.2
NVMe SSD stick. Works on my Nano B00, WD SN750 NVMe SSD shows up
w/'nvme' commands. Will add booting from NVMe via distro cmds in a future
patch.
Tom Rini [Thu, 18 Jun 2020 20:59:16 +0000 (16:59 -0400)]
Merge tag 'video-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-video into next
- migrate remaining imx5/imx6qd boards to DM_VIDEO
- use 'vidconsole' stdout in nitrogen6x upgrade script
- add option for selection of the vidconsole commands
lcdputs and setcurs
- allow building ipuv3 driver with disabled CONFIG_PANEL
- make backlight and panel drivers optional
- remove useless code from ipuv3 driver
- extend existing DM_VIDEO work-around for console name
to support 'vga'
- remove non-DM code in ipuv3
Jon Hunter [Thu, 18 Jun 2020 11:54:39 +0000 (12:54 +0100)]
ARM: tegra: Enable PSCI support for Tegra210 and Tegra186
The PSCI nodes are currently not populated for the Tegra210 and Tegra186
devices. This prevents the PSCI driver from being able to identify the
PSCI method used by these devices and causes the probe of the PSCI
driver to fail.
Since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was
added, which moves the PSCI EFI system reset handler into the PSCI
driver, this has prevented the EFI system reset from working for
Tegra210 and Tegra186. Therefore, populating these nodes is necessary
to fix the EFI system reset for Tegra210 and Tegra186.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
Jon Hunter [Thu, 18 Jun 2020 11:54:38 +0000 (12:54 +0100)]
firmware: PSCI: Fix PSCI support for OF live trees
When CONFIG_OF_LIVE is enabled, dev_of_offset() cannot be used and
if used returns an invalid offset. This causes the call to
fdt_stringlist_get() in the psci_probe() to fail to read the 'method'
property from the PSCI node for the device and hence prevents PSCI
from working. Fix this by using the ofnode_read_string() API instead
of the fdt_stringlist_get() because this will handle reading the
property both when CONFIG_OF_LIVE is enabled or disabled.
Due to the above problem and since commit 81ea00838c68 ("efi_loader:
PSCI reset and shutdown") was added, the EFI system reset has been
broken for Tegra210 and Tegra196 platforms. This also fixes the EFI
system reset for these Tegra platforms.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
projects / u-boot.git / log