board: starfive: Rename spl_soc_init() to spl_dram_init()
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
board: sifive: Rename spl_soc_init() to spl_dram_init()
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Kongyang Liu [Tue, 16 Apr 2024 07:31:05 +0000 (15:31 +0800)]
mmc: cv1800b: Add transmit tap delay config to fix write error
Currently, only the receive delay is configured while the transmit delay
is not set, which may result in errors when writing to the file. This issue
can be resolved by setting PHY_TX_SRC_INVERT to SDHCI_PHY_TX_RX_DLY.
riscv: andesv5: Set default cache line size to 64-bytes
The instruction and data cache line sizes of Andes core
are 64-byte. Select SYS_CACHE_SHIFT_6 for RISCV_NDS so
the SYS_CACHELINE_SIZE is enabled with a default value.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Daniel Schultz [Fri, 19 Apr 2024 15:55:39 +0000 (08:55 -0700)]
board: phytec: common: Fix eepom is empty check
The ptr variable is currently defined as int and sizeof
returns the size of the eeprom data struct as Byte (32 in total).
In case the eeprom is empty, the check, if the eeprom is empty,
will most likely stop after 8 iterations because it will continue
with the stack which should contain some data. Therefore, the
init function will detect an empty EEPROM as API0 and return with
the valid flag set to True.
Fixes: dc22188cdc8 ("board: phytec: Add common PHYTEC SoM detection") Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
For all of the functions that access the eeprom_data, make sure these
data are valid. Use the valid member of the phytec_eeprom_data struct.
This fixes a bug where only the API revision check guarded against
accessing rubbish. But if API revision was e.g. 6, eeprom setup failed
before, but phytec_get_imx8m_eth would still happily access the data.
Fixes: dc22188cdc8 ("board: phytec: Add common PHYTEC SoM detection") Signed-off-by: Yannic Moog <y.moog@phytec.de> Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
board: phytec: introduce eeprom struct member 'valid'
Add a new nember to the eeprom_data that indicates whether the
associated data is valid or not. Make use of this new member in the
phytec_eeprom_data_init function by setting the valid value
appropriately.
Move the eeprom data to a new struct payload that holds
the payload of the eeprom.
The phycore-rk3288 can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for rockchip vendor prefix accordingly.
Move device tree nodes required for u-boot to rk3288-phycore-rdk-u-boot.dtsi
such as chosen, i2c_eeprom_id and it's alias.
The phycore-am64x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
While at it, drop the redundant definitions of AM642_PHYBOARD_ELECTRA_DTB
& SPL_AM642_PHYBOARD_ELECTRA_DTB from the binman dtsi file.
The phycore-am62x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
At HS400 mode the ITAPDLY value is that from High Speed mode
which is incorrect and may cause boot failures.
The ITAPDLY for HS400 speed mode should be the same as ITAPDLY
as HS200 timing after tuning is executed. Add the functionality
to save ITAPDLY from HS200 tuning and save as HS400 ITAPDLY.
Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") Signed-off-by: Judith Mendez <jm@ti.com>
According to the device datasheet [0], ENDLL=1 for
DDR52 mode, so call am654_sdhci_setup_dll() and write
itapdly after since we do not carry out tuning.
[0] https://www.ti.com/lit/ds/symlink/am62p.pdf
Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit
Set itap_del_ena if ITAPDLY is found in DT or if the tuning
algorithm was executed and found the optimal ITAPDLY. Add the
functionality to save ITAPDLYENA that can be referenced later
by storing the bit in array itap_del_ena[].
mmc: am654_sdhci: Add tuning algorithm for delay chain
Currently the sdhci_am654 driver only supports one tuning
algorithm which should be used only when DLL is enabled. The
ITAPDLY is selected from the largest passing window and the
buffer is viewed as a circular buffer.
The new tuning algorithm should be used when the delay chain
is enabled; the ITAPDLY is selected from the largest passing
window and the buffer is not viewed as a circular buffer.
This implementation is based off of the following paper: [1].
Also add support for multiple failing windows.
[1] https://www.ti.com/lit/an/spract9/spract9.pdf
Fixes: a759abf569d4 ("mmc: am654_sdhci: Add support for software tuning") Signed-off-by: Judith Mendez <jm@ti.com>
Tom Rini [Mon, 29 Apr 2024 16:55:17 +0000 (10:55 -0600)]
Merge patch series "upstream DT compatibility"
Caleb Connolly <caleb.connolly@linaro.org> says:
This is a subset of [1]. With more platform maintainers switching to
OF_UPSTREAM I didn't want to get in the way (it has also proven more
difficult than I hoped to remove only the fully compatible header
files).
This series removes only the dt-bindings headers which contain generic
data like GPIO flags, input event codes, etc.
It then implements support for building all DTBs for a vendor with
OF_UPSTREAM_BUILD_VENDOR. This removes the need to maintain a set list
of DTBs that can be built by U-Boot and opens up the possibility of new
boards becoming supported "by default" just by landing their DT
upstream.
dts: support building all dtb files for a specific vendor
This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
all the devicetree files for a given vendor to be compiled. This is
useful for Qualcomm in particular as most boards are supported by a
single U-Boot build just provided with a different DT.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Amlogic boards builds
Tom Rini [Mon, 29 Apr 2024 16:54:46 +0000 (10:54 -0600)]
Merge patch series "Enable ICSSG Ethernet Driver for AM65x"
MD Danish Anwar <danishanwar@ti.com> says:
The series introduces device tree and config changes and AM65x
to enable ICSSG driver. The series also enables SPL_LOAD_FIT_APPLY_OVERLAY
for AM65x in order to load overlay over spl.
The ICSSG2 node is added in device tree overlay so that it remains in
sync with linux kernel.
This series has been tested on AM65x SR2.0, and the ICSSG interface is
able to ping / dhcp and boot kernel using tftp in uboot.
The users need to set env variables fw_storage_interface, fw_dev_part,
fw_ubi_mtdpart, fw_ubi_volume to indicate which storage medium and
partition they want to use to load firmware files from. By default the env
fw_storage_interface=mmc and fw_dev_part=1:2 but users can modify these
envs as per their requirements.
board: ti: am65x: Set fw_storage_interface and fw_dev_part ENVs
When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Robert Marko [Tue, 23 Apr 2024 11:05:40 +0000 (13:05 +0200)]
.gitignore: add LTO generated file
Currently, keep-syms-lto.c is being generated if LTO is enabled but unlike
keep-syms-lto.o it is not being ignored, so lets add keep-syms-lto.* to
.gitignore.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
cmd: CONFIG_CMD_BLOBLIST must depend on CONFIG_BLOBLIST
With CONFIG_CMD_BLOBLIST=y, CONFIG_BLOBLIST=n linker errors occur:
usr/bin/ld: cmd/bloblist.o: in function `do_bloblist_list':
cmd/bloblist.c:27:(.text.do_bloblist_list+0x6):
undefined reference to `bloblist_show_list'
/usr/bin/ld: cmd/bloblist.o: in function `do_bloblist_info':
cmd/bloblist.c:19:(.text.do_bloblist_info+0x6):
undefined reference to `bloblist_show_stats'
Fixes: 4aed22762303 ("bloblist: Add a command") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Andrew Davis [Thu, 18 Apr 2024 17:58:28 +0000 (12:58 -0500)]
arm: mach-k3: am642: Fix reset for workaround errata ID i2331
To workaround an issue in AM642 we reset the SoC in early boot. For that
we first probed the sysreset driver by calling uclass_get_device(). The
ti-sci sysreset driver is now probed during the ti-sci firmware probe.
Update this call to probe the firmware driver which will then probe
the sysreset driver allowing do_reset() to again function as expected.
Reported-by: Jonathan Humphreys <j-humphreys@ti.com> Fixes: fc5d40283483 ("firmware: ti_sci: Bind sysreset driver when enabled") Signed-off-by: Andrew Davis <afd@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Tested-by: Kamlesh Gurudasani <kamlesh@ti.com>
board: toradex: verdin-am62: Remove not needed env variables
Remove not needed variables from environment.
- boot_scripts is not needed, the default value is just fine and
already includes boot.scr
- setup variable used to be executed from some bootscript, however
it's not required and there is no point on having this small helper
here
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
arm: dts: verdin-am62: use gpio-hog for sleep moci
In Linux, we allow sleep moci to be turned off when the carrier board
supports it and the system is in suspend. In U-Boot, however, we want
the sleep moci to be always on. So we use a gpio hog and disable the
regulator. This change is necessary because we switched to upstream
device tree files with commit c07bba7a2c7e ("verdin-am62: move verdin
am62 to OF_UPSTREAM"). A recent upstream patch removes the gpio hog from
the Linux device tree, so we need to add it to the u-boot dtsi. The
following patch will remove the gpio hog from the Linux device tree:
https://lore.kernel.org/linux-devicetree/20240301084901.16656-1-eichest@gmail.com/
The U-Boot patch can be applied without it and will not break the build.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
At present only MCU domain ESM is probed, this means errors
occurred in mcu domain will be propagate to MCU_SAFETY_ERRORn.
MCU ESM accepts SOC_SAFETY_ERRORn signal as Error
event and propagate to MCU_SAFETY_ERRORn.[0]
Therefore adding support to probe both main domain and mcu
domain ESM.
[0]: https://www.ti.com/lit/zip/spruil1
spruil1c.pdf from zip
Figure 12-1244. ESM Modules Overview
arm: dts: k3-am625-verdin: add tifsstub to tispl.bin
Adds tifsstub binaries, this is required for deepsleep functionality.
This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
- Fix missing fdt_fixup on colibri-imx(6ull|imx7).
- Enable PCIe and NVMe on DH i.MX8M Plus DHCOM PDK3.
- Convert i.MX8M flash.bin image generation to binman
- Convert imx93-11x11-evk to OF_UPSTREAM.
power: pmic: tps65941: Update compatible to aling with kernel DT
Linux kernel driver drivers/mfd/tps6594-i2c.c is using different
name for compatible for tps6594 family PMIC.
After sync of Linux kernel DT to u-boot for TI platforms
J7200, J721S2 and J784S4 PMIC is no longer getting probed.
So updating compatible field to align with Linux driver and DT.
power: regulator: tps65941: Add TPS65224 PMIC regulator support
Reuse TPS65941 regulator driver to adds support for
TPS65224 PMIC's regulators. 4 BUCKs and 3 LDOs, where
BUCK1 and BUCK2 can be configured in dual phase mode.
Marek Vasut [Thu, 25 Apr 2024 23:00:37 +0000 (01:00 +0200)]
ARM: dts: imx: Convert i.MX8M flash.bin image generation to binman
Rework the flash.bin image generation such that it uses the new binman
nxp_imx8mimage etype. This way, the flash.bin is assembled in correct
order using plain binman, without any workarounds or sections assembled
in special DT node order.
Reviewed-By: Tim Harvey <tharvey@gateworks.com> Tested-By: Tim Harvey <tharvey@gateworks.com> # imx8mm_venice Tested-by: Fabio Estevam <festevam@gmail.com> # imx8mm-evk and imx8mn-evk Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 25 Apr 2024 23:00:36 +0000 (01:00 +0200)]
ARM: dts: imx: Switch Ronetix iMX8MQ-CM to imx8mq-u-boot.dtsi
Include imx8mq-u-boot.dtsi in the board -u-boot.dtsi to pull in binman
configuration instead of duplicating it in the board -u-boot.dtsi again.
Drop the duplicate binman configuration.
Marek Vasut [Thu, 25 Apr 2024 23:00:35 +0000 (01:00 +0200)]
binman: Add nxp_imx8mimage etype
Add new binman etype derived from mkimage etype which generates configuration
input file for mkimage -T imx8mimage, and runs the mkimage on input data. The
mkimage -T imx8mimage is used to generate combined image with SPL and DDR PHY
blobs which is bootable on i.MX8M.
The configuration file generated here is equivalent of imx8mimage.cfg, which
is the file passed to '$ mkimage -T imx8mimage -n imx8mimage.cfg ...' . The
settings generated into the imx8mimage.cfg file are configured via supported
binman DT properties, nxp,boot-from, nxp,loader-address, nxp,rom-version.
Marek Vasut [Tue, 23 Apr 2024 23:15:18 +0000 (01:15 +0200)]
ARM: dts: imx: Enable PCIe and NVMe on DH i.MX8M Plus DHCOM PDK3
Enable PCIe/NVMe support on DH i.MX8M Plus DHCOM PDK3. Except for
the configuration options which are enabled, add slight adjustment
to board u-boot.dtsi, which is necessary as there is currently no
driver for the I2C PCIe clock generator. Since the generator is
strapped to be always on, it is possible to supplant the generator
functionality by fixed-clock.
In commit 51aaaf5e7975 ("board: toradex: imx: Remove not needed env variables")
the empty definition of fdt_fixup variable was removed, however this was
still referenced from the boot command leading to boot failures:
## Error: \"fdt_fixup\" not defined`
Fix this by removing "run fdt_fixup" from the boot command and instead
enable CONFIG_OF_ENV_SETUP in the defconfig that would achieve the same
but in a more robust way (it works fine even if the variable is not
defined).
Fixes: 51aaaf5e7975 ("board: toradex: imx: Remove not needed env variables") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tom Rini [Fri, 26 Apr 2024 13:28:57 +0000 (07:28 -0600)]
Merge tag 'u-boot-rockchip-20240426' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
Please pull the updates for rockchip platform:
- dts sync for rk3308;
- sdram: Support getting banks from TPL for rk3568 and rk3588;
- dts and config clean and sync up for rk3568/rk3588;
- Other misc fixes;
Tom Rini [Fri, 26 Apr 2024 13:28:32 +0000 (07:28 -0600)]
Merge tag 'optee-master-26042024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Minor changes on this PR.
Igor added some orphaned OP-TEE related files on the proper section
of MAINTAINERS and fixed a potential buffer overflow in tee-sandbox
RK356x-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: turing-rk1-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the turing-rk1-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: toybrick_rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the toybrick_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: evb_rk3588 et al.: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the evb_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
All defconfigs using the CONFIG_TARGET_EVB_RK3588 are updated at once
since they are impacted by this change.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock5b-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5b-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock5a-rk3588s: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5a-rk3588s.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: quartzpro64-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the quartzpro64-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: nanopc-t6-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the nanopc-t6-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: NR_DRAM_BANKS now defaults to 10 when Rockchip TPL blob is used
When Rockchip TPL blob is used, the memory areas that can be used for
DRAM is gotten from ATAGS passed through the DRAM at a specific address.
The DDR_MEM tag contains at most 10 areas, so we should default to 10 if
Rockchip TPL blob is used. Note that it is technically possible we need
more if one of those 10 areas overlaps with reserved memory area,
forcing us to split it in two. But a default doesn't need to handle all
cases, only most.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588
Allow RK3568 and RK3588 based boards to get the RAM bank configuration
from the ROCKCHIP_TPL stage instead of the current logic. This fixes
both an issue where 256MB of RAM is blocked for devices with >= 4GB
of RAM and where memory holes need to be defined for devices with
more than 16GB of RAM. In the event that neither SoC is used or the
ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas
defined in mem_map data struct in SoC C files, but only if the DRAM area
overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward
to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1
(e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as
well, but the DDR_MEM tag seems to be pretty much stable (though BL31
seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and
it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock-pi-4-rk3399: enable booting from SPI flash
Some variants of the ROCK Pi 4 series have an SPI flash chip populated
which can be booted from. This patch enables support in U-Boot for
building the image for the SPI flash, support for booting U-Boot from the
SPI flash chip and support in U-Boot for accessing the SPI flash using
`sf` commands.
Not all variants (e.g. ROCK Pi 4B, ROCK 4 Model C Plus, ROCK 4SE) come
populated with an SPI flash chip, but have the footprint on the board so
a user could solder their own to the board. With this patchset applied,
these board variants without an SPI flash chip still boot from MMC.
I have enabled support for both Winbond and XTX SPI flash devices since
different hardware variants have different devices populated:
- `rockpi4_v13_sch_20181112.pdf` contains a Winbond part `W25Q64FWZPIG`
- `rockpi4_v14_sch_20210114.pdf` contains an XTX part `XT25F32BWOIGT`
The ROCK Pi 4 I have is marked as "ROCK PI 4 v1.48" and contains an SPI
flash chip from XTX:
=> sf probe
SF: Detected xt25f32 with page size 256 Bytes, erase size 4 KiB, total 4 MiB
In the interest of supporting all board variants and not regressing
existing users who boot from MMC, I have enabled support for booting from
both SPI flash chip variants in the defconfig and left the environment
storage location as MMC to not break existing users who have the
environment stored on MMC.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
To prepare for ROCK Pi 4A SPI flash support, sync the DTS from Linux which
includes an SPI flash node.
Kernel tag: v6.6-rc1
Kernel commits:
- eddf73029770 ("arm64: dts: rockchip: Enable internal SPI flash for ROCK \
Pi 4A/B/C")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Sun, 21 Apr 2024 20:09:03 +0000 (20:09 +0000)]
rockchip: io-domain: Add support for RK3328
Port the RK3328 part of the Rockchip IO-domain driver from linux.
This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.
Enable by default on all RK3328 boards, skip rk3328-evb because this
target is typically also used on miscellaneous boards and boxes not
fully supported by U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort imply statements under ROCKCHIP_RK3328 alphabetically and remove
ENABLE_ARM_SOC_BOOT0_HOOK, DEBUG_UART_BOARD_INIT and SYS_NS16550, they
are already implyed or selected by ARCH_ROCKCHIP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: px30-board-tpl: Sync ifdef guards with full TPL
Display TPL init information message only when TPL_BANNER_PRINT
configuration entry is set. This allows to disable information
message in case logs on UART are unwanted.
Update parent ifdef condition to check also CONFIG_TPL_SERIAL
to match logic of the non-PX30 TPL implementation.
Jonas Karlman [Wed, 10 Apr 2024 14:30:50 +0000 (14:30 +0000)]
mmc: rockchip_sdhci: Fix 4 blocks PIO mode read limit for RK35xx
The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:29:05 +0000 (06:29 +0000)]
rockchip: rk35xx-generic: Disable unused features
The generic RK35xx board targets are intended to be used as a bare
minimum target that can be used to e.g. boot boards that mostly follow
reference hw design before a board spefic target has been added or for
flashing and recovery purposes.
Disable BOOTMETH_VBE, NET and ADC as these features are not intended to
ever be used by these minimal generic board targets.
Enable SYSRESET_PSCI to let TF-A handle sysreset from U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
projects / u-boot.git / log