Commit ad7061ed742e ("doc: Move device tree bindings documentation to
doc/device-tree-bindings") moved all device tree binding documentation
to doc/device-tree-bindings directory.
The current U-Boot project still have two documentation directories:
- doc/
- Documentation/
Move all documentation and sphinx files to doc directory so all content
can be in a common place.
Joel Stanley [Thu, 6 Jun 2019 07:38:45 +0000 (17:08 +0930)]
aspeed/watchdog: Correct timeout value
The driver was using milliseconds and programming it into a register
which takes ticks of the watchdog clock, which runs at 1MHz. This meant
we were off by 1000 with the desired value.
When 06985289d452 ("watchdog: Implement generic watchdog_reset()
version") was added the aspeed board would leave the watchdog running,
causing it to bite before u-boot was done.
Tom Rini [Thu, 20 Jun 2019 13:14:03 +0000 (09:14 -0400)]
Merge tag 'u-boot-stm32-20190619' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Update STM32MP entry in MAINTAINERS
- Handle correctly binding for g-tx-fifo-size for USB DWC2 driver
- Fix trusted STM32MP1 defconfig with correct ethernet driver
T2080 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 3.0, and this
patch is to add DT node for each PCIe controller.
- LS1046AFRWY support
- USB errata fix and secure boot defconfig support for LS1028A
- Enabled SDHC and SATA for LX2160
- LS1046A serdes fixes
- other minor fixes
Vabhav Sharma [Thu, 6 Jun 2019 12:35:28 +0000 (12:35 +0000)]
armv8: ls1046afrwy: Add support for LS1046AFRWY platform
LS1046AFRWY board supports LS1046A family SoCs. This patch
add base support for this board.
Board support's 4GB ddr memory, i2c, micro-click module,microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.
Wasim Khan [Mon, 10 Jun 2019 10:17:29 +0000 (10:17 +0000)]
armv8: ls2088ardb: Fix MC firmware loading during SD boot
During SD boot, MC firmware and DPC are copied from SD card to DDR.
Size reserved between MC and DPC firmware on DDR is 1MB.
If the size of MC firmware(load address 0x80000000) is more than 1 MB
then part of MC firmware will be overwritten by DPC firmware (load
address 0x80100000).
Fix: Update the MC/DPL/DPC firmware's DDR address as per their
respective addresses in SD card.
Wasim Khan [Mon, 10 Jun 2019 10:17:27 +0000 (10:17 +0000)]
armv8: ls2088aqds: Fix MC firmware loading during SD boot
During SD boot, MC firmware and DPC are copied from SD card to DDR.
Size reserved between MC and DPC firmware on DDR is 1MB.
If the size of MC firmware(load address 0x80000000) is more than 1 MB
then part of MC firmware will be overwritten by DPC firmware (load
address 0x80100000).
Fix: Update the MC/DPL/DPC firmware's DDR address as per their
respective addresses in SD card.
Yinbo Zhu [Mon, 3 Jun 2019 11:24:23 +0000 (19:24 +0800)]
armv8: fsl-lsch2: add clock support for the second eSDHC
Layerscape began to use two eSDHC controllers, for example,
LS1012A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.
With this setting enabled, the on-board QSPI cannot be
properly flashed. There are no error messages, but the simple
write / read / compare tests fail.
This is already disabled in the qspi and tfa defconfigs for the
LS1046ARDB platform.
Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com> Cc: piotr.krol@3mdeb.com Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
armv8/fsl-layerscape: Add loop to check L3 dcache status
Flushing L3 cache may need variable time depending upon cache line
allocation.
Coming up with a proper timeout value would be best handled by
simulations under multiple scenarios in your actual system.
>From the purely HN-F point of view, the flush would take ~15 cycles for
a clean line, and ~22 cycles for a dirty line. For the dirty line case,
there are many variables outside the HN-F that will increase the
duration per line. For example, a *DBIDResp from the SN-F/SBSX,
memory controller latency, SN-F/SBSX RetryAck responses, CCN ring
congestion, CCN ring hops, etc, etc. The worst-case timeout would
have to factor in all of these variables plus the HN-F cycles for
every line in the L3, and assuming all lines are dirty
In case if L3 is not flushed properly, system behaviour will be
erratic, so remove timeout and add loop to check status of L3 cache.
System will stuck in while loop if there is some issue in L3 cache
flushing.
board: lx2160a: fix fsl-mc status in fdt with bootefi
fsl-mc lazyapply command applies dpl from efi_exit_boot_services().
Status of fsl-mc node in working fdt is updated at this stage.
However, an efi application like grub may already have copied the fdt.
So the updates to fdt done at efi_exit_boot_services() may not be
visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply
command is used.
Yangbo Lu [Thu, 23 May 2019 03:05:46 +0000 (11:05 +0800)]
mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
u-boot is trying to make CONFIG_BLK as a hard requirement
for DM_MMC. But now it's still not.
config BLK
bool "Support block devices"
depends on DM
default y if DM_MMC
When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC
without CONFIG_BLK enabled wasn't considered. This patch is to
fix probe issue without CONFIG_BLK enabled.
Yangbo Lu [Thu, 23 May 2019 03:05:45 +0000 (11:05 +0800)]
armv8: fsl-lsch3: add clock support for the second eSDHC
Layerscape began to use two eSDHC controllers, for example,
LS1028A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.
Ran Wang [Tue, 14 May 2019 09:34:56 +0000 (17:34 +0800)]
armv8: ls1028a: enable workaround for USB erratum A-008997
Enable workaround for USB erratum A-008997. Here PCSTXSWINGFULL
registers has been moved to DSCR as compared to other Layerscape SoCs
where it was in SCFG.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Tom Rini [Sat, 15 Jun 2019 17:03:00 +0000 (13:03 -0400)]
Merge tag 'efi-2019-07-rc5-2' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc5 (2)
This pull request provides bug fixes for the UEFI sub-system. The most
relevant one concerns the allocation of memory at address 0. It is
needed for booting Linux on several boards via bootefi, e.g. the Asus
TinkerBoard.
An undefined reference bug in disk/part.c related to a division is
resolved.
cmd: define CMD_DATA_SIZE when CONFIG_CMD_SETEXPR is selected
The setexpr shell command calls cmd_get_data_size() which is only built
when CMD_DATA_SIZE is defined. We need to define CMD_DATA_SIZE if
CONFIG_CMD_SETEXPR is selected or the build will fail if no other
command selecting this option is enabled.
Tom Rini [Sun, 2 Jun 2019 12:57:32 +0000 (08:57 -0400)]
configs: Migrate CONFIG_SYS_LDSCRIPT to Kconfig
In order to migrate this symbol to Kconfig introduce a new symbol to
guard it, CONFIG_SYS_CUSTOM_LDSCRIPT. When that is set we can then
provide the exact final location o the script.
Tom Rini [Sat, 1 Jun 2019 18:20:25 +0000 (14:20 -0400)]
configs: Migrate the various SPL_BOOT_xxx choices for PowerPC
The non-CONFIG_SPL_FRAMEWORK SPL used on some PowerPC platforms have a
choice between CONFIG_SPL_NAND_BOOT, CONFIG_SPL_MMC_BOOT and
CONFIG_SPL_SPI_BOOT. Migrate this to Kconfig
This tool has just been added but it seems I forgot to add it to
the ignore list. So to prevent the built binary being marked as
unversioned, add it to the ignore list.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marek Vasut [Tue, 11 Jun 2019 02:51:15 +0000 (04:51 +0200)]
net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig
Convert CONFIG_TFTP_BLOCKSIZE to Kconfig, update defconfigs,
headers and whitelist.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Tue, 11 Jun 2019 02:51:14 +0000 (04:51 +0200)]
net: Convert CONFIG_IP_DEFRAG to Kconfig
Convert CONFIG_IP_DEFRAG to Kconfig, update defconfigs, headers
and whitelist. This patch is a follow-up on a patch by Christian
Gmeiner with the added config/header/whitelist updates.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
The UEFI specification does not specify if the characters that have to be
replaced by underscore in function StrToFat() of the Unicode collation
protocol are those forbidden in FAT long names or those in FAT short names.
EDK2 and UEFI SCT assume it is those forbidden in FAT 8.3 short names.
Adjust the list of forbidden characters.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
arm: socfpga: provide default SPL_SIZE_LIMIT for gen5
This provides an SPL_SIZE_LIMIT that makes the build check that the SPL
binary loaded from flash fits into the SRAM (64 KiB) and leaves enough
room for global data, heap and stack (512 bytes assumed stack usage).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Igor Opaniuk [Thu, 13 Jun 2019 18:11:09 +0000 (21:11 +0300)]
fastboot: Check if partition really exist in getvar_has_slot()
Currently getvar_has_slot() invocation for "boot" and "system"
partitions always returns affirmative response regardless the fact of
existence of these partitions, which leads to impossibility to flash them
on old non-A/B AOSP setups, where _a/_b suffixes aren't used:
Extract fastboot_*_get_part_info() usage for MMC and NAND into
getvar_get_part_info() function, as it will be needed further in other
functions. This way we can avoid code duplication and mess with
preprocessor directives across all points of usage.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Sam Protsenko [Wed, 12 Jun 2019 21:49:45 +0000 (00:49 +0300)]
fastboot: Fix slot names reported by getvar
In commit [1] fastboot tool was changed w.r.t. new A/B specification [2],
and now we should report slot names in "a" format instead of "_a".
Latter is now considered legacy and we shouldn't rely on that anymore.
Due to this one can observe next error with recent fastboot tool:
Marek Vasut [Sat, 25 May 2019 20:50:35 +0000 (22:50 +0200)]
spl: dfu: Fix printed variable name
The SPL DFU uses dfu_alt_info_N variable name to determine the DFU
configuration, where N is the name of the media (e.g. ram). It does
not use the plain dfu_alt_info. Print the name of the missing env
variable in case of a failure instead of printing dfu_alt_info,
which is just the name of the parameter passed to spl_dfu_cmd().
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 29 May 2019 21:01:36 +0000 (17:01 -0400)]
configs: Disable now unbuildable SPI options for boards
Now that various SPI related options depend on CONFIG_DEPRECATED, in
order for platforms to build out of the box they need to disable various
other options.
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr> Cc: Marek Vasut <marex@denx.de> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 29 May 2019 21:01:35 +0000 (17:01 -0400)]
spi: Kconfig: Mark LPC32XX_SSP as DEPRECATED
Mark LPC32XX_SSP as DEPRECATED, this so the resulting build shows
warning for deprecated configuration enabled and associated code
will remove in v2019.07 release.
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Sylvain Lemieux <slemieux@tycoint.com>
[trini: Switch to DEPRECATED] Signed-off-by: Tom Rini <trini@konsulko.com>
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