Simon Glass [Tue, 20 Jan 2015 05:16:14 +0000 (22:16 -0700)]
x86: Implement a cache for Memory Reference Code parameters
The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.
Simon Glass [Tue, 20 Jan 2015 05:16:13 +0000 (22:16 -0700)]
x86: dts: Add SPI flash MRC details for chromebook_link
Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.
Simon Glass [Tue, 20 Jan 2015 05:16:07 +0000 (22:16 -0700)]
net: Add a separate file for IP checksumming
Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.
Sjoerd Simons [Tue, 20 Jan 2015 17:06:53 +0000 (18:06 +0100)]
pci: tegra: Fix port information parsing
commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
new fdtdec pci helpers. To get the device index of the root port, the
"reg" property should be parsed from the dtb (as was previously the
case).
With this patch i can successfully network boot my jetson tk1
Bin Meng [Tue, 20 Jan 2015 03:25:44 +0000 (11:25 +0800)]
x86: Fix various code format issues in start16.S
Various minor code format issues are fixed in start16.S:
- U-boot -> U-Boot
- 32bit -> 32-bit
- Use TAB instead of SPACE to indent
- Move the indention location of the GDT comment block
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 22 Jan 2015 03:29:41 +0000 (11:29 +0800)]
x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 1 Jan 2015 23:17:58 +0000 (16:17 -0700)]
x86: config: Always scroll the display by 5 lines, for speed
Scrolling a line at a time is very slow for reasons that I don't understand.
It seems to take about 100ms to copy 4MB of RAM in the frame buffer. To cope
with this, scroll 5 lines each time.
Simon Glass [Thu, 1 Jan 2015 23:17:57 +0000 (16:17 -0700)]
x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES
Some machines are very slow to scroll their displays. To cope with this,
support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
the display to operate at an acceptable speed by scrolling 5 lines at
a time.
This same option is available for LCDs so when these systems are unified
this code can be unified also.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
Sebastien Ronsse [Mon, 12 Jan 2015 17:17:25 +0000 (17:17 +0000)]
x86: Fix out of bounds irq handlers access
Using coreboot-x86_defconfig, the following error occurred prior to this modification:
CC arch/x86/lib/interrupts
arch/x86/lib/interrupts.c: In function ‘do_irqinfo’:
arch/x86/lib/interrupts.c:134:24: error: iteration 16u invokes undefined behavior [-Werror=aggressive-loop-optimizations]
if (irq_handlers[irq].handler != NULL) {
^
arch/x86/lib/interrupts.c:133:2: note: containing loop
for (irq = 0; irq <= CONFIG_SYS_NUM_IRQS; irq++) {
^
cc1: all warnings being treated as errors
scripts/Makefile.build:275: recipe for target 'arch/x86/lib/interrupts.o' failed
make[1]: *** [arch/x86/lib/interrupts.o] Error 1
Makefile:1093: recipe for target 'arch/x86/lib' failed
make: *** [arch/x86/lib] Error 2
Change-Id: I3572a822081b72ab760f1eb99442e1161d3d167e Signed-off-by: Sebastien Ronsse <sronsse@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 Dec 2014 09:18:39 +0000 (17:18 +0800)]
x86: ahci: Make sure interface is not busy after enabling the port
Each time U-Boot boots on Intel Crown Bay board, the displayed hard
drive information is wrong. It could be either wrong capacity or just
a 'Capacity: not available' message. After enabling the debug switch,
we can see the scsi inquiry command did not execute successfully.
However, doing a 'scsi scan' in the U-Boot shell does not expose
this issue.
SCSI: Target spinup took 0 ms.
SATA link 1 timeout.
AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: ncq stag pm led clo only pmp pio slum part ccc apst
scanning bus for devices...
ahci_device_data_io: 0 byte transferred. <--- scsi inquiry fails
ahci_device_data_io: 512 byte transferred.
ahci_device_data_io: 512 byte transferred.
ahci_device_data_io: 512 byte transferred.
Device 0: (0:0) Vendor: ATA Prod.: Rev: ?8
Type: Hard Disk
Capacity: 912968.3 MB = 891.5 GB (1869759264 x 512)
Found 1 device(s).
So uninitialized contents on the stack were passed to dev_print() to
display those wrong information.
The symptom were observed on two hard drives (one is Seagate, the
other one is Western Digital). The fix is to make sure the AHCI
interface is not busy by checking the error and status information
from task file register after enabling the port in ahci_port_start()
before proceeding other operations like scsi_scan().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 30 Dec 2014 02:32:29 +0000 (19:32 -0700)]
x86: Drop the x86_fb driver
Now that we have a full VESA driver we may as well use that. We need to
support the VESA layer being set up by early start-up code or by
running a VGA ROM.
Simon Glass [Tue, 30 Dec 2014 02:32:28 +0000 (19:32 -0700)]
x86: Add a VESA video driver
Add a driver intended to cope with any VESA-compatible x86 graphics
adapter. It will not support ROMs which use OpenFirmware (Forth) since
there is no support for that in U-Boot. This means that MAC OS cards
will not work.
Ian Campbell [Fri, 23 Jan 2015 10:17:35 +0000 (10:17 +0000)]
sunxi: Use a common CONFIG_SYS_PROMPT
The CPU info is already logged during boot e.g.
CPU: Allwinner A20 (SUN7I)
so the prompt is just one more thing to change for each new SoC, just makes it
"sunxi#" instead.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Thu, 22 Jan 2015 20:16:36 +0000 (21:16 +0100)]
sunxi: Add Hyundai A7HD support
The Hyundai A7HD is a 7" 16:9 A10 powered tablet featuring 1G RAM, 8G
nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a
headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD
Cc: Mark Janssen <maniac@maniac.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 21 Jan 2015 19:26:03 +0000 (20:26 +0100)]
sunxi: Convert sun7i boards to use auto dram configuration
Currently we've separate detailed dram settings for all sun7i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.
This has been tested on a A20-Olinuxino-Lime, A20-Olinuxino_MICRO, Bananapi,
Bananapro, Cubieboard2, Cubietruck, Mele_M3 and a Linksprite_pcDuino3.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 21 Jan 2015 15:14:00 +0000 (16:14 +0100)]
sunxi: Drop qt840a_defconfig
The qt840a is one of the many tv-boxes using the "i12" A20 pcb, but it
populates only one of the 2 places for a 16 bit dram ic, thus reducing
the buswidth to 16 bits, and the amount of ram to 512M, which is why we
had a separate config for it.
This commit switches the generic i12-tvbox_defconfig over to DRAM
autoconfiguration, so that it will work with the qt840a too, and drops the
qt840a specific config, like we've done with other memory-amount specific
configs before.
Tested on a generic i12-tvbox with 32 bit bus-width / 1G RAM, and on a
qt840a with 16 bit bus-width / 512M RAM.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 1 Jan 2015 08:12:42 +0000 (09:12 +0100)]
sunxi: Add new Chuwi V7 CW0825 board / defconfig
The Chuwi V7 is an A10 (sun4i) based tablet with 1G of RAM, 16G of nand flash,
microsd slot, 7" 1024x768 lvds ips panel, mini hdmi out, headphones out,
stereo speakers, front & back camera and usb wifi.
It is clearly marked "CHUWI", "V7" and "Model: CW0825" on the back of the
tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Tue, 20 Jan 2015 08:23:36 +0000 (09:23 +0100)]
sunxi: video: Add support for Hitachi tx18d42vm LVDS LCD panels
Add support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
lcd controller which needs to be initialized over SPI, once that is
done they work like a regular LVDS panel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Tue, 20 Jan 2015 08:22:26 +0000 (09:22 +0100)]
video: Add support for Hitachi tx18d42vm LVDS LCD panels
Add support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
lcd controller which needs to be initialized over SPI, once that is
done they work like a regular LVDS panel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
Masahiro Yamada [Wed, 21 Jan 2015 06:06:46 +0000 (15:06 +0900)]
ARM: UniPhier: remove non-sense inline directives
The inlining is done by GCC when needed, there is no need to do it
explicitly. Furthermore, the inline keyword does not force-inline
the code, but is only a hint for the compiler.
Masahiro Yamada [Mon, 19 Jan 2015 13:31:10 +0000 (22:31 +0900)]
ARM: UniPhier: fix IECTRL set code for PH1-Pro4
For PH1-Pro4, the bit 6 of the IECTRL must be set. It is the only
available bit in this register. There is no effect of the write
access to the other bits.
Masahiro Yamada [Mon, 19 Jan 2015 13:30:23 +0000 (22:30 +0900)]
ARM: UniPhier: describe init_page_table shorter
The assembly directive ".rept ... .endr" allows us to write the
init_page_table much shorter. To make things further simpler,
set the text and stack area as Normal Memory, and the other sections
as Device attribute.
Masahiro Yamada [Wed, 7 Jan 2015 10:41:38 +0000 (19:41 +0900)]
ARM: UniPhier: remove __packed that causes a problem on GCC 4.9
The DDR PHY training function, ddrphy_prepare_training() would not
work if compiled with GCC 4.9.
The struct ddrphy (arch/arm/include/asm/arch-uniphier/ddrphy-regs.h)
is specified with __packed because it represents a hardware register
mapping, but it turned out to cause a problem on GCC 4.9.
If -mno-unaligned-access is specified (yes, it is in
arch/arm/cpu/armv7/config.mk), GCC 4.9 is aware of the
__attribute__((packed)) and generates extra instructions to perform
the memory access in a way that does not cause unaligned access.
(Actually it is not need here because the register base, the first
argument of the ddrphy_prepare_training(), is always given with a
4-byte aligned address.)
Anyway, as a result, readl() / writel() is divided into byte-wise
accesses. The problem is that this hardware only accepts 4-byte
register access. Byte-wise accesses lead to unexpected behavior.
There are some options to avoid this problem.
[1] Remove -mno-unaligned-access
[2] Add __aligned(4) along with __packed to struct ddrphy
[3] Remove __packed from struct ddrphy
[1] solves the problem for ARMv7, but it does not for pre-ARMv6 and
ARMv6-M architectures where -mno-unaligned-access is default.
So, [1] does not seem reasonable in terms of code portability.
Both [2] and [3] work well, but [2] seems too much. All the members
of struct ddrphy have the u32 type. No padding would be inserted
even if __packed is dropped.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com>
Priit Laes [Mon, 19 Jan 2015 20:16:10 +0000 (22:16 +0200)]
sunxi: Add Gemei G9 (Allwinner A10/sun4i) tablet
Gemei G9 is an A10 based tablet, with 1G RAM, 16G NAND, 1024x768
IPS LCD display, stereo speakers, 1.3MP front camera and 5 MP
rear camera, 8000mAh battery, GT901 2+1 touchscreen, Bosch BMA250
accelerometer and RTL8188CUS USB wifi. It also has MicroSD slot,
miniHDMI, 1 x MicroUSB OTG port and 1 x MicroUSB host port and
3.5mm headphone jack.
More details are available at: http://linux-sunxi.org/Gemei_G9
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 19 Jan 2015 07:44:07 +0000 (08:44 +0100)]
sunxi: video: Use frontend for dma on sun4i to fix memory bandwidth problems
Testing has shown that on sun4i the display backend engine does not have
deep enough fifo-s causing flickering / tearing in full-hd mode due to
fifo underruns. On sun4i use the display frontend engine to do the dma from
memory, as the frontend does have deep enough fifo-s.
As added advantage of this is that it results in much better memory bandwidth
as it reduces the amount of dram bank switches, for more details see:
Note that this changes the pipeline searched for in the simplefb node, we can
get away with doing this now, since no kernel has yet shipped with simplefb
dtb nodes, and I will make sure to get a simplefb node with the new pipeline
into 3.19 before it ships.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Aleksei Mamlin [Mon, 19 Jan 2015 11:46:46 +0000 (14:46 +0300)]
sunxi: Add Marsboard A10 support
This patch add support for Marsboard A10 board.
The Marsboard A10 is a A10 based development board with 1G RAM, 1G NAND,
micro SD card slot, SATA 2.0 socket, 10/100 ethernet, mini HDMI port,
1 USB OTG port and 2 USB 2.0 ports. Board does not use the AXP209 pmic,
it does not have a pmic at all.
Board also have 2 expansion 70 pin headers.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
video: ssd2828: Allow using 'pclk' as the PLL clock source
Instead of using the internal 'tx_clk' clock source, it is also
possible to use the pixel clock signal from the parallel LCD
interface ('pclk') as the reference clock for PLL.
The 'tx_clk' clock speed may be different on different boards/devices
(the allowed range is 8MHz - 30MHz). Which is not very convenient,
especially considering the need to know the exact 'tx_clk' clock
speed. This clock speed may be difficult to identify without having
device schematics and/or accurate documentation/sources every time.
Using 'pclk' is free from all these problems.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Add LCD display support for MSI Primo81 tablet
The MSI Primo81 tablet has B079XAN01/LP079X01 7.85" 768x1024 IPS
MIPI display, connected to the parallel LCD interface via SSD2828
bridge chip. The panel has 18-bit color depth and needs dithering,
in spite of having RGB data delivered from A31s to SSD2828 using
24-bit arrangement.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
video: sunxi: Hook up SSD2828 with the sunxi video driver
Convert GPIO names from Kconfig strings into pin numbers for
the 'ssd2828_config' struct. Add SSD2828 initialization between
enabling the parallel LCD interface and turning on the backlight.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
video: Add support for SSD2828 (parallel LCD to MIPI bridge)
SSD2828 can take pixel data coming from a parallel LCD interface
and translate it on the fly into MIPI DSI interface for driving
a MIPI compatible TFT display. SSD2828 is configured over SPI
interface, which may or may not have MISO pin wired up on some
hardware. So a write-only SPI mode also has to be supported.
The SSD2828 support code is implemented as a utility function
and needs to be called from real display drivers, which are
responsible for driving parallel LCD hardware in front of the
video pipeline. The usage instructions are provided as comments
in the header file.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
It provides MIPI DSI constants for DCS commands, which are needed to
implement support for SSD2828 in u-boot.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
And also add Kconfig option for selecting ELDO3 voltage. The reason
for having this option is that the Android kernel sets ELDO3 to
1.2V when powering up LCD in the case if 'lcd_if' configuration
variable is set to 6 (LCD_IF_EXT_DSI) in the FEX file. Most likely
to supply power for a SSD2828 chip.
However on the MSI Primo81 tablet, which is using this particular
'lcd_if = 6' setup for LCD, setting the ELDO3 voltage appears to
be unnecessary and it works regardless. Having no schematics of
this tablet, I can only guess that 1.2V is supplied to SSD2828
in some other way.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sat, 17 Jan 2015 21:31:30 +0000 (22:31 +0100)]
sunxi: Add mk802_a10s board / defconfig
The mk802_a10s re-uses is the "classic" mk802 case and functionality, but has
an A10s SoC inside rather then the A10, it features 512M or 1G RAM, 4G nand,
a mini-hdmi female connector, USB-A receptacle, mini-usb receptacle (OTG)
and a sdio realtek wifi chip. Unlike the original mk802 it does have a pmic,
the axp152.
For more details see: http://linux-sunxi.org/Semitime_g2
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 17 Jan 2015 21:18:51 +0000 (22:18 +0100)]
sunxi: Add mk802ii board / defconfig
The mk802ii is a revised version of the mk802 A10 based hdmi tv-stick, it
features 1G RAM, 4G nand, a hdmi male connector, USB-A receptacle, 2 micro
usb receptacles (OTG & power) and USB-wifi, and does come with an axp209 pmic.
For more details see: http://linux-sunxi.org/Rikomagic_mk802ii
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 17 Jan 2015 21:15:30 +0000 (22:15 +0100)]
sunxi: Add mk802 board / defconfig
The mk802 is the "classic" Allwinner A10 based hdmi tv-stick, it features
512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle,
mini-usb receptacle (OTG) and USB-wifi. Somewhat unique the mk802 does not
use the AXP209 pmic, it does not have a pmic at all.
For more details see: http://linux-sunxi.org/Rikomagic_mk802
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 17 Jan 2015 16:01:38 +0000 (17:01 +0100)]
sunxi: Remove CONFIG_TARGET_FOO for sun4i, sun6i and sun8i boards
CONFIG_TARGET_FOO is only used in board/sunxi/Makefile to select the
dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some
special handling of the bananapi/bananapro (both sun7i), iow it is not used
at all on any sun4i, sun6i and sun8i boards so lets get rid of it there.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 17 Jan 2015 13:45:12 +0000 (14:45 +0100)]
sunxi: Convert sun4i boards to use auto dram configuration
Currently we've separate detailed dram settings for all sun4i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.
Tested-by: Hans de Goede <hdegoede@redhat.com> on a A10-OLinuXino-Lime,
Chuwi_V7_CW0825 and ba10_tv_box Tested-by: Zoltan HERPAI <wigyori@uid0.hu> on a pcduino Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 17 Jan 2015 13:24:55 +0000 (14:24 +0100)]
sunxi: Stop differentiating between 512M and 1G variants of the same board
While working on adding more boards I noticed that we lack a config for
the 512M cubieboard, and that some of the new boards which I want to add also
have 512M and 1G variants, rather then adding 2 defconfig's for all of these,
lets switch the exising boards which have both a 512M and 1024M variant over
to the sun4i dram autoconfig code.
This also drops the foo_RAMSIZE_defconfig variants of boards where we currently
have 2 separate configs already.
Note:
1) The newly introduced CONFIG_DRAM_EMR1 kconfig value is not used with
a value other then its default for now, but we need this to be configurable
to support some new boards with auto dram config.
2) We always set all CONFIG_DRAM_foo values in defconfigs, even if they match
the defaults, this is done to make it more clear what values are used for a
certain board.
This has been tested on a Mele A1000, Mini-X and a Cubieboard, all 1G
variants, the dram autoconfig code has also been tested on a 512M mk802
(a defconfig for the mk802 is added in a later patch).
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 17 Jan 2015 15:39:20 +0000 (16:39 +0100)]
sunxi: axp209: Disable interrupts when intializing the axp209
We do not use the axp209 interrupt, and at least in my mini-x (which does not
have a power button) the pwr-button pin and the irq pin are soldered together,
so if the axp209 keeps it irq asserted too long it will see a 10s pwr-button
press and hard power off the board, disabling the irqs fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Tue, 13 Jan 2015 17:13:50 +0000 (18:13 +0100)]
sunxi: Rename cpu.h to cpu_sun4i.h
sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite
different, so add a wrapper cpu.h which includes the right mach specific
cpu_sun#i.h based on mach, like we already do with clock.h and dram.h .
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 14 Jan 2015 18:17:15 +0000 (19:17 +0100)]
sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headers
Which pll-s are available depends on the machine type, move the
clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files
so that we only declare what is actually available. e.g. clock_get_pll5p()
is not available on sun6i / sun8i, and with sun9i we get a completely
different set of plls.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Tue, 13 Jan 2015 12:21:46 +0000 (13:21 +0100)]
sunxi: display: Make lcd display clk phase configurable
While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD module
I noticed that the screen flickered. This is caused by the lcd display clk
phase reg value being set to 0, where it should be 1 in this setup.
This commit adds a Kconfig option for the lcd display clk phase, so that we
can set it per board. This defaults to 1, because looking at all the fex
files in sunxi-boards, that is by far the most used value.
This commit updated the Ippo and MSI Primo73 tablet defconfigs to override the
default of 1 with 0, as that is the correct value for those tablets, this
keeps the register settings the same as before this commit.
The Olinuxino-A13 defconfigs are not updated, changing the register setting
for these boards from 0 to 1, this is intentional.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 21 Jan 2015 15:24:05 +0000 (16:24 +0100)]
sunxi: Restore lowlevel_init usage
2 recent sunxi changes have removed the usage of lowlevel_init by moving some
code around and then setting CONFIG_SKIP_LOWLEVEL_INIT.
This is problematic for 2 reasons:
1) It does not just stop s_init from being called, it also stops
cpu_init_cp15 from getting called, which is undesirable.
2) We want u-boot.bin to be usable standalone, without SPL, some people e.g.
use an upstream u-boot.bin together with Allwinner's boot0 loader. So
u-boot.bin must (re)initialize the gpios, timer, etc.
This commit restores the lowlevel_init / s_init usage, while keeping the
changes to no longer use the global-data (gd) struct in the SPL.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
board/T1040rdb: Add VSC9953 support for T1040rdb board
This patch configures and initializes the L2 switch on T1040rdb board.
The external L2 switch ports may be connected to PHYs only over
QSGMII, for T1040rdb.
board/T104xrdb: T1040 FMAN ports FM1@DTSEC1 and FM1@DTSEC2 have no PHYs
Freescale's T1040qds board may be configured to have up to
5 FMAN ports (FM1@DTSEC1 to FM1@DTSEC5). From these 5 ports,
2 of them may be fixed-links (FM1@DTSEC1 annd FM1@DTSEC2),
connected to other two ports from an intergrated
VSC9953 L2 Switch (switch ports 8 and 9). These fixed-link
ports have no PHYs attatched, so they don't have a
corresponding MDIO.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
board/T1040qds: T1040 FMAN ports FM1@DTSEC1 and FM1@DTSEC2 have no PHYs
Freescale's T1040qds board may be configured to have up to
5 FMAN ports (FM1@DTSEC1 to FM1@DTSEC5). From these 5 ports,
2 of them may be fixed-links (FM1@DTSEC1 annd FM1@DTSEC2),
connected to other two ports from an intergrated
VSC9953 L2 Switch (switch ports 8 and 9). These fixed-link
ports have no PHYs attatched, so they don't have a
corresponding MDIO.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Implement MIPS specific setup of the gd_t structure to support
pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified,
a memory area will be reserved after the initial stack area and
the gd->malloc_base pointer will be initialized.
After this patch the new driver model can be used on MIPS.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
MIPS: bootm: prepare a flattened device tree for the kernel
Add the initial code to prepare a flattened device tree for
the kernel like relocating the FDT blob and fixing up the
/chosen and /memory nodes.
The final hand over to the kernel is not yet implemented. After
the community agreed on the MIPS boot interface for device trees,
the corresponding code will be added.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
projects / u-boot.git / log