Tom Rini [Thu, 22 Oct 2020 18:36:47 +0000 (14:36 -0400)]
Merge branch '2020-10-22-misc-changes'
- Assorted updates for Xen, IPQ40xx, ASpeed, Keymile
- Assorted typo / documentation fixes
- Fix default preboot cmd to act like before with USB_STORAGE set
- A number of other bugfixes throughout the code
AKASHI Takahiro [Thu, 15 Oct 2020 04:25:14 +0000 (13:25 +0900)]
arch: arm/xen: add putc() for debugging
This new function, xen_debug_putc(), is intended to be used to
enable CONFIG_DEBUG_UART on xen guest.
Please note that the underlying functionality in Xen is available
only when Xen is configured with !NDEBUG but is much simpler than
a generic HYPERVISOR_console_io().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Chia-Wei, Wang [Thu, 15 Oct 2020 02:25:13 +0000 (10:25 +0800)]
reset: ast2500: Use SCU for reset control
The System Control Unit (SCU) controller of Aspeed
SoCs provides the reset control for each peripheral.
This patch refactors the reset method to leverage
the SCU reset control. Thus the driver dependency
on watchdog including dedicated WDT API and reset
flag encoding can be eliminated.
The Kconfig description is also updated accordingly.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Dario Binacchi [Wed, 14 Oct 2020 21:42:17 +0000 (23:42 +0200)]
clk: ccf: replace the get_rate helper
The 12d152620d commit fixed the get_rate helper because the set_parent
one did not re-parent the clock device to the new parent. The 4d139f3838
commit allows you to remove this workaround by calling the
clk_get_parent_rate routine.
Patrick Delaunay [Mon, 12 Oct 2020 07:47:50 +0000 (09:47 +0200)]
Remove default value of CONFIG_PREBOOT for CONFIG_USB_STORAGE
Remove the default value "usb start" for CONFIG_USB_STORAGE as the USB
storage boot initialization is correctly managed by distro boot command
('usb_boot' defined in include/config_distro_bootcmd.h already include
the command 'usb start').
Fixes: 324d77998ed6 ("Define default CONFIG_PREBOOT with right config option") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Holger Brunck [Fri, 9 Oct 2020 15:21:33 +0000 (17:21 +0200)]
km/common: change ubicopy variable
Instead having a hard coded value for "cramfsaddr" after compile time,
we change it to take the variable "cramfsaddr" for the ubicopy variable.
This makes sure that ubicopy uses the right address, even when
the value for "cramfsaddr" has changed.
Holger Brunck [Fri, 9 Oct 2020 15:21:32 +0000 (17:21 +0200)]
km: adapt defines and variables for new memory layout
Due to increasing kernel image sizes we get problems when decompressing
the kernel image. To fix this we need to change the addresses where we
load and where we extract the kernel. Also we need to adapt the address
where to load the CRAMFS image and where to load the DTB file.
While at it also harmonize all boards for PPC and ARM to have the
same values. Also we add a new variable "env_version", so that the
userspace is able to detect if this is a u-boot binary with updated
values or not.
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> CC: Heiko Schocher <hs@denx.de> CC: Tom Rini <trini@konsulko.com> Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Remove old values from kmp204x.h] Signed-off-by: Tom Rini <trini@konsulko.com>
When building on a 32bit host the following warning occurs:
tools/image-host.c: In function ‘fit_image_read_data’:
tools/image-host.c:296:56: warning: format ‘%ld’ expects argument of
type ‘long int’, but argument 3 has type ‘__off64_t’
{aka ‘long long int’} [-Wformat=]
printf("File %s don't have the expected size (size=%ld, expected=%d)\n",
~~^
%lld
filename, sbuf.st_size, expected_size);
~~~~~~~~~~~~
tools/image-host.c:311:62: warning: format ‘%ld’ expects argument of
type ‘long int’, but argument 4 has type ‘__off64_t’
{aka ‘long long int’} [-Wformat=]
printf("Can't read all file %s (read %zd bytes, expexted %ld)\n",
~~^
%lld
filename, n, sbuf.st_size);
~~~~~~~~~~~~
Fix the format strings.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Holger Brunck [Thu, 8 Oct 2020 10:27:22 +0000 (12:27 +0200)]
km: fix license string and compatible strings
As the ownership is now Hitachi Power Grids, change the license string
and adapt the compatible string in DTS files. For kmeter1.dts we
change it to "keymile,KMETER1" for now, as this is then compliant with
what is submitted to the linux kernel. All other boards don't have
a upstreamed version in linux mainline.
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> CC: Heiko Schocher <hs@denx.de> CC: Marek Vasut <marex@denx.de> CC: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Naoki Hayama [Thu, 8 Oct 2020 04:16:18 +0000 (13:16 +0900)]
README: Update links to mailing list archives
This patch includes these updates
- Change http://lists.denx.de/pipermail/u-boot
to https://lists.denx.de/pipermail/u-boot
- http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
is broken, so remove it
- Another archive https://marc.info/?l=u-boot
is available, so add it
Additional information:
dir.gmane.org has moved to news.gmane.io, but it only allows
access to the archive via NNTP.
- Server: news.gmane.io
- Group : gmane.comp.boot-loaders.u-boot
I don't include this information in this patch because
it's not very useful without web interfaces.
Sean Anderson [Wed, 7 Oct 2020 18:37:44 +0000 (14:37 -0400)]
timer: Return count from timer_ops.get_count
No timer drivers return an error from get_count. Instead of possibly
returning an error, just return the count directly.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Wed, 7 Oct 2020 18:37:43 +0000 (14:37 -0400)]
doc: Document timer API
This adds kerneldocs for <timer.h>.
I don't know who should maintain doc/api/timer.rst, since the timer
subsystem seems to be maintained by SoC maintainers. MAINTAINERS is left
un-updated for the moment.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This code is intended do prevent one from setting a shell variable abc
by doing
abc=123
if an environment variable named abc already exists. However, the
check is broken, since the env_get is done before the split on =, so
we look up whether an environment variable "abc=123" exists, which is
obviously never the case.
One could move the code to below the split on =, but instead, just
remove it, saving a little .text: The check has never worked as
intended (it goes all the way back to the initial git commit), and it
would anyway not guard against one first setting the shell variable,
then doing 'env set abc xyz'.
Naoki Hayama [Wed, 7 Oct 2020 02:22:24 +0000 (11:22 +0900)]
cosmetic: image: Fix comments and the order of definitions
Fix some comments about functions.
Move genimg_get_comp_name() above genimg_get_short_name() because
genimg_get_comp_name() is related to get_table_entry_name().
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp> Reviewed-by: Simon Glass <sjg@chromium.org>
Naoki Hayama [Wed, 7 Oct 2020 02:21:55 +0000 (11:21 +0900)]
mkimage: Skip adding non-existent IDs to a list
In show_valid_options(), this patch introduces checking whether
a category has an entry ID. If not, adding it to a list for output
is skipped before calling qsort().
This patch will affect all kinds of image header categories
(-A, -C, -O and -T flags).
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp> Reviewed-by: Simon Glass <sjg@chromium.org>
Kconfig: Use hex values for CONFIG_{SPL,TPL}_SIZE_LIMIT
CONFIG_{SPL,TPL}_SIZE_LIMIT are defined as hex (SPL_SIZE_LIMIT was
converted in b51882d0 ("spl: Convert CONFIG_SPL_SIZE_LIMIT to hex"), but
there are still places that reference integer values. Change those to hex
as well. Also, update the Makefile to check for 0x0 instead of 0.
This also fixes the following build error when CONFIG_SPL_SIZE_LIMIT
is set by menuconfig to 0x0:
...
spl/u-boot-spl.bin exceeds file size limit:
limit: 0 bytes
actual: 0x80f0 bytes
excess: 0x80f0 bytes
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 28 Sep 2020 00:46:17 +0000 (18:46 -0600)]
syscon: Drop the logging in syscon_get_by_driver_data()
This function can be called when it is not known whether it will find
anything. This results in confusing log messages if the device is not
found. It is better for the caller to log the failure, if necessary.
Tom Rini [Thu, 22 Oct 2020 12:25:41 +0000 (08:25 -0400)]
Merge tag 'u-boot-stm32-20201021' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig
- Fix stm32prog command: parsing of FlashLayout without partition
- Update MAINTAINERS for ARM STM STM32MP
- Manage eth1addr on dh board with KS8851
- Limit size of cacheable DDR in pre-reloc stage in stm32mp1
- Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver
A64-Teres-I board is a laptop which comes with a builtin keyboard.
The keyboard+trackpad controller pauses for 2 seconds at a firmware
prompt before loading its HID interface.
U-Boot needs to wait equally long to reliably enable the keyboard.
Signed-off-by: Jonas Smedegaard <dr@jones.dk> Reviewed-by: Tom Rini <trini@konsulko.com>
Series-Cc: Jagan Teki <jagan@amarulasolutions.com>
Series-Cc: Lukasz Majewski <lukma@denx.de>
Series-Cc: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Thu, 22 Oct 2020 02:12:16 +0000 (21:12 -0500)]
sunxi: binman: Add support for including SCP firmware
Allwinner sun50i SoCs contain an OpenRISC 1000 CPU that functions as a
System Control Processor, or SCP. ARM Trusted Firmware (ATF)
communicates with the SCP over SCPI to implement the PSCI system
suspend, shutdown and reset functionality. Currently, SCP firmware is
optional; the system will boot and run without it, but system suspend
will be unavailable.
Since all communication with the SCP is mediated by ATF, the only thing
U-Boot needs to do is load the firmware into SRAM. The SCP firmware
occupies the last 16KiB of SRAM A2, immediately following ATF.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 22 Oct 2020 02:12:14 +0000 (21:12 -0500)]
sunxi: binman: Update FIT component descriptions
Since commit d879616e9e64 ("spl: fit: simplify logic for FDT loading for
non-OS boots"), the SPL looks at the "os" properties of FIT images to
determine where to append the FDT.
The "os" property of the "firmware" image also determines how to execute
the next stage of the boot process, as in 1d3790905d9c ("spl: atf:
introduce spl_invoke_atf and make bl31_entry private"). For this reason,
the next stage must be specified in "firmware", not in "loadables".
To support this additional functionality, and to properly model the boot
process, where ATF runs before U-Boot, add the "os" properties and swap
the firmware/loadable images in the FIT image.
Since this description was copied as an example in commit 70248d6a2916
("binman: Support generating FITs with multiple dtbs"), update those
examples as well for correctness and consistency.
Acked-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 22 Oct 2020 02:12:13 +0000 (21:12 -0500)]
spl: fit: Minimally parse OS properties with FIT_IMAGE_TINY
Some boards, specifically 64-bit Allwinner boards (sun50i), are
extremely limited on SPL size. One strategy that was used to make space
was to remove the FIT "os" property parsing code, because it uses a
rather large lookup table.
However, this forces the legacy FIT parsing code path, which requires
the "firmware" entry in the FIT to reference the U-Boot binary, even if
U-Boot is not the next binary in the boot sequence (for example, on
sun50i boards, ATF is run first).
This prevents the same FIT image from being used with a SPL with
CONFIG_SPL_FIT_IMAGE_TINY=n and CONFIG_SPL_ATF=y, because the boot
method selection code looks at `spl_image.os`, which is only set from
the "firmware" entry's "os" property.
To be able to use CONFIG_SPL_ATF=y, the "firmware" entry in the FIT
must be ATF, and U-Boot must be a loadable. For this to work, we need to
parse the "os" property just enough to tell U-Boot from other images, so
we can find it in the loadables list to append the FDT, and so we don't
try to append the FDT to ATF (which could clobber adjacent firmware).
So add the minimal code necessary to distinguish U-Boot/non-U-Boot
loadables with CONFIG_SPL_FIT_IMAGE_TINY=y. This adds about 300 bytes,
much less than the 7400 bytes added by CONFIG_SPL_FIT_IMAGE_TINY=n.
Acked-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 22 Oct 2020 02:12:11 +0000 (21:12 -0500)]
sunxi: binman: Provide a default BL31 filename
Prior to commit 7f7f8aca8257 ("sunxi: Convert 64-bit boards to use
binman"), if the BL31 environment variable was not defined, the firmware
would be loaded from a file "bl31.bin" in the current directory. Restore
that behavior by providing that as the default filename in case no entry
arg is provided, which will be the case if the environment variable is
unset.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 22 Oct 2020 02:12:09 +0000 (21:12 -0500)]
binman: Only write FDT once per node
Due to an extra level of indentation, the "data" property containing the
FDT was being written repeatedly after every other property in the node.
This caused the generated FIT image to be invalid.
Move the block up one level, so the property is added exactly once.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 22 Oct 2020 02:12:08 +0000 (21:12 -0500)]
Makefile: Only define u-boot.itb rule when applicable
If neither CONFIG_SPL_FIT_SOURCE nor CONFIG_USE_SPL_FIT_GENERATOR is
enabled, U_BOOT_ITS will be undefined, and attempting to make u-boot.itb
will pass invalid arguments to mkimage, causing it to print its help
message.
Remove the rule in that case, so it is more obvious that u-boot.itb is
not something that can be made. This will reduce confusion as platforms
move away from CONFIG_USE_SPL_FIT_GENERATOR, as u-boot.itb was
previously a valid goal for those platforms.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Fri, 16 Oct 2020 09:33:08 +0000 (17:33 +0800)]
sunxi: make V3s DRAM initialization more proper
Previously, because we have no source code about the DRAM initialization
of V3s and missing some configurations (delays and MBUS QoS info), our
V3s DRAM initialization sequence is hacked from the H3 one.
As the SDK shipped with PineCube contains source code for V3s libdram,
we can retrieve these information from it and tweak some other magic
bits.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Marek Vasut [Mon, 19 Oct 2020 21:40:26 +0000 (23:40 +0200)]
Revert "Fix data abort caused by mis-aligning FIT data"
This reverts commit eb39d8ba5f0d1468b01b89a2a464d18612d3ea76.
The commit breaks booting of fitImage by SPL, the system simply hangs.
This is because on arm32, the fitImage and all of its content can be
aligned to 4 bytes and U-Boot expects just that.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Reuben Dowle <reuben.dowle@4rf.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marex@denx.de>
The current default of 0x400 for SYS_MALLOC_F_LEN is too small if any
additional drivers marked as DM_FLAG_PRE_RELOC are loaded before
relocation.
CONFIG_RSA=y which is needed for UEFI secure boot or for FIT image
verification loads the driver mod_exp_sw which has DM_FLAG_PRE_RELOC.
CONFIG_LOG=Y is another setting requiring additional early malloc
area, cf. log_init().
When running pine64-lts_defconfig with CONFIG_RSA=y and debug UART enabled
we see as output in main U-Boot
alloc_simple() alloc space exhausted
With this patch the default values of SYS_MALLOC_F_LEN and
SPL_SYS_MALLOC_F_LEN on ARCH_SUNXI are raised to 0x2000.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Update email address of Maxime Ripard in git-mailrc to match more
recently updated entry in MAINTAINERS.
commit 9bd9b2bcbee1 ("MAINTAINERS: Update my email address")
commit bf8f4c4400e3 ("MAINTAINERS: Update email address for Maxime Ripard")
Signed-off-by: Jonas Smedegaard <dr@jones.dk> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:46 +0000 (01:40 +0100)]
sunxi: Pine-H64: Explicitly enable PHY regulator
According to the devicetree and the schematic, the 3.3V power rail for
the PHY is enabled by GPIO PC16. It's wired as active-high, with a
pull-up resistor, so actually works already when the GPIO is in
High-Z state.
However we should not take any chances and explicitly set the GPIO pin
to high, to avoid accidentally losing the PHY power.
The existing MACPWR Kconfig allows to do this easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:45 +0000 (01:40 +0100)]
net: sun8i-emac: Lower MDIO frequency
When sending a command via the MDIO bus, the Designware MAC expects some
bits in the CMD register to describe the clock divider value between
the main clock and the MDIO clock.
So far we were omitting these bits, resulting in setting "00", which
means "/ 16", so ending up with an MDIO frequency of either 18.75 or
12.5 MHz.
All the internal PHYs in the H3/H5/H6 SoCs as well as the Gbit Realtek
PHYs seem to be fine with that - although it looks like to be severly
overclocked (the MDIO spec limits the frequency to 2.5 MHz).
However the external 100Mbit PHY on the Pine64 (non-plus) board is
not happy with that, Ethernet was actually never working there, as the
PHY didn't probe.
As we set the EMAC clock (via AHB2) to 300 MHz in ATF (on the 64-bit
SoCs), and use 200 MHz on the H3, we need the highest divider of 128
to let the MDIO clock end up below the required 2.5 MHz.
This enables Ethernet on the Pine64(non-plus).
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Wed, 21 Oct 2020 17:57:32 +0000 (23:27 +0530)]
net: sun8i-emac: Make internal PHY handling more robust
The current implementation of sun8i_get_ephy_nodes() makes quite some
assumptions, in general relying on DT path names is a bad idea.
I think the idea of the code was to determine if we are using the
internal PHY, for which there are simpler and more robust methods:
Rewrite (and rename) the existing function to simply lookup the DT node
that "phy-handle" points to, using the device's DT node.
Then check whether the parent of that PHY node is using an "H3 internal
MDIO" compatible string. If we ever get another internal MDIO bus
implementation, we will probably need code adjustments anyway, so this
is good enough for now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: rebase on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:43 +0000 (01:40 +0100)]
net: sun8i_emac: Simplify and fix error handling for RX
The error handling in recv() is somewhat broken, for instance
good_packet isn't really used, and it's hardly readable. Also we try
to check for short or too big packets, but those are actually filtered
out by the hardware.
Simplify the whole routine and improve the error handling:
- Bail out early if the current RX descriptor is not ready.
- Enable propagation of runt, huge and broken packets.
- Check for runt and huge packets, and return 0 to indicate this.
This will force the framework to call free_pkt for cleanup.
- Avoid aligning the packet buffer for invalidation again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:42 +0000 (01:40 +0100)]
net: sun8i_emac: Fix MAC soft reset
The EMAC soft reset routine was subtly broken, using an open coded
timeout routine without any actual delay.
Remove the unneeded initial reset bit read, and call wait_for_bit_le32()
to handle the timeout correctly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:41 +0000 (01:40 +0100)]
net: sun8i_emac: Fix overlong lines
When iterating over all RX/TX buffers, we were using a rather long "idx"
control variable, which lead to a nasty overlong line.
Replace "idx" with "i" to avoid this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:40 +0000 (01:40 +0100)]
net: sun8i_emac: Wrap and simplify cache maintenance operations
To meet the current alignment requirements for our cache maintenance
functions, we were explicitly aligning the *arguments* to those calls.
This is not only ugly to read, but also wrong, as we need to make sure
we are not accidentally stepping on other data.
Provide wrapper functions for the common case of cleaning or
invalidating a descriptor, to make the cache maintenance calls more
readable. This fixes a good deal of the problematic calls.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:39 +0000 (01:40 +0100)]
net: sun8i_emac: Drop unneeded cache invalidation before sending
There is no reason to invalidate a TX descriptor before we are setting
it up, as we will only write to a field.
Remove the not needed invalidate_dcache_range() call.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:38 +0000 (01:40 +0100)]
net: sun8i_emac: Reduce cache maintenance on TX descriptor init
When we initialise the TX descriptors, there is no need yet to clean
them all to memory, as they don't contain any data yet. Later we will
touch and clean each descriptor anyway.
However we tell the MAC about the beginning of the chain, so we have to
clean at least the first descriptor, to make it clear that this is empty
and there are no packets to transfer yet.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:37 +0000 (01:40 +0100)]
net: sun8i_emac: Improve cache maintenance on RX descriptor init
Before we initialise the RX descriptors, there is no need to *clean*
them from the cache, as we touch them for the first time.
However we should cover the case that those buffers contain dirty cache
lines, which could be evicted and written back to DRAM any time later,
in the worst case *after* the MAC has transferred a packet into them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:36 +0000 (01:40 +0100)]
net: sun8i_emac: Name magic bits and simplify read-modify-write calls
The EMAC driver contains a lot of magic bits, although the manuals
and the Linux driver have all names for them.
Define those names and use them when programming the registers.
Also this replaces a lot of readl/mask/writel operations with the much
easier-to-read setbits_le32() macro.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Apparently due to copying from some older or converted driver, the
sun8i_emac driver contains pointless wrapper functions to bridge
between a legacy driver and the driver model.
Since sun8i_emac is (and always was) driver model only, there is no
reason to have those confusing wrappers. Just remove them, and use
the driver model prototypes directly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When preparing the register value for the MDIO command register, we
start with a zeroed register, so there is no need to mask off certain
bits before setting them.
Simplify the sequence, and rename the variable to a more matching
mii_cmd on the way.
Also the open-coded time-out routine can be replaced with a much safer
and easier-to-read call to wait_for_bit_le32().
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:33 +0000 (01:40 +0100)]
net: sun8i_emac: Don't hand out TX descriptor too early
When initialising the TX DMA descriptors, we mostly chain them up,
but of course don't know about any data or its length yet.
That means they are still invalid, and the OWN bit should NOT be set
yet.
In fact when we later tell the MAC about the beginning of the chain,
and enable TX DMA in the start() routine, the MAC will start fetching
TX descriptors prematurely, as it can be seen by dumping the TX_DMA_STA
and TX_DMA_CUR_DESC registers.
Clear the owner bit, to not give the MAC the wrong illusion that it
owns the descriptors already.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Mon, 6 Jul 2020 00:40:32 +0000 (01:40 +0100)]
net: sun8i-emac: Bail out on PHY error
When phy_startup() returns with an error, because there is no link or
the user interrupted the process, we shall stop the _start() routine
and return with an error, instead of proceeding anyway.
This fixes pointless operations when there is no Ethernet cable
connected, for instance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:28:17 +0000 (14:28 +0200)]
stm32mp: stm32prog: accept device without partition
When partitions are not available on a device the command stm32prog raises
an error but a device can have no partition to check in init_device()
and the command need to continue to the next part_id.
This patch correct an issue for ram0 target, when block_dev and mtd
are NULL.
For example with the simple flashlayout file:
Opt Part Name Type Device Offset Binary
- 0x01 fsbl Binary none 0x0 tf-a-serialboot.stm32
- 0x03 ssbl Binary none 0x0 u-boot.stm32
P 0x10 kernel System ram0 0xC2000000 uImage.bin
P 0x11 dtb FileSytem ram0 0xC4000000 stm32mp157f-ev1.dtb
Fixes: ffc405e63b94 ("stm32mp: stm32prog: add upport of partial update") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
MAINTAINERS: Add stm32 and stm regexp for ARM STM STM32MP platform
Add files and directories regex "stm32" and "stm" in "ARM STM STM32MP"
platform to avoid missing files or drivers supported by the
STMicroelectronics series STM32MP15x.
This patch adds the rules already used in Linux kernel for
ARM/STM32 ARCHITECTURE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Cosmetic update of gpio.h:
- remove enumerate: stm32_gpio_port, stm32_gpio_pin
because STM32_GPIO_XXX values are unused
- move STM32_GPIOS_PER_BANK in stm32_gpio.c
as its value is IP dependent and not arch dependent
No functional change as number of banks and number of gpio by banks
is managed by device tree since since DM migration and
commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops").
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 8 Oct 2020 13:14:58 +0000 (15:14 +0200)]
ARM: dts: stm32: Do not set eth1addr if KS8851 has EEPROM
In case the KS8851 has external EEPROM attached to it, do not set
eth1addr at all. The network stack will read the MAC out of the
KS8851 and set eth1addr accordingly.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
stm32mp: limit size of cacheable DDR in pre-reloc stage
In pre-reloc stage, U-Boot marks cacheable the DDR limited by
the new config CONFIG_DDR_CACHEABLE_SIZE.
This patch allows to avoid any speculative access to DDR protected by
firewall and used by OP-TEE; the "no-map" reserved memory
node in DT are assumed after this limit:
STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
Without security, in basic boot, the value is equal to STM32_DDR_SIZE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
mmc: stm32_sdmmc2: Use mmc_of_parse() to read host capabilities
mmc_of_parse() can populate the 'f_max' and 'host_caps' fields of
struct mmc_config from devicetree.
The same logic is duplicated in stm32_sdmmc2_probe(). Use
mmc_of_parse(), which is more generic.
mmc: mmc_of_parse: Enable 52 MHz support with "cap-mmc-highspeed"
"cap-mmc-highspeed" enables support for 26 MHz MMC, but there is no
additional flag to enable 52 MHz MMC. In Linux. "cap-mmc-highspeed"
is used for MMC HS at both 26MHz and 52MHz.
Use the same approach and enable MMC_CAP(MMC_HS_52) host capability
when "cap-mmc-highspeed" is found in the devicetree. In the event an
MMC card doesn't support 52 MHz, it will be clocked at a speed based
on its EXT CSD, even on 52 MHz host controllers
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Ralph Siemsen [Tue, 29 Sep 2020 18:52:05 +0000 (14:52 -0400)]
arm: socfpga: fix Gen5 enable of EMAC via FPGA
An earlier conversion from struct to defines introduced two errors, both
related to setup of EMAC routed via the FPGA. One of the offsets was
incorrect, and the EMAC0/EMAC1 were swapped.
The effect of this was rather odd: both ports could operate at gigabit,
but one of them would fail to transmit when operating at 100Mbit.
Fixes: db5741f7a85ec3ee79b64496172afaa7dc2cb225 ("arm: socfpga: Convert system manager from struct to defines") Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
projects / u-boot.git / log