power: pmic: tps65941: Update compatible to aling with kernel DT
Linux kernel driver drivers/mfd/tps6594-i2c.c is using different
name for compatible for tps6594 family PMIC.
After sync of Linux kernel DT to u-boot for TI platforms
J7200, J721S2 and J784S4 PMIC is no longer getting probed.
So updating compatible field to align with Linux driver and DT.
power: regulator: tps65941: Add TPS65224 PMIC regulator support
Reuse TPS65941 regulator driver to adds support for
TPS65224 PMIC's regulators. 4 BUCKs and 3 LDOs, where
BUCK1 and BUCK2 can be configured in dual phase mode.
Tom Rini [Fri, 26 Apr 2024 13:28:57 +0000 (07:28 -0600)]
Merge tag 'u-boot-rockchip-20240426' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
Please pull the updates for rockchip platform:
- dts sync for rk3308;
- sdram: Support getting banks from TPL for rk3568 and rk3588;
- dts and config clean and sync up for rk3568/rk3588;
- Other misc fixes;
Tom Rini [Fri, 26 Apr 2024 13:28:32 +0000 (07:28 -0600)]
Merge tag 'optee-master-26042024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Minor changes on this PR.
Igor added some orphaned OP-TEE related files on the proper section
of MAINTAINERS and fixed a potential buffer overflow in tee-sandbox
RK356x-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: turing-rk1-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the turing-rk1-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: toybrick_rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the toybrick_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: evb_rk3588 et al.: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the evb_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
All defconfigs using the CONFIG_TARGET_EVB_RK3588 are updated at once
since they are impacted by this change.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock5b-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5b-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock5a-rk3588s: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5a-rk3588s.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: quartzpro64-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the quartzpro64-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: nanopc-t6-rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the nanopc-t6-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: NR_DRAM_BANKS now defaults to 10 when Rockchip TPL blob is used
When Rockchip TPL blob is used, the memory areas that can be used for
DRAM is gotten from ATAGS passed through the DRAM at a specific address.
The DDR_MEM tag contains at most 10 areas, so we should default to 10 if
Rockchip TPL blob is used. Note that it is technically possible we need
more if one of those 10 areas overlaps with reserved memory area,
forcing us to split it in two. But a default doesn't need to handle all
cases, only most.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588
Allow RK3568 and RK3588 based boards to get the RAM bank configuration
from the ROCKCHIP_TPL stage instead of the current logic. This fixes
both an issue where 256MB of RAM is blocked for devices with >= 4GB
of RAM and where memory holes need to be defined for devices with
more than 16GB of RAM. In the event that neither SoC is used or the
ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas
defined in mem_map data struct in SoC C files, but only if the DRAM area
overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward
to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1
(e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as
well, but the DDR_MEM tag seems to be pretty much stable (though BL31
seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and
it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rock-pi-4-rk3399: enable booting from SPI flash
Some variants of the ROCK Pi 4 series have an SPI flash chip populated
which can be booted from. This patch enables support in U-Boot for
building the image for the SPI flash, support for booting U-Boot from the
SPI flash chip and support in U-Boot for accessing the SPI flash using
`sf` commands.
Not all variants (e.g. ROCK Pi 4B, ROCK 4 Model C Plus, ROCK 4SE) come
populated with an SPI flash chip, but have the footprint on the board so
a user could solder their own to the board. With this patchset applied,
these board variants without an SPI flash chip still boot from MMC.
I have enabled support for both Winbond and XTX SPI flash devices since
different hardware variants have different devices populated:
- `rockpi4_v13_sch_20181112.pdf` contains a Winbond part `W25Q64FWZPIG`
- `rockpi4_v14_sch_20210114.pdf` contains an XTX part `XT25F32BWOIGT`
The ROCK Pi 4 I have is marked as "ROCK PI 4 v1.48" and contains an SPI
flash chip from XTX:
=> sf probe
SF: Detected xt25f32 with page size 256 Bytes, erase size 4 KiB, total 4 MiB
In the interest of supporting all board variants and not regressing
existing users who boot from MMC, I have enabled support for booting from
both SPI flash chip variants in the defconfig and left the environment
storage location as MMC to not break existing users who have the
environment stored on MMC.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
To prepare for ROCK Pi 4A SPI flash support, sync the DTS from Linux which
includes an SPI flash node.
Kernel tag: v6.6-rc1
Kernel commits:
- eddf73029770 ("arm64: dts: rockchip: Enable internal SPI flash for ROCK \
Pi 4A/B/C")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Sun, 21 Apr 2024 20:09:03 +0000 (20:09 +0000)]
rockchip: io-domain: Add support for RK3328
Port the RK3328 part of the Rockchip IO-domain driver from linux.
This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.
Enable by default on all RK3328 boards, skip rk3328-evb because this
target is typically also used on miscellaneous boards and boxes not
fully supported by U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort imply statements under ROCKCHIP_RK3328 alphabetically and remove
ENABLE_ARM_SOC_BOOT0_HOOK, DEBUG_UART_BOARD_INIT and SYS_NS16550, they
are already implyed or selected by ARCH_ROCKCHIP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: px30-board-tpl: Sync ifdef guards with full TPL
Display TPL init information message only when TPL_BANNER_PRINT
configuration entry is set. This allows to disable information
message in case logs on UART are unwanted.
Update parent ifdef condition to check also CONFIG_TPL_SERIAL
to match logic of the non-PX30 TPL implementation.
Jonas Karlman [Wed, 10 Apr 2024 14:30:50 +0000 (14:30 +0000)]
mmc: rockchip_sdhci: Fix 4 blocks PIO mode read limit for RK35xx
The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:29:05 +0000 (06:29 +0000)]
rockchip: rk35xx-generic: Disable unused features
The generic RK35xx board targets are intended to be used as a bare
minimum target that can be used to e.g. boot boards that mostly follow
reference hw design before a board spefic target has been added or for
flashing and recovery purposes.
Disable BOOTMETH_VBE, NET and ADC as these features are not intended to
ever be used by these minimal generic board targets.
Enable SYSRESET_PSCI to let TF-A handle sysreset from U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:55 +0000 (06:28 +0000)]
rockchip: rk3588-coolpi: Fix .dtb-file entries in Makefile
Fix CoolPi 4 Model B and CoolPi CM5 EVB .dtb-file entries in Makefile.
Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:54 +0000 (06:28 +0000)]
rockchip: rk3588-coolpi: Add boards to documentation
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation.
Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:53 +0000 (06:28 +0000)]
rockchip: rk3566-pinetab2: Fix reading FIT from SPI flash
The SF_DEFAULT_SPEED Kconfig option got lost during merge and this
prevent reading FIT from SPI flash.
Restore the SF_DEFAULT_SPEED option to fix this.
Fixes: 8a94c376f6cb ("rockchip: Use common bss and stack addresses on RK356x") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:50 +0000 (06:28 +0000)]
rockchip: rk3588: Update bootph props
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag")
bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available
in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph
props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they
are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:49 +0000 (06:28 +0000)]
rockchip: rk356x: Update bootph props
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag")
bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available
in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph
props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they
are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL_ROCKCHIP_BACK_TO_BROM should normally only be enabled when BROM
should load U-Boot binary. SPL on Anbernic RGxx3 devices load TF-A and
U-Boot proper from FIT images and does never jump back to BROM from SPL.
Remove the superfluous Kconfig option from defconfig to align with other
RK356x boards.
This patch have no intended change in boot behavior.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:40 +0000 (06:28 +0000)]
clk: rockchip: rk356x: Fix set rate of SCLK_SFC clock
The SCLK_SFC can be set to a rate of 24, 50, 75, 100, 125 or 150 MHz.
However, clk_set_rate() will fail unless one of those exact rates are
used, and with newer and updated device tree files that contain
spi-max-frequency values that does not exactly match these rates use of
SPI flash may fail.
Fix this by using the highest possible rate that exceeds or is equal to
the requested rate.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 22 Apr 2024 06:28:39 +0000 (06:28 +0000)]
clk: rockchip: rk3588: Add REF_CLK_USB3OTGx support
The REF_CLK_USB3OTGx clocks is used as reference clock for USB3 block.
Add simple support to get rate of REF_CLK_USB3OTGx clocks to fix
reference clock period configuration.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 8 Apr 2024 18:14:03 +0000 (18:14 +0000)]
rockchip: rk3308: Fix loading FIT from SD-card when booting from eMMC
When RK3308 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there can be a fallback
to read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card may fail:
U-Boot SPL 2024.04-rc4 (Mar 16 2024 - 12:36:12 +0000)
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC1
Card did not respond to voltage select! : -110
mmc_init: -95, time 12
spl: mmc init failed with error: -95
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices (err=-6)
### ERROR ### Please RESET the board ###
Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.
Imply SPL_PINCTRL and SPL_DM_SEQ_ALIAS to apply correct pinconf before
trying to load FIT from a device.
Move u-boot,spl-boot-order to soc u-boot.dtsi and define both sdmmc and
emmc nodes as fallback.
Also fix boot from eMMC (SD NAND) on ROCK Pi S by using correct pinctrl.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 8 Apr 2024 18:14:01 +0000 (18:14 +0000)]
rockchip: rk3308: Generate ethaddr based on cpu id
Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
memory. The rockchip_otp driver already support the RK3308 variant.
However, the device tree is missing a node to enable use of OTP.
Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
driver and enable use of misc_init_r() to set ethaddr based on cpu id.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort imply statements under ROCKCHIP_RK3308 alphabetically and remove
the config SPL_SERIAL statement from soc Kconfig file, it is already
implyed in arch Kconfig.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: spl-boot-order: show DT path for missing device
When debugging the SPL boot order, the node ID of a device which hasn't
been found is printed but it can be quite hard to relate that to the
specific devicetree node. To aid debugging, print the node path instead of
the cryptic node ID.
Original debug message:
board_boot_order: could not map node @73c to a boot-device
With this patch applied this becomes e.g:
board_boot_order: could not map node /spi@ff1d0000/flash@0 to a boot-device
Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Quentin Schulz [Fri, 9 Feb 2024 13:18:09 +0000 (14:18 +0100)]
rockchip: ringneck-px30: put STM32_RST line in input mode instead of output
The STM32_RST line is routed to the ATtiny microcontroller
PA0/RESET/UPDI pin. By driving the PX30 SoC pin as GPIO output high, we
prevent external UPDI to be used for flashing without first putting this
pin as GPIO input, an extra step we could avoid in userspace.
There's an external hardware pull-up strong enough to keep the STM32_RST
state high on ATtiny side but weak enough it can be overridden by
external UPDI. This also means it is safe to use for the STM32 variant,
where STM32_RST line will be in the same state as if output high was
used.
The Q7 standard specifies that MFG_NC1 and MFG_NC2 (used for UPDI for
Ringneck) pins should neither be driven by the carrierboard, nor have
pull-up or pull-down resistors. This means this commit is safe to use
regardless of the carrierboard this module would be connected to
(provided it follows the Q7 standard).
Jonas Karlman [Fri, 22 Mar 2024 20:50:21 +0000 (20:50 +0000)]
rockchip: spl: Cache boot source id for later use
Rockchip BROM writes a boot source id at CFG_IRAM_BASE + 0x10, this id
indicates from what storage media TPL/SPL was loaded from.
SPL uses this id to determine what device "same-as-spl" represent when
determining from where FIT should be loaded. This works as long as the
boot_devices array contain a matching id <-> node path entry.
However, SPL typically load a small part of TF-A into SRAM and on RK3399
this overwrites the CFG_IRAM_BASE + 0x10 addr used for boot source id.
For affected devices the u-boot,spl-boot-device would not be set when
booting from SPI flash and the flash@0 node was not explicitly listed
in the u-boot,spl-boot-order prop.
Here boot source id is 3 before FIT images is loaded, and 0 after:
U-Boot SPL 2024.04-rc4 (Mar 15 2024 - 17:26:19 +0000)
board_spl_was_booted_from: brom_bootdevice_id 3 maps to '/spi@ff1d0000/flash@0'
Trying to boot from SPI
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ... sha256+ OK
## Checking hash(es) for Image u-boot ... sha256+ OK
## Checking hash(es) for Image fdt-1 ... sha256+ OK
## Checking hash(es) for Image atf-2 ... sha256+ OK
## Checking hash(es) for Image atf-3 ... sha256+ OK
board_spl_was_booted_from: failed to resolve brom_bootdevice_id 0
spl_decode_boot_device: could not find udevice for /mmc@fe330000
spl_decode_boot_device: could not find udevice for /mmc@fe320000
spl_perform_fixups: could not map boot_device to ofpath: -19
Use a static brom_bootsource_id_cache to save the boot source id after
an initial read from SRAM to fix this, this allow spl_perform_fixups()
to resolve correct boot source path for "same-as-spl" after SPL have
loaded TF-A related FIT images into memory.
With this the spl-boot-device prop can correctly be resolved to the
SPI flash node in the control FDT:
=> fdt addr ${fdtcontroladdr}
Working FDT set to f1ee6710
=> fdt list /chosen
chosen {
u-boot,spl-boot-device = "/spi@ff1d0000/flash@0";
stdout-path = "serial2:1500000n8";
u-boot,spl-boot-order = "same-as-spl", "/mmc@fe330000", "/mmc@fe320000";
};
Fixes: d57e16c7e712 ("rockchip: find U-boot proper boot device by inverting the logic that sets it") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Maximilian Brune [Mon, 15 Apr 2024 09:53:11 +0000 (11:53 +0200)]
mmc: arm_pl180: Limit data transfer to U16_MAX
Currently fetching files bigger that cause a data transfer greater than
U16_MAX fails.
The reason is that the specification defines the datalength register
as a 16 bit wide register, but in u-boot it is used as if it is an
32 bit register. Therefore values greater than U16_MAX cause an
infinite loop inside u-boot. U-boot expects to get more data from
interface/hardware then it will ever get and therefore inifintely waits
for more data that will never come.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Jonas Karlman [Mon, 8 Apr 2024 21:06:15 +0000 (21:06 +0000)]
mmc: Imply HS200 cap with mmc-hs400 prop to match linux
eMMC nodes in linux device tree files typically only contain a mmc-hs400
prop to signal support for both HS400 and HS200. However, U-Boot require
an explicit mmc-hs200 prop to signal support for the HS200 mode.
Fix this by follow linux and imply HS200 cap when HS400 cap is signaled
using a mmc-hs400 prop.
Greg Malysa [Tue, 26 Mar 2024 02:28:08 +0000 (22:28 -0400)]
mmc: Support 32-bit only ADMA on 64-bit platforms
Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.
Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Greg Malysa <greg.malysa@timesys.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.
sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN = 33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Greg Malysa <greg.malysa@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ian Roberts [Mon, 22 Apr 2024 19:00:02 +0000 (15:00 -0400)]
mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops
Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.
The above is a port of Linux kernel commit 54552e4948cbf
In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.
Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Co-developed-by: Greg Malysa <greg.malysa@timesys.com> Signed-off-by: Greg Malysa <greg.malysa@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Igor Opaniuk [Thu, 4 Apr 2024 10:52:48 +0000 (12:52 +0200)]
MAINTAINERS: add entries for tee-related orphaned files
Add orphaned TEE/OP-TEE-related files to TEE subsystem entry in
MAINTAINERS. This includes:
- optee_rpmb cmd and test for it
- Misc. OP-TEE tests
- OP-TEE SCMI agent implementation
- Documentation, including device tree bindings
* QCM2290 and SM6115 are low and mid range SoCs used on the RB1 and RB2
respectively. SM6115 is also used in some mid-range smartphones/tablets.
Initial support includes buttons and USB (host and gadget).
* SM8250 is a flagship SoC from 2020 used on the RB5, as well as many flagship
smartphones. The board can boot to a U-Boot prompt, but is missing regulators
necessary for USB support.
* SM8550, and SM8650 are flagship mobile SoCs from 2023 and 2024
respectively. Found on many high end smartphones.
In addition:
* Support is added for the Schneider HMIBSC board.
* mach-snapdragon switches to OF_UPSTREAM
* IPQ40xx gets several regressions fixed and some overall cleanup.
* The MSM serial driver gains the ability to generate the bit-clock
automatically, no longer relying on a custom DT property.
* The Qualcomm SMMU driver gets a generic compatible (so per-SoC compatibles
don't need to be added).
* Support for the GENI I2C controller is added.
* The qcom SPMI driver has SPMI v5 support fixed, and v7 support added.
* The qcom sdhci driver gets some fixes for SDCC v5 support.
* SDM845 gains sdcard support
* Support is added for the Synopsys eUSB2 PHY driver (used on SM8550 and SM8650)
* SYS_INIT_SP_BSS_OFFSET is set to 1.5M to give us more space for FDTs.
* RB2 gets a work-around to fix the USB dr_mode property before booting Linux.
Michael Walle [Wed, 6 Mar 2024 16:19:11 +0000 (17:19 +0100)]
board: sl28: move to OF_UPSTREAM
Use the new device devicetree files in dts/upstream/ and delete the old
ones. Still keep the -u-boot.dtsi with all u-boot specifics around.
There is one catch and that is fsl-ls1028a-kontron-sl28-var3.dts which
is not available upstream (yet!). For now, the base dts is used for this
variant as this only differ in the compatible and the (human readable)
model name.
Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Neil Armstrong [Mon, 22 Apr 2024 09:33:52 +0000 (11:33 +0200)]
i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller
Add Support for the Qualcomm Generic Interface (GENI) I2C interface
found on newer Qualcomm SoCs.
The Generic Interface (GENI) is a firmware based Qualcomm Universal
Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple
bus protocols depending on the firmware type loaded at early boot time
based on system configuration.
It also supports the "I2C Master Hub" which is a single function Wrapper
that only FIFO mode I2C.
It replaces the fixed-function QUP Wrapper found on older SoCs.
The geni-se.h containing the generic GENI Serial Engine registers defines
is imported from Linux.
Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
EFI initialisation fails without this, and with proper SMBIOS v3 support
in (and automatic generation of useful tables) there's no reason for us
not to do this on qcom platforms.
mach-snapdragon: implement ft_board_setup() for USB role selection
Some Qualcomm boards have only one USB controller which is muxed between
the type-c port and an internal USB hub for type-A and ethernet. We
modify the DT for these to force them to host mode in U-Boot. However in
Linux DRD role switching is supported (required, even). Use
ft_board_setup() to adjust the dr_mode property for these boards.
While we're here, define pr_fmt for this file so we can more easily
identify log messages.
With the exception of SDM845, most other Qualcomm SoCs have the Qualcomm
specific (but not SoC) specific SMMU compatible string. Add it here so
we can match those without having to add individual SoCs to the list
here.
Neil Armstrong [Fri, 5 Apr 2024 08:21:56 +0000 (10:21 +0200)]
spmi: msm: support controller version 7
Add the defines and support for SPMI arbiters version 7,
which can handle up to 1024 peripherals, and can also drive
a secondary bus which is not implemented yet.
projects / u-boot.git / log